1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #include "gem/i915_gem_context.h"
7 #include "gem/i915_gem_pm.h"
8 
9 #include "i915_drm_client.h"
10 #include "i915_drv.h"
11 #include "i915_trace.h"
12 
13 #include "intel_context.h"
14 #include "intel_engine.h"
15 #include "intel_engine_pm.h"
16 #include "intel_ring.h"
17 
18 static struct pool slab_ce;
19 
intel_context_alloc(void)20 static struct intel_context *intel_context_alloc(void)
21 {
22 #ifdef __linux__
23 	return kmem_cache_zalloc(slab_ce, GFP_KERNEL);
24 #else
25 	return pool_get(&slab_ce, PR_WAITOK | PR_ZERO);
26 #endif
27 }
28 
rcu_context_free(struct rcu_head * rcu)29 static void rcu_context_free(struct rcu_head *rcu)
30 {
31 	struct intel_context *ce = container_of(rcu, typeof(*ce), rcu);
32 
33 	trace_intel_context_free(ce);
34 	if (intel_context_has_own_state(ce))
35 		uao_detach(ce->default_state);
36 #ifdef __linux__
37 	kmem_cache_free(slab_ce, ce);
38 #else
39 	pool_put(&slab_ce, ce);
40 #endif
41 }
42 
intel_context_free(struct intel_context * ce)43 void intel_context_free(struct intel_context *ce)
44 {
45 	call_rcu(&ce->rcu, rcu_context_free);
46 }
47 
48 struct intel_context *
intel_context_create(struct intel_engine_cs * engine)49 intel_context_create(struct intel_engine_cs *engine)
50 {
51 	struct intel_context *ce;
52 
53 	ce = intel_context_alloc();
54 	if (!ce)
55 		return ERR_PTR(-ENOMEM);
56 
57 	intel_context_init(ce, engine);
58 	trace_intel_context_create(ce);
59 	return ce;
60 }
61 
intel_context_alloc_state(struct intel_context * ce)62 int intel_context_alloc_state(struct intel_context *ce)
63 {
64 	struct i915_gem_context *ctx;
65 	int err = 0;
66 
67 	if (mutex_lock_interruptible(&ce->pin_mutex))
68 		return -EINTR;
69 
70 	if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
71 		if (intel_context_is_banned(ce)) {
72 			err = -EIO;
73 			goto unlock;
74 		}
75 
76 		err = ce->ops->alloc(ce);
77 		if (unlikely(err))
78 			goto unlock;
79 
80 		set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
81 
82 		rcu_read_lock();
83 		ctx = rcu_dereference(ce->gem_context);
84 		if (ctx && !kref_get_unless_zero(&ctx->ref))
85 			ctx = NULL;
86 		rcu_read_unlock();
87 		if (ctx) {
88 			if (ctx->client)
89 				i915_drm_client_add_context_objects(ctx->client,
90 								    ce);
91 			i915_gem_context_put(ctx);
92 		}
93 	}
94 
95 unlock:
96 	mutex_unlock(&ce->pin_mutex);
97 	return err;
98 }
99 
intel_context_active_acquire(struct intel_context * ce)100 static int intel_context_active_acquire(struct intel_context *ce)
101 {
102 	int err;
103 
104 	__i915_active_acquire(&ce->active);
105 
106 	if (intel_context_is_barrier(ce) || intel_engine_uses_guc(ce->engine) ||
107 	    intel_context_is_parallel(ce))
108 		return 0;
109 
110 	/* Preallocate tracking nodes */
111 	err = i915_active_acquire_preallocate_barrier(&ce->active,
112 						      ce->engine);
113 	if (err)
114 		i915_active_release(&ce->active);
115 
116 	return err;
117 }
118 
intel_context_active_release(struct intel_context * ce)119 static void intel_context_active_release(struct intel_context *ce)
120 {
121 	/* Nodes preallocated in intel_context_active() */
122 	i915_active_acquire_barrier(&ce->active);
123 	i915_active_release(&ce->active);
124 }
125 
__context_pin_state(struct i915_vma * vma,struct i915_gem_ww_ctx * ww)126 static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww)
127 {
128 	unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
129 	int err;
130 
131 	err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH);
132 	if (err)
133 		return err;
134 
135 	err = i915_active_acquire(&vma->active);
136 	if (err)
137 		goto err_unpin;
138 
139 	/*
140 	 * And mark it as a globally pinned object to let the shrinker know
141 	 * it cannot reclaim the object until we release it.
142 	 */
143 	i915_vma_make_unshrinkable(vma);
144 	vma->obj->mm.dirty = true;
145 
146 	return 0;
147 
148 err_unpin:
149 	i915_vma_unpin(vma);
150 	return err;
151 }
152 
__context_unpin_state(struct i915_vma * vma)153 static void __context_unpin_state(struct i915_vma *vma)
154 {
155 	i915_vma_make_shrinkable(vma);
156 	i915_active_release(&vma->active);
157 	__i915_vma_unpin(vma);
158 }
159 
__ring_active(struct intel_ring * ring,struct i915_gem_ww_ctx * ww)160 static int __ring_active(struct intel_ring *ring,
161 			 struct i915_gem_ww_ctx *ww)
162 {
163 	int err;
164 
165 	err = intel_ring_pin(ring, ww);
166 	if (err)
167 		return err;
168 
169 	err = i915_active_acquire(&ring->vma->active);
170 	if (err)
171 		goto err_pin;
172 
173 	return 0;
174 
175 err_pin:
176 	intel_ring_unpin(ring);
177 	return err;
178 }
179 
__ring_retire(struct intel_ring * ring)180 static void __ring_retire(struct intel_ring *ring)
181 {
182 	i915_active_release(&ring->vma->active);
183 	intel_ring_unpin(ring);
184 }
185 
intel_context_pre_pin(struct intel_context * ce,struct i915_gem_ww_ctx * ww)186 static int intel_context_pre_pin(struct intel_context *ce,
187 				 struct i915_gem_ww_ctx *ww)
188 {
189 	int err;
190 
191 	CE_TRACE(ce, "active\n");
192 
193 	err = __ring_active(ce->ring, ww);
194 	if (err)
195 		return err;
196 
197 	err = intel_timeline_pin(ce->timeline, ww);
198 	if (err)
199 		goto err_ring;
200 
201 	if (!ce->state)
202 		return 0;
203 
204 	err = __context_pin_state(ce->state, ww);
205 	if (err)
206 		goto err_timeline;
207 
208 
209 	return 0;
210 
211 err_timeline:
212 	intel_timeline_unpin(ce->timeline);
213 err_ring:
214 	__ring_retire(ce->ring);
215 	return err;
216 }
217 
intel_context_post_unpin(struct intel_context * ce)218 static void intel_context_post_unpin(struct intel_context *ce)
219 {
220 	if (ce->state)
221 		__context_unpin_state(ce->state);
222 
223 	intel_timeline_unpin(ce->timeline);
224 	__ring_retire(ce->ring);
225 }
226 
__intel_context_do_pin_ww(struct intel_context * ce,struct i915_gem_ww_ctx * ww)227 int __intel_context_do_pin_ww(struct intel_context *ce,
228 			      struct i915_gem_ww_ctx *ww)
229 {
230 	bool handoff = false;
231 	void *vaddr;
232 	int err = 0;
233 
234 	if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
235 		err = intel_context_alloc_state(ce);
236 		if (err)
237 			return err;
238 	}
239 
240 	/*
241 	 * We always pin the context/ring/timeline here, to ensure a pin
242 	 * refcount for __intel_context_active(), which prevent a lock
243 	 * inversion of ce->pin_mutex vs dma_resv_lock().
244 	 */
245 
246 	err = i915_gem_object_lock(ce->timeline->hwsp_ggtt->obj, ww);
247 	if (!err)
248 		err = i915_gem_object_lock(ce->ring->vma->obj, ww);
249 	if (!err && ce->state)
250 		err = i915_gem_object_lock(ce->state->obj, ww);
251 	if (!err)
252 		err = intel_context_pre_pin(ce, ww);
253 	if (err)
254 		return err;
255 
256 	err = ce->ops->pre_pin(ce, ww, &vaddr);
257 	if (err)
258 		goto err_ctx_unpin;
259 
260 	err = i915_active_acquire(&ce->active);
261 	if (err)
262 		goto err_post_unpin;
263 
264 	err = mutex_lock_interruptible(&ce->pin_mutex);
265 	if (err)
266 		goto err_release;
267 
268 	intel_engine_pm_might_get(ce->engine);
269 
270 	if (unlikely(intel_context_is_closed(ce))) {
271 		err = -ENOENT;
272 		goto err_unlock;
273 	}
274 
275 	if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) {
276 		err = intel_context_active_acquire(ce);
277 		if (unlikely(err))
278 			goto err_unlock;
279 
280 		err = ce->ops->pin(ce, vaddr);
281 		if (err) {
282 			intel_context_active_release(ce);
283 			goto err_unlock;
284 		}
285 
286 		CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n",
287 			 i915_ggtt_offset(ce->ring->vma),
288 			 ce->ring->head, ce->ring->tail);
289 
290 		handoff = true;
291 		smp_mb__before_atomic(); /* flush pin before it is visible */
292 		atomic_inc(&ce->pin_count);
293 	}
294 
295 	GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */
296 
297 	trace_intel_context_do_pin(ce);
298 
299 err_unlock:
300 	mutex_unlock(&ce->pin_mutex);
301 err_release:
302 	i915_active_release(&ce->active);
303 err_post_unpin:
304 	if (!handoff)
305 		ce->ops->post_unpin(ce);
306 err_ctx_unpin:
307 	intel_context_post_unpin(ce);
308 
309 	/*
310 	 * Unlock the hwsp_ggtt object since it's shared.
311 	 * In principle we can unlock all the global state locked above
312 	 * since it's pinned and doesn't need fencing, and will
313 	 * thus remain resident until it is explicitly unpinned.
314 	 */
315 	i915_gem_ww_unlock_single(ce->timeline->hwsp_ggtt->obj);
316 
317 	return err;
318 }
319 
__intel_context_do_pin(struct intel_context * ce)320 int __intel_context_do_pin(struct intel_context *ce)
321 {
322 	struct i915_gem_ww_ctx ww;
323 	int err;
324 
325 	i915_gem_ww_ctx_init(&ww, true);
326 retry:
327 	err = __intel_context_do_pin_ww(ce, &ww);
328 	if (err == -EDEADLK) {
329 		err = i915_gem_ww_ctx_backoff(&ww);
330 		if (!err)
331 			goto retry;
332 	}
333 	i915_gem_ww_ctx_fini(&ww);
334 	return err;
335 }
336 
__intel_context_do_unpin(struct intel_context * ce,int sub)337 void __intel_context_do_unpin(struct intel_context *ce, int sub)
338 {
339 	if (!atomic_sub_and_test(sub, &ce->pin_count))
340 		return;
341 
342 	CE_TRACE(ce, "unpin\n");
343 	ce->ops->unpin(ce);
344 	ce->ops->post_unpin(ce);
345 
346 	/*
347 	 * Once released, we may asynchronously drop the active reference.
348 	 * As that may be the only reference keeping the context alive,
349 	 * take an extra now so that it is not freed before we finish
350 	 * dereferencing it.
351 	 */
352 	intel_context_get(ce);
353 	intel_context_active_release(ce);
354 	trace_intel_context_do_unpin(ce);
355 	intel_context_put(ce);
356 }
357 
__intel_context_retire(struct i915_active * active)358 static void __intel_context_retire(struct i915_active *active)
359 {
360 	struct intel_context *ce = container_of(active, typeof(*ce), active);
361 
362 	CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
363 		 intel_context_get_total_runtime_ns(ce),
364 		 intel_context_get_avg_runtime_ns(ce));
365 
366 	set_bit(CONTEXT_VALID_BIT, &ce->flags);
367 	intel_context_post_unpin(ce);
368 	intel_context_put(ce);
369 }
370 
__intel_context_active(struct i915_active * active)371 static int __intel_context_active(struct i915_active *active)
372 {
373 	struct intel_context *ce = container_of(active, typeof(*ce), active);
374 
375 	intel_context_get(ce);
376 
377 	/* everything should already be activated by intel_context_pre_pin() */
378 	GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active));
379 	__intel_ring_pin(ce->ring);
380 
381 	__intel_timeline_pin(ce->timeline);
382 
383 	if (ce->state) {
384 		GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active));
385 		__i915_vma_pin(ce->state);
386 		i915_vma_make_unshrinkable(ce->state);
387 	}
388 
389 	return 0;
390 }
391 
392 static int
sw_fence_dummy_notify(struct i915_sw_fence * sf,enum i915_sw_fence_notify state)393 sw_fence_dummy_notify(struct i915_sw_fence *sf,
394 		      enum i915_sw_fence_notify state)
395 {
396 	return NOTIFY_DONE;
397 }
398 
399 void
intel_context_init(struct intel_context * ce,struct intel_engine_cs * engine)400 intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine)
401 {
402 	GEM_BUG_ON(!engine->cops);
403 	GEM_BUG_ON(!engine->gt->vm);
404 
405 	kref_init(&ce->ref);
406 
407 	ce->engine = engine;
408 	ce->ops = engine->cops;
409 	ce->sseu = engine->sseu;
410 	ce->ring = NULL;
411 	ce->ring_size = SZ_4K;
412 
413 	ewma_runtime_init(&ce->stats.runtime.avg);
414 
415 	ce->vm = i915_vm_get(engine->gt->vm);
416 
417 	/* NB ce->signal_link/lock is used under RCU */
418 	mtx_init(&ce->signal_lock, IPL_NONE);
419 	INIT_LIST_HEAD(&ce->signals);
420 
421 	rw_init(&ce->pin_mutex, "cepin");
422 
423 	mtx_init(&ce->guc_state.lock, IPL_TTY);
424 	INIT_LIST_HEAD(&ce->guc_state.fences);
425 	INIT_LIST_HEAD(&ce->guc_state.requests);
426 
427 	ce->guc_id.id = GUC_INVALID_CONTEXT_ID;
428 	INIT_LIST_HEAD(&ce->guc_id.link);
429 
430 	INIT_LIST_HEAD(&ce->destroyed_link);
431 
432 	INIT_LIST_HEAD(&ce->parallel.child_list);
433 
434 	/*
435 	 * Initialize fence to be complete as this is expected to be complete
436 	 * unless there is a pending schedule disable outstanding.
437 	 */
438 	i915_sw_fence_init(&ce->guc_state.blocked,
439 			   sw_fence_dummy_notify);
440 	i915_sw_fence_commit(&ce->guc_state.blocked);
441 
442 	i915_active_init(&ce->active,
443 			 __intel_context_active, __intel_context_retire, 0);
444 }
445 
intel_context_fini(struct intel_context * ce)446 void intel_context_fini(struct intel_context *ce)
447 {
448 	struct intel_context *child, *next;
449 
450 	if (ce->timeline)
451 		intel_timeline_put(ce->timeline);
452 	i915_vm_put(ce->vm);
453 
454 	/* Need to put the creation ref for the children */
455 	if (intel_context_is_parent(ce))
456 		for_each_child_safe(ce, child, next)
457 			intel_context_put(child);
458 
459 	mutex_destroy(&ce->pin_mutex);
460 	i915_active_fini(&ce->active);
461 	i915_sw_fence_fini(&ce->guc_state.blocked);
462 }
463 
i915_context_module_exit(void)464 void i915_context_module_exit(void)
465 {
466 #ifdef __linux__
467 	kmem_cache_destroy(slab_ce);
468 #else
469 	pool_destroy(&slab_ce);
470 #endif
471 }
472 
i915_context_module_init(void)473 int __init i915_context_module_init(void)
474 {
475 #ifdef __linux__
476 	slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN);
477 	if (!slab_ce)
478 		return -ENOMEM;
479 #else
480 	pool_init(&slab_ce, sizeof(struct intel_context),
481 	    CACHELINESIZE, IPL_TTY, 0, "ictx", NULL);
482 #endif
483 
484 	return 0;
485 }
486 
intel_context_enter_engine(struct intel_context * ce)487 void intel_context_enter_engine(struct intel_context *ce)
488 {
489 	intel_engine_pm_get(ce->engine);
490 	intel_timeline_enter(ce->timeline);
491 }
492 
intel_context_exit_engine(struct intel_context * ce)493 void intel_context_exit_engine(struct intel_context *ce)
494 {
495 	intel_timeline_exit(ce->timeline);
496 	intel_engine_pm_put(ce->engine);
497 }
498 
intel_context_prepare_remote_request(struct intel_context * ce,struct i915_request * rq)499 int intel_context_prepare_remote_request(struct intel_context *ce,
500 					 struct i915_request *rq)
501 {
502 	struct intel_timeline *tl = ce->timeline;
503 	int err;
504 
505 	/* Only suitable for use in remotely modifying this context */
506 	GEM_BUG_ON(rq->context == ce);
507 
508 	if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */
509 		/* Queue this switch after current activity by this context. */
510 		err = i915_active_fence_set(&tl->last_request, rq);
511 		if (err)
512 			return err;
513 	}
514 
515 	/*
516 	 * Guarantee context image and the timeline remains pinned until the
517 	 * modifying request is retired by setting the ce activity tracker.
518 	 *
519 	 * But we only need to take one pin on the account of it. Or in other
520 	 * words transfer the pinned ce object to tracked active request.
521 	 */
522 	GEM_BUG_ON(i915_active_is_idle(&ce->active));
523 	return i915_active_add_request(&ce->active, rq);
524 }
525 
intel_context_create_request(struct intel_context * ce)526 struct i915_request *intel_context_create_request(struct intel_context *ce)
527 {
528 	struct i915_gem_ww_ctx ww;
529 	struct i915_request *rq;
530 	int err;
531 
532 	i915_gem_ww_ctx_init(&ww, true);
533 retry:
534 	err = intel_context_pin_ww(ce, &ww);
535 	if (!err) {
536 		rq = i915_request_create(ce);
537 		intel_context_unpin(ce);
538 	} else if (err == -EDEADLK) {
539 		err = i915_gem_ww_ctx_backoff(&ww);
540 		if (!err)
541 			goto retry;
542 		rq = ERR_PTR(err);
543 	} else {
544 		rq = ERR_PTR(err);
545 	}
546 
547 	i915_gem_ww_ctx_fini(&ww);
548 
549 	if (IS_ERR(rq))
550 		return rq;
551 
552 	/*
553 	 * timeline->mutex should be the inner lock, but is used as outer lock.
554 	 * Hack around this to shut up lockdep in selftests..
555 	 */
556 	lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie);
557 	mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_);
558 	mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_);
559 	rq->cookie = lockdep_pin_lock(&ce->timeline->mutex);
560 
561 	return rq;
562 }
563 
intel_context_get_active_request(struct intel_context * ce)564 struct i915_request *intel_context_get_active_request(struct intel_context *ce)
565 {
566 	struct intel_context *parent = intel_context_to_parent(ce);
567 	struct i915_request *rq, *active = NULL;
568 	unsigned long flags;
569 
570 	GEM_BUG_ON(!intel_engine_uses_guc(ce->engine));
571 
572 	/*
573 	 * We search the parent list to find an active request on the submitted
574 	 * context. The parent list contains the requests for all the contexts
575 	 * in the relationship so we have to do a compare of each request's
576 	 * context.
577 	 */
578 	spin_lock_irqsave(&parent->guc_state.lock, flags);
579 	list_for_each_entry_reverse(rq, &parent->guc_state.requests,
580 				    sched.link) {
581 		if (rq->context != ce)
582 			continue;
583 		if (i915_request_completed(rq))
584 			break;
585 
586 		active = rq;
587 	}
588 	if (active)
589 		active = i915_request_get_rcu(active);
590 	spin_unlock_irqrestore(&parent->guc_state.lock, flags);
591 
592 	return active;
593 }
594 
intel_context_bind_parent_child(struct intel_context * parent,struct intel_context * child)595 void intel_context_bind_parent_child(struct intel_context *parent,
596 				     struct intel_context *child)
597 {
598 	/*
599 	 * Callers responsibility to validate that this function is used
600 	 * correctly but we use GEM_BUG_ON here ensure that they do.
601 	 */
602 	GEM_BUG_ON(intel_context_is_pinned(parent));
603 	GEM_BUG_ON(intel_context_is_child(parent));
604 	GEM_BUG_ON(intel_context_is_pinned(child));
605 	GEM_BUG_ON(intel_context_is_child(child));
606 	GEM_BUG_ON(intel_context_is_parent(child));
607 
608 	parent->parallel.child_index = parent->parallel.number_children++;
609 	list_add_tail(&child->parallel.child_link,
610 		      &parent->parallel.child_list);
611 	child->parallel.parent = parent;
612 }
613 
intel_context_get_total_runtime_ns(struct intel_context * ce)614 u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
615 {
616 	u64 total, active;
617 
618 	if (ce->ops->update_stats)
619 		ce->ops->update_stats(ce);
620 
621 	total = ce->stats.runtime.total;
622 	if (ce->ops->flags & COPS_RUNTIME_CYCLES)
623 		total *= ce->engine->gt->clock_period_ns;
624 
625 	active = READ_ONCE(ce->stats.active);
626 	if (active)
627 		active = intel_context_clock() - active;
628 
629 	return total + active;
630 }
631 
intel_context_get_avg_runtime_ns(struct intel_context * ce)632 u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
633 {
634 	u64 avg = ewma_runtime_read(&ce->stats.runtime.avg);
635 
636 	if (ce->ops->flags & COPS_RUNTIME_CYCLES)
637 		avg *= ce->engine->gt->clock_period_ns;
638 
639 	return avg;
640 }
641 
intel_context_ban(struct intel_context * ce,struct i915_request * rq)642 bool intel_context_ban(struct intel_context *ce, struct i915_request *rq)
643 {
644 	bool ret = intel_context_set_banned(ce);
645 
646 	trace_intel_context_ban(ce);
647 
648 	if (ce->ops->revoke)
649 		ce->ops->revoke(ce, rq,
650 				INTEL_CONTEXT_BANNED_PREEMPT_TIMEOUT_MS);
651 
652 	return ret;
653 }
654 
intel_context_revoke(struct intel_context * ce)655 bool intel_context_revoke(struct intel_context *ce)
656 {
657 	bool ret = intel_context_set_exiting(ce);
658 
659 	if (ce->ops->revoke)
660 		ce->ops->revoke(ce, NULL, ce->engine->props.preempt_timeout_ms);
661 
662 	return ret;
663 }
664 
665 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
666 #include "selftest_context.c"
667 #endif
668