1 /******************************************************************************
2
3 Copyright (c) 2013-2019, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD$*/
34
35 #include <sys/limits.h>
36 #include <sys/time.h>
37
38 #include "ixl.h"
39
40 /********************************************************************
41 * Manage DMA'able memory.
42 *******************************************************************/
43 static void
i40e_dmamap_cb(void * arg,bus_dma_segment_t * segs,int nseg,int error)44 i40e_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error)
45 {
46 if (error)
47 return;
48 *(bus_addr_t *) arg = segs->ds_addr;
49 return;
50 }
51
52 i40e_status
i40e_allocate_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem,u32 size)53 i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)
54 {
55 mem->va = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
56 return(mem->va == NULL);
57 }
58
59 i40e_status
i40e_free_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem)60 i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
61 {
62 free(mem->va, M_DEVBUF);
63 mem->va = NULL;
64
65 return(0);
66 }
67
68 i40e_status
i40e_allocate_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem,enum i40e_memory_type type __unused,u64 size,u32 alignment)69 i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
70 enum i40e_memory_type type __unused, u64 size, u32 alignment)
71 {
72 device_t dev = ((struct i40e_osdep *)hw->back)->dev;
73 int err;
74
75
76 err = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
77 alignment, 0, /* alignment, bounds */
78 BUS_SPACE_MAXADDR, /* lowaddr */
79 BUS_SPACE_MAXADDR, /* highaddr */
80 NULL, NULL, /* filter, filterarg */
81 size, /* maxsize */
82 1, /* nsegments */
83 size, /* maxsegsize */
84 BUS_DMA_ALLOCNOW, /* flags */
85 NULL, /* lockfunc */
86 NULL, /* lockfuncarg */
87 &mem->tag);
88 if (err != 0) {
89 device_printf(dev,
90 "i40e_allocate_dma: bus_dma_tag_create failed, "
91 "error %u\n", err);
92 goto fail_0;
93 }
94 err = bus_dmamem_alloc(mem->tag, (void **)&mem->va,
95 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &mem->map);
96 if (err != 0) {
97 device_printf(dev,
98 "i40e_allocate_dma: bus_dmamem_alloc failed, "
99 "error %u\n", err);
100 goto fail_1;
101 }
102 err = bus_dmamap_load(mem->tag, mem->map, mem->va,
103 size,
104 i40e_dmamap_cb,
105 &mem->pa,
106 BUS_DMA_NOWAIT);
107 if (err != 0) {
108 device_printf(dev,
109 "i40e_allocate_dma: bus_dmamap_load failed, "
110 "error %u\n", err);
111 goto fail_2;
112 }
113 mem->nseg = 1;
114 mem->size = size;
115 bus_dmamap_sync(mem->tag, mem->map,
116 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
117 return (0);
118 fail_2:
119 bus_dmamem_free(mem->tag, mem->va, mem->map);
120 fail_1:
121 bus_dma_tag_destroy(mem->tag);
122 fail_0:
123 mem->map = NULL;
124 mem->tag = NULL;
125 return (err);
126 }
127
128 i40e_status
i40e_free_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem)129 i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
130 {
131 bus_dmamap_sync(mem->tag, mem->map,
132 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
133 bus_dmamap_unload(mem->tag, mem->map);
134 bus_dmamem_free(mem->tag, mem->va, mem->map);
135 bus_dma_tag_destroy(mem->tag);
136 return (0);
137 }
138
139 void
i40e_init_spinlock(struct i40e_spinlock * lock)140 i40e_init_spinlock(struct i40e_spinlock *lock)
141 {
142 mtx_init(&lock->mutex, "mutex",
143 "ixl spinlock", MTX_DEF | MTX_DUPOK);
144 }
145
146 void
i40e_acquire_spinlock(struct i40e_spinlock * lock)147 i40e_acquire_spinlock(struct i40e_spinlock *lock)
148 {
149 mtx_lock(&lock->mutex);
150 }
151
152 void
i40e_release_spinlock(struct i40e_spinlock * lock)153 i40e_release_spinlock(struct i40e_spinlock *lock)
154 {
155 mtx_unlock(&lock->mutex);
156 }
157
158 void
i40e_destroy_spinlock(struct i40e_spinlock * lock)159 i40e_destroy_spinlock(struct i40e_spinlock *lock)
160 {
161 if (mtx_initialized(&lock->mutex))
162 mtx_destroy(&lock->mutex);
163 }
164
165 #ifndef MSEC_2_TICKS
166 #define MSEC_2_TICKS(m) max(1, (uint32_t)((hz == 1000) ? \
167 (m) : ((uint64_t)(m) * (uint64_t)hz)/(uint64_t)1000))
168 #endif
169
170 void
i40e_msec_pause(int msecs)171 i40e_msec_pause(int msecs)
172 {
173 pause("i40e_msec_pause", MSEC_2_TICKS(msecs));
174 }
175
176 /*
177 * Helper function for debug statement printing
178 */
179 void
i40e_debug_shared(struct i40e_hw * hw,enum i40e_debug_mask mask,char * fmt,...)180 i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...)
181 {
182 va_list args;
183 device_t dev;
184
185 if (!(mask & ((struct i40e_hw *)hw)->debug_mask))
186 return;
187
188 dev = ((struct i40e_osdep *)hw->back)->dev;
189
190 /* Re-implement device_printf() */
191 device_print_prettyname(dev);
192 va_start(args, fmt);
193 vprintf(fmt, args);
194 va_end(args);
195 }
196
197 const char *
ixl_vc_opcode_str(uint16_t op)198 ixl_vc_opcode_str(uint16_t op)
199 {
200 switch (op) {
201 case VIRTCHNL_OP_VERSION:
202 return ("VERSION");
203 case VIRTCHNL_OP_RESET_VF:
204 return ("RESET_VF");
205 case VIRTCHNL_OP_GET_VF_RESOURCES:
206 return ("GET_VF_RESOURCES");
207 case VIRTCHNL_OP_CONFIG_TX_QUEUE:
208 return ("CONFIG_TX_QUEUE");
209 case VIRTCHNL_OP_CONFIG_RX_QUEUE:
210 return ("CONFIG_RX_QUEUE");
211 case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
212 return ("CONFIG_VSI_QUEUES");
213 case VIRTCHNL_OP_CONFIG_IRQ_MAP:
214 return ("CONFIG_IRQ_MAP");
215 case VIRTCHNL_OP_ENABLE_QUEUES:
216 return ("ENABLE_QUEUES");
217 case VIRTCHNL_OP_DISABLE_QUEUES:
218 return ("DISABLE_QUEUES");
219 case VIRTCHNL_OP_ADD_ETH_ADDR:
220 return ("ADD_ETH_ADDR");
221 case VIRTCHNL_OP_DEL_ETH_ADDR:
222 return ("DEL_ETH_ADDR");
223 case VIRTCHNL_OP_ADD_VLAN:
224 return ("ADD_VLAN");
225 case VIRTCHNL_OP_DEL_VLAN:
226 return ("DEL_VLAN");
227 case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
228 return ("CONFIG_PROMISCUOUS_MODE");
229 case VIRTCHNL_OP_GET_STATS:
230 return ("GET_STATS");
231 case VIRTCHNL_OP_RSVD:
232 return ("RSVD");
233 case VIRTCHNL_OP_EVENT:
234 return ("EVENT");
235 case VIRTCHNL_OP_CONFIG_RSS_KEY:
236 return ("CONFIG_RSS_KEY");
237 case VIRTCHNL_OP_CONFIG_RSS_LUT:
238 return ("CONFIG_RSS_LUT");
239 case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
240 return ("GET_RSS_HENA_CAPS");
241 case VIRTCHNL_OP_SET_RSS_HENA:
242 return ("SET_RSS_HENA");
243 default:
244 return ("UNKNOWN");
245 }
246 }
247
248 u16
i40e_read_pci_cfg(struct i40e_hw * hw,u32 reg)249 i40e_read_pci_cfg(struct i40e_hw *hw, u32 reg)
250 {
251 u16 value;
252
253 value = pci_read_config(((struct i40e_osdep *)hw->back)->dev,
254 reg, 2);
255
256 return (value);
257 }
258
259 void
i40e_write_pci_cfg(struct i40e_hw * hw,u32 reg,u16 value)260 i40e_write_pci_cfg(struct i40e_hw *hw, u32 reg, u16 value)
261 {
262 pci_write_config(((struct i40e_osdep *)hw->back)->dev,
263 reg, value, 2);
264
265 return;
266 }
267
268