1 /******************************************************************************
2
3 Copyright (c) 2013-2015, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD$*/
34
35 #ifndef _I40E_OSDEP_H_
36 #define _I40E_OSDEP_H_
37
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/endian.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
56
57 #define ASSERT(x) if(!(x)) panic("IXL: x")
58
59 #define i40e_usec_delay(x) DELAY(x)
60 #define i40e_msec_delay(x) DELAY(1000*(x))
61
62 #define DBG 0
63 #define MSGOUT(S, A, B) printf(S "\n", A, B)
64 #define DEBUGFUNC(F) DEBUGOUT(F);
65 #if DBG
66 #define DEBUGOUT(S) printf(S "\n")
67 #define DEBUGOUT1(S,A) printf(S "\n",A)
68 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
69 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
70 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
71 #else
72 #define DEBUGOUT(S)
73 #define DEBUGOUT1(S,A)
74 #define DEBUGOUT2(S,A,B)
75 #define DEBUGOUT3(S,A,B,C)
76 #define DEBUGOUT6(S,A,B,C,D,E,F)
77 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
78 #endif
79
80 #define UNREFERENCED_XPARAMETER
81 #define UNREFERENCED_PARAMETER(_p)
82 #define UNREFERENCED_1PARAMETER(_p)
83 #define UNREFERENCED_2PARAMETER(_p, _q)
84 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
85 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
86
87 #define STATIC static
88 #define INLINE inline
89
90 #define FALSE 0
91 #define false 0 /* shared code requires this */
92 #define TRUE 1
93 #define true 1
94 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
95 #define PCI_COMMAND_REGISTER PCIR_COMMAND
96 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
97
98 #define i40e_memset(a, b, c, d) memset((a), (b), (c))
99 #define i40e_memcpy(a, b, c, d) memcpy((a), (b), (c))
100
101 #define CPU_TO_LE16(o) htole16(o)
102 #define CPU_TO_LE32(s) htole32(s)
103 #define CPU_TO_LE64(h) htole64(h)
104 #define LE16_TO_CPU(a) le16toh(a)
105 #define LE32_TO_CPU(c) le32toh(c)
106 #define LE64_TO_CPU(k) le64toh(k)
107
108 #define I40E_NTOHS(a) ntohs(a)
109 #define I40E_NTOHL(a) ntohl(a)
110 #define I40E_HTONS(a) htons(a)
111 #define I40E_HTONL(a) htonl(a)
112
113 #define FIELD_SIZEOF(x, y) (sizeof(((x*)0)->y))
114
115 #define BIT(a) (1UL << (a))
116 #define BIT_ULL(a) (1ULL << (a))
117
118 typedef uint8_t u8;
119 typedef int8_t s8;
120 typedef uint16_t u16;
121 typedef int16_t s16;
122 typedef uint32_t u32;
123 typedef int32_t s32;
124 typedef uint64_t u64;
125
126 /* long string relief */
127 typedef enum i40e_status_code i40e_status;
128
129 #define __le16 u16
130 #define __le32 u32
131 #define __le64 u64
132 #define __be16 u16
133 #define __be32 u32
134 #define __be64 u64
135
136 /* SW spinlock */
137 struct i40e_spinlock {
138 struct mtx mutex;
139 };
140
141 #define le16_to_cpu
142
143 #if defined(__amd64__) || defined(i386)
144 static __inline
prefetch(void * x)145 void prefetch(void *x)
146 {
147 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
148 }
149 #else
150 #define prefetch(x)
151 #endif
152
153 struct i40e_osdep {
154 bus_space_tag_t mem_bus_space_tag;
155 bus_space_handle_t mem_bus_space_handle;
156 bus_size_t mem_bus_space_size;
157 uint32_t flush_reg;
158 struct device *dev;
159 };
160
161 struct i40e_dma_mem {
162 void *va;
163 u64 pa;
164 bus_dma_tag_t tag;
165 bus_dmamap_t map;
166 bus_dma_segment_t seg;
167 bus_size_t size;
168 int nseg;
169 int flags;
170 };
171
172 struct i40e_hw; /* forward decl */
173 u16 i40e_read_pci_cfg(struct i40e_hw *, u32);
174 void i40e_write_pci_cfg(struct i40e_hw *, u32, u16);
175
176 #define i40e_debug(h, m, s, ...) i40e_debug_d(h, m, s, ##__VA_ARGS__)
177 extern void i40e_debug_d(void *hw, u32 mask, char *fmt_str, ...);
178
179 struct i40e_virt_mem {
180 void *va;
181 u32 size;
182 };
183
184 /*
185 ** This hardware supports either 16 or 32 byte rx descriptors
186 ** we default here to the larger size.
187 */
188 #define i40e_rx_desc i40e_32byte_rx_desc
189
190 static __inline uint32_t
rd32_osdep(struct i40e_osdep * osdep,uint32_t reg)191 rd32_osdep(struct i40e_osdep *osdep, uint32_t reg)
192 {
193
194 KASSERT(reg < osdep->mem_bus_space_size,
195 ("ixl: register offset %#jx too large (max is %#jx)",
196 (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
197
198 return (bus_space_read_4(osdep->mem_bus_space_tag,
199 osdep->mem_bus_space_handle, reg));
200 }
201
202 static __inline void
wr32_osdep(struct i40e_osdep * osdep,uint32_t reg,uint32_t value)203 wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value)
204 {
205
206 KASSERT(reg < osdep->mem_bus_space_size,
207 ("ixl: register offset %#jx too large (max is %#jx)",
208 (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
209
210 bus_space_write_4(osdep->mem_bus_space_tag,
211 osdep->mem_bus_space_handle, reg, value);
212 }
213
214 static __inline void
ixl_flush_osdep(struct i40e_osdep * osdep)215 ixl_flush_osdep(struct i40e_osdep *osdep)
216 {
217 rd32_osdep(osdep, osdep->flush_reg);
218 }
219
220 #define rd32(a, reg) rd32_osdep((a)->back, (reg))
221 #define wr32(a, reg, value) wr32_osdep((a)->back, (reg), (value))
222
223 #define rd64(a, reg) (\
224 bus_space_read_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
225 ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
226 reg))
227
228 #define wr64(a, reg, value) (\
229 bus_space_write_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
230 ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
231 reg, value))
232
233 #define ixl_flush(a) ixl_flush_osdep((a)->back)
234
235 #endif /* _I40E_OSDEP_H_ */
236