1 /* $NetBSD: gpio.c,v 1.75 2024/12/17 12:39:39 martin Exp $ */
2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */
3
4 /*
5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc@msys.ch>
6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 #ifdef _KERNEL_OPT
22 #include "opt_fdt.h"
23 #endif
24
25 #include <sys/cdefs.h>
26 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.75 2024/12/17 12:39:39 martin Exp $");
27
28 /*
29 * General Purpose Input/Output framework.
30 */
31
32 #include <sys/param.h>
33 #include <sys/callout.h>
34 #include <sys/systm.h>
35 #include <sys/conf.h>
36 #include <sys/device.h>
37 #include <sys/fcntl.h>
38 #include <sys/ioctl.h>
39 #include <sys/gpio.h>
40 #include <sys/kernel.h>
41 #include <sys/vnode.h>
42 #include <sys/kmem.h>
43 #include <sys/mutex.h>
44 #include <sys/condvar.h>
45 #include <sys/queue.h>
46 #include <sys/kauth.h>
47 #include <sys/module.h>
48
49 #include <dev/gpio/gpiovar.h>
50
51 #ifdef FDT
52 #include <dev/fdt/fdtvar.h>
53 #endif
54
55 #include "ioconf.h"
56 #include "locators.h"
57
58 #ifdef GPIO_DEBUG
59 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0)
60 int gpiodebug = 0;
61 #else
62 #define DPRINTFN(n, x)
63 #endif
64 #define DPRINTF(x) DPRINTFN(0, x)
65
66 struct gpio_softc {
67 device_t sc_dev;
68
69 gpio_chipset_tag_t sc_gc; /* GPIO controller */
70 gpio_pin_t *sc_pins; /* pins array */
71 int sc_npins; /* number of pins */
72
73 kmutex_t sc_mtx;
74 kcondvar_t sc_ioctl; /* ioctl in progress */
75 int sc_ioctl_busy; /* ioctl is busy */
76 kcondvar_t sc_attach; /* attach/detach in progress */
77 int sc_attach_busy;/* busy in attach/detach */
78 #ifdef COMPAT_50
79 LIST_HEAD(, gpio_dev) sc_devs; /* devices */
80 #endif
81 LIST_HEAD(, gpio_name) sc_names; /* named pins */
82 };
83
84 static int gpio_match(device_t, cfdata_t, void *);
85 int gpio_submatch(device_t, cfdata_t, const int *, void *);
86 static void gpio_attach(device_t, device_t, void *);
87 static int gpio_rescan(device_t, const char *, const int *);
88 static void gpio_childdetached(device_t, device_t);
89 static bool gpio_resume(device_t, const pmf_qual_t *);
90 static int gpio_detach(device_t, int);
91 static int gpio_search(device_t, cfdata_t, const int *, void *);
92 static int gpio_print(void *, const char *);
93 static int gpio_pinbyname(struct gpio_softc *, char *);
94 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int,
95 struct lwp *);
96
97 #ifdef COMPAT_50
98 /* Old API */
99 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int,
100 struct lwp *);
101 #endif
102
103 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc),
104 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan,
105 gpio_childdetached, DVF_DETACH_SHUTDOWN);
106
107 dev_type_open(gpioopen);
108 dev_type_close(gpioclose);
109 dev_type_ioctl(gpioioctl);
110 dev_type_ioctl(gpioioctl_locked);
111
112 const struct cdevsw gpio_cdevsw = {
113 .d_open = gpioopen,
114 .d_close = gpioclose,
115 .d_read = noread,
116 .d_write = nowrite,
117 .d_ioctl = gpioioctl,
118 .d_stop = nostop,
119 .d_tty = notty,
120 .d_poll = nopoll,
121 .d_mmap = nommap,
122 .d_kqfilter = nokqfilter,
123 .d_discard = nodiscard,
124 .d_flag = D_OTHER | D_MPSAFE
125 };
126
127 static int
gpio_match(device_t parent,cfdata_t cf,void * aux)128 gpio_match(device_t parent, cfdata_t cf, void *aux)
129 {
130 return 1;
131 }
132
133 int
gpio_submatch(device_t parent,cfdata_t cf,const int * ip,void * aux)134 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux)
135 {
136 struct gpio_attach_args *ga = aux;
137
138 if (ga->ga_offset == -1)
139 return 0;
140
141 return strcmp(ga->ga_dvname, cf->cf_name) == 0;
142 }
143
144 static bool
gpio_resume(device_t self,const pmf_qual_t * qual)145 gpio_resume(device_t self, const pmf_qual_t *qual)
146 {
147 struct gpio_softc *sc = device_private(self);
148 int pin;
149
150 for (pin = 0; pin < sc->sc_npins; pin++) {
151 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags);
152 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state);
153 }
154 return true;
155 }
156
157 static void
gpio_childdetached(device_t self,device_t child)158 gpio_childdetached(device_t self, device_t child)
159 {
160 #ifdef COMPAT_50
161 struct gpio_dev *gdev;
162 struct gpio_softc *sc;
163 int error;
164
165 /*
166 * gpio_childetached is serialized because it can be entered in
167 * different ways concurrently, e.g. via the GPIODETACH ioctl and
168 * drvctl(8) or modunload(8).
169 */
170 sc = device_private(self);
171 error = 0;
172 mutex_enter(&sc->sc_mtx);
173 while (sc->sc_attach_busy) {
174 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
175 if (error)
176 break;
177 }
178 if (!error)
179 sc->sc_attach_busy = 1;
180 mutex_exit(&sc->sc_mtx);
181 if (error)
182 return;
183
184 KERNEL_LOCK(1, NULL);
185 LIST_FOREACH(gdev, &sc->sc_devs, sc_next)
186 if (gdev->sc_dev == child) {
187 LIST_REMOVE(gdev, sc_next);
188 kmem_free(gdev, sizeof(struct gpio_dev));
189 break;
190 }
191 KERNEL_UNLOCK_ONE(NULL);
192
193 mutex_enter(&sc->sc_mtx);
194 sc->sc_attach_busy = 0;
195 cv_signal(&sc->sc_attach);
196 mutex_exit(&sc->sc_mtx);
197 #endif
198 }
199
200 static int
gpio_rescan(device_t self,const char * ifattr,const int * locators)201 gpio_rescan(device_t self, const char *ifattr, const int *locators)
202 {
203
204 KERNEL_LOCK(1, NULL);
205 config_search(self, NULL,
206 CFARGS(.search = gpio_search));
207 KERNEL_UNLOCK_ONE(NULL);
208
209 return 0;
210 }
211
212 static const char *
gpio_pin_defname(struct gpio_softc * sc,int pin)213 gpio_pin_defname(struct gpio_softc *sc, int pin)
214 {
215 KASSERT(pin >= 0);
216
217 #ifdef FDT
218 devhandle_t devhandle = device_handle(sc->sc_dev);
219
220 if (devhandle_type(devhandle) == DEVHANDLE_TYPE_OF) {
221 return fdtbus_get_string_index(devhandle_to_of(devhandle),
222 "gpio-line-names", pin);
223 }
224 #endif /* FDT */
225
226 return NULL;
227 }
228
229 static void
gpio_attach(device_t parent,device_t self,void * aux)230 gpio_attach(device_t parent, device_t self, void *aux)
231 {
232 struct gpio_softc *sc = device_private(self);
233 struct gpiobus_attach_args *gba = aux;
234 struct gpio_name *nm;
235 int pin;
236
237 sc->sc_dev = self;
238 sc->sc_gc = gba->gba_gc;
239 sc->sc_pins = gba->gba_pins;
240 sc->sc_npins = gba->gba_npins;
241
242 aprint_normal(": %d pins\n", sc->sc_npins);
243 aprint_naive("\n");
244
245 /* Configure default pin names */
246 for (pin = 0; pin < sc->sc_npins; pin++) {
247 const char *defname;
248
249 defname = gpio_pin_defname(sc, pin);
250 if (defname == NULL &&
251 sc->sc_pins[pin].pin_defname[0] != '\0') {
252 defname = sc->sc_pins[pin].pin_defname;
253 }
254 if (defname == NULL) {
255 continue;
256 }
257 nm = kmem_alloc(sizeof(*nm), KM_SLEEP);
258 strlcpy(nm->gp_name, defname, sizeof(nm->gp_name));
259 nm->gp_pin = pin;
260 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
261 }
262
263 if (!pmf_device_register(self, NULL, gpio_resume))
264 aprint_error_dev(self, "couldn't establish power handler\n");
265 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
266 cv_init(&sc->sc_ioctl, "gpioctl");
267 cv_init(&sc->sc_attach, "gpioatch");
268 /*
269 * Attach all devices that can be connected to the GPIO pins
270 * described in the kernel configuration file.
271 */
272 gpio_rescan(self, "gpio", NULL);
273 }
274
275 static int
gpio_detach(device_t self,int flags)276 gpio_detach(device_t self, int flags)
277 {
278 struct gpio_softc *sc;
279 int rc;
280
281 sc = device_private(self);
282
283 if ((rc = config_detach_children(self, flags)) != 0)
284 return rc;
285 mutex_destroy(&sc->sc_mtx);
286 cv_destroy(&sc->sc_ioctl);
287 #if 0
288 int maj, mn;
289
290 /* Locate the major number */
291 for (maj = 0; maj < nchrdev; maj++)
292 if (cdevsw[maj].d_open == gpioopen)
293 break;
294
295 /* Nuke the vnodes for any open instances (calls close) */
296 mn = device_unit(self);
297 vdevgone(maj, mn, mn, VCHR);
298 #endif
299 return 0;
300 }
301
302 static int
gpio_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)303 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
304 {
305 struct gpio_attach_args ga;
306 size_t namlen;
307
308 ga.ga_gpio = device_private(parent);
309 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET];
310 ga.ga_mask = cf->cf_loc[GPIOCF_MASK];
311 ga.ga_flags = cf->cf_loc[GPIOCF_FLAG];
312 namlen = strlen(cf->cf_name) + 1;
313 ga.ga_dvname = kmem_alloc(namlen, KM_SLEEP);
314 strcpy(ga.ga_dvname, cf->cf_name);
315
316 if (config_probe(parent, cf, &ga))
317 config_attach(parent, cf, &ga, gpio_print, CFARGS_NONE);
318 kmem_free(ga.ga_dvname, namlen);
319 return 0;
320 }
321
322 int
gpio_print(void * aux,const char * pnp)323 gpio_print(void *aux, const char *pnp)
324 {
325 struct gpio_attach_args *ga = aux;
326 int i;
327
328 aprint_normal(" pins");
329 for (i = 0; i < 32; i++)
330 if (ga->ga_mask & (1 << i))
331 aprint_normal(" %d", ga->ga_offset + i);
332
333 return UNCONF;
334 }
335
336 void *
gpio_find_device(const char * name)337 gpio_find_device(const char *name)
338 {
339 device_t gpio_dev;
340 gpio_dev = device_find_by_xname(name);
341 if (gpio_dev == NULL)
342 return NULL;
343 return device_private(gpio_dev);
344 }
345
346 const char *
gpio_get_name(void * gpio)347 gpio_get_name(void *gpio)
348 {
349 struct gpio_softc *sc = gpio;
350 return device_xname(sc->sc_dev);
351 }
352
353 /* return 1 if all pins can be mapped, 0 if not */
354 int
gpio_pin_can_map(void * gpio,int offset,uint32_t mask)355 gpio_pin_can_map(void *gpio, int offset, uint32_t mask)
356 {
357 struct gpio_softc *sc = gpio;
358 int npins, pin, i;
359
360 npins = gpio_npins(mask);
361 if (npins > sc->sc_npins)
362 return 0;
363
364 for (npins = 0, i = 0; i < 32; i++)
365 if (mask & (1 << i)) {
366 pin = offset + i;
367 if (pin < 0 || pin >= sc->sc_npins)
368 return 0;
369 if (sc->sc_pins[pin].pin_mapped)
370 return 0;
371 }
372
373 return 1;
374 }
375
376 int
gpio_pin_map(void * gpio,int offset,uint32_t mask,struct gpio_pinmap * map)377 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map)
378 {
379 struct gpio_softc *sc = gpio;
380 int npins, pin, i;
381
382 npins = gpio_npins(mask);
383 if (npins > sc->sc_npins)
384 return 1;
385
386 for (npins = 0, i = 0; i < 32; i++)
387 if (mask & (1 << i)) {
388 pin = offset + i;
389 if (pin < 0 || pin >= sc->sc_npins)
390 return 1;
391 if (sc->sc_pins[pin].pin_mapped)
392 return 1;
393 sc->sc_pins[pin].pin_mapped = 1;
394 map->pm_map[npins++] = pin;
395 }
396 map->pm_size = npins;
397
398 return 0;
399 }
400
401 void
gpio_pin_unmap(void * gpio,struct gpio_pinmap * map)402 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map)
403 {
404 struct gpio_softc *sc = gpio;
405 int pin, i;
406
407 for (i = 0; i < map->pm_size; i++) {
408 pin = map->pm_map[i];
409 sc->sc_pins[pin].pin_mapped = 0;
410 }
411 }
412
413 int
gpio_pin_read(void * gpio,struct gpio_pinmap * map,int pin)414 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin)
415 {
416 struct gpio_softc *sc = gpio;
417
418 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]);
419 }
420
421 void
gpio_pin_write(void * gpio,struct gpio_pinmap * map,int pin,int value)422 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value)
423 {
424 struct gpio_softc *sc = gpio;
425
426 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value);
427 sc->sc_pins[map->pm_map[pin]].pin_state = value;
428 }
429
430 int
gpio_pin_get_conf(void * gpio,struct gpio_pinmap * map,int pin)431 gpio_pin_get_conf(void *gpio, struct gpio_pinmap *map, int pin)
432 {
433 struct gpio_softc *sc = gpio;
434 int rv;
435
436 mutex_enter(&sc->sc_mtx);
437 rv = sc->sc_pins[map->pm_map[pin]].pin_flags;
438 mutex_exit(&sc->sc_mtx);
439
440 return (rv);
441 }
442
443 bool
gpio_pin_set_conf(void * gpio,struct gpio_pinmap * map,int pin,int flags)444 gpio_pin_set_conf(void *gpio, struct gpio_pinmap *map, int pin, int flags)
445 {
446 struct gpio_softc *sc = gpio;
447 int checkflags = flags & GPIO_PIN_HWCAPS;
448
449 if ((sc->sc_pins[map->pm_map[pin]].pin_caps & checkflags) != checkflags)
450 return (false);
451
452 gpio_pin_ctl(gpio, map, pin, flags);
453
454 return (true);
455 }
456
457 void
gpio_pin_ctl(void * gpio,struct gpio_pinmap * map,int pin,int flags)458 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags)
459 {
460 struct gpio_softc *sc = gpio;
461
462 /* loosey-goosey version of gpio_pin_set_conf(). */
463
464 mutex_enter(&sc->sc_mtx);
465 gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags);
466 sc->sc_pins[map->pm_map[pin]].pin_flags = flags;
467 mutex_exit(&sc->sc_mtx);
468 }
469
470 int
gpio_pin_caps(void * gpio,struct gpio_pinmap * map,int pin)471 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin)
472 {
473 struct gpio_softc *sc = gpio;
474
475 return sc->sc_pins[map->pm_map[pin]].pin_caps;
476 }
477
478 int
gpio_pin_intrcaps(void * gpio,struct gpio_pinmap * map,int pin)479 gpio_pin_intrcaps(void *gpio, struct gpio_pinmap *map, int pin)
480 {
481 struct gpio_softc *sc = gpio;
482
483 return sc->sc_pins[map->pm_map[pin]].pin_intrcaps;
484 }
485
486 static int
gpio_irqmode_sanitize(int irqmode)487 gpio_irqmode_sanitize(int irqmode)
488 {
489 int has_edge, has_level;
490
491 has_edge = irqmode & GPIO_INTR_EDGE_MASK;
492 has_level = irqmode & GPIO_INTR_LEVEL_MASK;
493
494 /* Must specify an interrupt mode. */
495 if ((irqmode & GPIO_INTR_MODE_MASK) == 0)
496 return (0);
497
498 /* Can't specify edge and level together */
499 if (has_level && has_edge)
500 return (0);
501
502 /* "Be liberal in what you accept..." */
503 if (has_edge) {
504 if (irqmode & GPIO_INTR_DOUBLE_EDGE) {
505 /* if DOUBLE is set, just pass through DOUBLE */
506 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) |
507 GPIO_INTR_DOUBLE_EDGE;
508 } else if ((irqmode ^
509 (GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE)) == 0) {
510 /* both POS and NEG set; treat as DOUBLE */
511 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) |
512 GPIO_INTR_DOUBLE_EDGE;
513 }
514 } else {
515 /* Can't specify both levels together. */
516 if (has_level == GPIO_INTR_LEVEL_MASK)
517 return (0);
518 }
519
520 return (irqmode);
521 }
522
523 bool
gpio_pin_irqmode_issupported(void * gpio,struct gpio_pinmap * map,int pin,int irqmode)524 gpio_pin_irqmode_issupported(void *gpio, struct gpio_pinmap *map,
525 int pin, int irqmode)
526 {
527 struct gpio_softc *sc = gpio;
528 int match;
529
530 irqmode = gpio_irqmode_sanitize(irqmode) & GPIO_INTR_MODE_MASK;
531
532 /* Make sure the pin can do what is being asked. */
533 match = sc->sc_pins[map->pm_map[pin]].pin_intrcaps & irqmode;
534
535 return (irqmode && irqmode == match);
536 }
537
538 void *
gpio_intr_establish(void * gpio,struct gpio_pinmap * map,int pin,int ipl,int irqmode,int (* func)(void *),void * arg)539 gpio_intr_establish(void *gpio, struct gpio_pinmap *map, int pin, int ipl,
540 int irqmode, int (*func)(void *), void *arg)
541 {
542 struct gpio_softc *sc = gpio;
543
544 if (sc->sc_gc->gp_intr_establish == NULL)
545 return (NULL);
546
547 irqmode = gpio_irqmode_sanitize(irqmode);
548 if (irqmode == 0)
549 return (NULL);
550
551 if (! gpio_pin_irqmode_issupported(gpio, map, pin, irqmode))
552 return (NULL);
553
554 /* XXX Right now, everything has to be at IPL_VM. */
555 if (ipl != IPL_VM)
556 return (NULL);
557
558 return ((*sc->sc_gc->gp_intr_establish)(sc->sc_gc->gp_cookie,
559 sc->sc_pins[map->pm_map[pin]].pin_num, ipl, irqmode, func, arg));
560 }
561
562 void
gpio_intr_disestablish(void * gpio,void * ih)563 gpio_intr_disestablish(void *gpio, void *ih)
564 {
565 struct gpio_softc *sc = gpio;
566
567 if (sc->sc_gc->gp_intr_disestablish != NULL && ih != NULL)
568 (*sc->sc_gc->gp_intr_disestablish)(sc->sc_gc->gp_cookie, ih);
569 }
570
571 bool
gpio_intr_str(void * gpio,struct gpio_pinmap * map,int pin,int irqmode,char * intrstr,size_t intrstrlen)572 gpio_intr_str(void *gpio, struct gpio_pinmap *map, int pin, int irqmode,
573 char *intrstr, size_t intrstrlen)
574 {
575 struct gpio_softc *sc = gpio;
576 const char *mode;
577 char hwstr[64];
578
579 if (sc->sc_gc->gp_intr_str == NULL)
580 return (false);
581
582 irqmode = gpio_irqmode_sanitize(irqmode);
583 if (irqmode == 0)
584 return (false);
585
586 if (irqmode & GPIO_INTR_DOUBLE_EDGE)
587 mode = "double edge";
588 else if (irqmode & GPIO_INTR_POS_EDGE)
589 mode = "positive edge";
590 else if (irqmode & GPIO_INTR_NEG_EDGE)
591 mode = "negative edge";
592 else if (irqmode & GPIO_INTR_HIGH_LEVEL)
593 mode = "high level";
594 else if (irqmode & GPIO_INTR_LOW_LEVEL)
595 mode = "low level";
596 else
597 return (false);
598
599 if (! (*sc->sc_gc->gp_intr_str)(sc->sc_gc->gp_cookie,
600 sc->sc_pins[map->pm_map[pin]].pin_num,
601 irqmode, hwstr, sizeof(hwstr)))
602 return (false);
603
604 (void) snprintf(intrstr, intrstrlen, "%s (%s)", hwstr, mode);
605
606 return (true);
607 }
608
609 void
gpio_intr_mask(void * gpio,void * ih)610 gpio_intr_mask(void *gpio, void *ih)
611 {
612 struct gpio_softc *sc = gpio;
613
614 if (sc->sc_gc->gp_intr_mask == NULL)
615 return;
616
617 sc->sc_gc->gp_intr_mask(sc->sc_gc->gp_cookie, ih);
618 }
619
620 void
gpio_intr_unmask(void * gpio,void * ih)621 gpio_intr_unmask(void *gpio, void *ih)
622 {
623 struct gpio_softc *sc = gpio;
624
625 if (sc->sc_gc->gp_intr_unmask == NULL)
626 return;
627
628 sc->sc_gc->gp_intr_unmask(sc->sc_gc->gp_cookie, ih);
629 }
630
631 int
gpio_pin_to_pin_num(void * gpio,struct gpio_pinmap * map,int pin)632 gpio_pin_to_pin_num(void *gpio, struct gpio_pinmap *map, int pin)
633 {
634 struct gpio_softc *sc = gpio;
635
636 return sc->sc_pins[map->pm_map[pin]].pin_num;
637 }
638
639 int
gpio_npins(uint32_t mask)640 gpio_npins(uint32_t mask)
641 {
642 int npins, i;
643
644 for (npins = 0, i = 0; i < 32; i++)
645 if (mask & (1 << i))
646 npins++;
647
648 return npins;
649 }
650
651 int
gpio_lock(void * data)652 gpio_lock(void *data)
653 {
654 struct gpio_softc *sc;
655 int error;
656
657 error = 0;
658 sc = data;
659 mutex_enter(&sc->sc_mtx);
660 while (sc->sc_ioctl_busy) {
661 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx);
662 if (error)
663 break;
664 }
665 if (!error)
666 sc->sc_ioctl_busy = 1;
667 mutex_exit(&sc->sc_mtx);
668 return error;
669 }
670
671 void
gpio_unlock(void * data)672 gpio_unlock(void *data)
673 {
674 struct gpio_softc *sc;
675
676 sc = data;
677 mutex_enter(&sc->sc_mtx);
678 sc->sc_ioctl_busy = 0;
679 cv_signal(&sc->sc_ioctl);
680 mutex_exit(&sc->sc_mtx);
681 }
682
683 int
gpioopen(dev_t dev,int flag,int mode,struct lwp * l)684 gpioopen(dev_t dev, int flag, int mode, struct lwp *l)
685 {
686 struct gpio_softc *sc;
687
688 sc = device_lookup_private(&gpio_cd, minor(dev));
689 if (sc == NULL)
690 return ENXIO;
691
692 return gpiobus_open(sc->sc_gc, sc->sc_dev);
693 }
694
695 int
gpioclose(dev_t dev,int flag,int mode,struct lwp * l)696 gpioclose(dev_t dev, int flag, int mode, struct lwp *l)
697 {
698 struct gpio_softc *sc;
699
700 sc = device_lookup_private(&gpio_cd, minor(dev));
701 return gpiobus_close(sc->sc_gc, sc->sc_dev);
702 }
703
704 static int
gpio_pinbyname(struct gpio_softc * sc,char * gp_name)705 gpio_pinbyname(struct gpio_softc *sc, char *gp_name)
706 {
707 struct gpio_name *nm;
708
709 LIST_FOREACH(nm, &sc->sc_names, gp_next)
710 if (!strcmp(nm->gp_name, gp_name))
711 return nm->gp_pin;
712 return -1;
713 }
714
715 int
gpioioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)716 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
717 {
718 int error;
719 struct gpio_softc *sc;
720
721 sc = device_lookup_private(&gpio_cd, minor(dev));
722
723 error = gpio_lock(sc);
724 if (error)
725 return error;
726
727 error = gpio_ioctl(sc, cmd, data, flag, l);
728 gpio_unlock(sc);
729 return error;
730 }
731
732 static int
gpio_ioctl(struct gpio_softc * sc,u_long cmd,void * data,int flag,struct lwp * l)733 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag,
734 struct lwp *l)
735 {
736 gpio_chipset_tag_t gc;
737 struct gpio_info *info;
738 struct gpio_attach *attach;
739 struct gpio_attach_args ga;
740 struct gpio_req *req;
741 struct gpio_name *nm;
742 struct gpio_set *set;
743 #ifdef COMPAT_50
744 struct gpio_dev *gdev;
745 #endif
746 device_t dv;
747 cfdata_t cf;
748 int locs[GPIOCF_NLOCS];
749 int error, pin, value, flags;
750
751 gc = sc->sc_gc;
752 ga.ga_flags = 0;
753
754 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) {
755 DPRINTF(("%s: device is not active\n",
756 device_xname(sc->sc_dev)));
757 return EBUSY;
758 }
759
760 switch (cmd) {
761 case GPIOINFO:
762 info = data;
763 info->gpio_npins = sc->sc_npins;
764 break;
765 case GPIOREAD:
766 req = data;
767
768 if (req->gp_name[0] != '\0')
769 req->gp_pin = gpio_pinbyname(sc, req->gp_name);
770 pin = req->gp_pin;
771
772 if (pin < 0 || pin >= sc->sc_npins)
773 return EINVAL;
774
775 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
776 kauth_authorize_device(l->l_cred,
777 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
778 return EPERM;
779
780 /* return read value */
781 req->gp_value = gpiobus_pin_read(gc, pin);
782 LIST_FOREACH(nm, &sc->sc_names, gp_next)
783 if (nm->gp_pin == pin) {
784 strlcpy(req->gp_name, nm->gp_name, GPIOMAXNAME);
785 break;
786 }
787 break;
788 case GPIOWRITE:
789 if ((flag & FWRITE) == 0)
790 return EBADF;
791
792 req = data;
793
794 if (req->gp_name[0] != '\0')
795 pin = gpio_pinbyname(sc, req->gp_name);
796 else
797 pin = req->gp_pin;
798
799 if (pin < 0 || pin >= sc->sc_npins)
800 return EINVAL;
801
802 if (sc->sc_pins[pin].pin_mapped)
803 return EBUSY;
804
805 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
806 kauth_authorize_device(l->l_cred,
807 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
808 return EPERM;
809
810 value = req->gp_value;
811 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
812 return EINVAL;
813
814 /* return old value */
815 req->gp_value = gpiobus_pin_read(gc, pin);
816 gpiobus_pin_write(gc, pin, value);
817 /* update current value */
818 sc->sc_pins[pin].pin_state = value;
819 break;
820 case GPIOTOGGLE:
821 if ((flag & FWRITE) == 0)
822 return EBADF;
823
824 req = data;
825
826 if (req->gp_name[0] != '\0')
827 pin = gpio_pinbyname(sc, req->gp_name);
828 else
829 pin = req->gp_pin;
830
831 if (pin < 0 || pin >= sc->sc_npins)
832 return EINVAL;
833
834 if (sc->sc_pins[pin].pin_mapped)
835 return EBUSY;
836
837 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
838 kauth_authorize_device(l->l_cred,
839 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
840 return EPERM;
841
842 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
843 GPIO_PIN_HIGH : GPIO_PIN_LOW);
844 gpiobus_pin_write(gc, pin, value);
845 /* return old value */
846 req->gp_value = sc->sc_pins[pin].pin_state;
847 /* update current value */
848 sc->sc_pins[pin].pin_state = value;
849 break;
850 case GPIOATTACH:
851 attach = data;
852 ga.ga_flags = attach->ga_flags;
853 #ifdef COMPAT_50
854 /* FALLTHROUGH */
855 case GPIOATTACH50:
856 /*
857 * The double assignment to 'attach' in case of GPIOATTACH
858 * and COMPAT_50 is on purpose. It ensures backward
859 * compatibility in case we are called through the old
860 * GPIOATTACH50 ioctl(2), which had not the ga_flags field
861 * in struct gpio_attach.
862 */
863 attach = data;
864 #endif
865 if (kauth_authorize_device(l->l_cred,
866 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
867 return EPERM;
868
869 /* do not try to attach if the pins are already mapped */
870 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask))
871 return EBUSY;
872
873 error = 0;
874 mutex_enter(&sc->sc_mtx);
875 while (sc->sc_attach_busy) {
876 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
877 if (error)
878 break;
879 }
880 if (!error)
881 sc->sc_attach_busy = 1;
882 mutex_exit(&sc->sc_mtx);
883 if (error)
884 return EBUSY;
885
886 ga.ga_gpio = sc;
887 /* Don't access attach->ga_flags here. */
888 ga.ga_dvname = attach->ga_dvname;
889 ga.ga_offset = attach->ga_offset;
890 ga.ga_mask = attach->ga_mask;
891 DPRINTF(("%s: attach %s with offset %d, mask "
892 "0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev),
893 ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags));
894
895 locs[GPIOCF_OFFSET] = ga.ga_offset;
896 locs[GPIOCF_MASK] = ga.ga_mask;
897 locs[GPIOCF_FLAG] = ga.ga_flags;
898
899 KERNEL_LOCK(1, NULL);
900 cf = config_search(sc->sc_dev, &ga,
901 CFARGS(.locators = locs));
902 if (cf != NULL) {
903 dv = config_attach(sc->sc_dev, cf, &ga,
904 gpiobus_print,
905 CFARGS(.locators = locs));
906 #ifdef COMPAT_50
907 if (dv != NULL) {
908 gdev = kmem_alloc(sizeof(struct gpio_dev),
909 KM_SLEEP);
910 gdev->sc_dev = dv;
911 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next);
912 } else
913 error = EINVAL;
914 #else
915 if (dv == NULL)
916 error = EINVAL;
917 #endif
918 } else
919 error = EINVAL;
920 KERNEL_UNLOCK_ONE(NULL);
921
922 mutex_enter(&sc->sc_mtx);
923 sc->sc_attach_busy = 0;
924 cv_signal(&sc->sc_attach);
925 mutex_exit(&sc->sc_mtx);
926 return error;
927 case GPIOSET:
928 if (kauth_authorize_device(l->l_cred,
929 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
930 return EPERM;
931
932 set = data;
933
934 if (set->gp_name[0] != '\0')
935 pin = gpio_pinbyname(sc, set->gp_name);
936 else
937 pin = set->gp_pin;
938
939 if (pin < 0 || pin >= sc->sc_npins)
940 return EINVAL;
941 flags = set->gp_flags;
942
943 /* check that the controller supports all requested flags */
944 if ((flags & sc->sc_pins[pin].pin_caps) != flags)
945 return ENODEV;
946 flags = set->gp_flags;
947
948 set->gp_caps = sc->sc_pins[pin].pin_caps;
949 /* return old value */
950 set->gp_flags = sc->sc_pins[pin].pin_flags;
951
952 if (flags > 0) {
953 flags |= GPIO_PIN_SET;
954 gpiobus_pin_ctl(gc, pin, flags);
955 /* update current value */
956 sc->sc_pins[pin].pin_flags = flags;
957 }
958
959 /* rename pin or new pin? */
960 if (set->gp_name2[0] != '\0') {
961 struct gpio_name *gnm;
962
963 gnm = NULL;
964 LIST_FOREACH(nm, &sc->sc_names, gp_next) {
965 if (!strcmp(nm->gp_name, set->gp_name2) &&
966 nm->gp_pin != pin)
967 return EINVAL; /* duplicate name */
968 if (nm->gp_pin == pin)
969 gnm = nm;
970 }
971 if (gnm != NULL)
972 strlcpy(gnm->gp_name, set->gp_name2,
973 sizeof(gnm->gp_name));
974 else {
975 nm = kmem_alloc(sizeof(struct gpio_name),
976 KM_SLEEP);
977 strlcpy(nm->gp_name, set->gp_name2,
978 sizeof(nm->gp_name));
979 nm->gp_pin = set->gp_pin;
980 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
981 }
982 }
983 break;
984 case GPIOUNSET:
985 if (kauth_authorize_device(l->l_cred,
986 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
987 return EPERM;
988
989 set = data;
990 if (set->gp_name[0] != '\0')
991 pin = gpio_pinbyname(sc, set->gp_name);
992 else
993 pin = set->gp_pin;
994
995 if (pin < 0 || pin >= sc->sc_npins)
996 return EINVAL;
997 if (sc->sc_pins[pin].pin_mapped)
998 return EBUSY;
999 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET))
1000 return EINVAL;
1001
1002 LIST_FOREACH(nm, &sc->sc_names, gp_next) {
1003 if (nm->gp_pin == pin) {
1004 LIST_REMOVE(nm, gp_next);
1005 kmem_free(nm, sizeof(struct gpio_name));
1006 break;
1007 }
1008 }
1009 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET;
1010 break;
1011 default:
1012 #ifdef COMPAT_50
1013 /* Try the old API */
1014 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev)));
1015 return gpio_ioctl_oapi(sc, cmd, data, flag, l);
1016 #else
1017 return ENOTTY;
1018 #endif
1019 }
1020 return 0;
1021 }
1022
1023 #ifdef COMPAT_50
1024 static int
gpio_ioctl_oapi(struct gpio_softc * sc,u_long cmd,void * data,int flag,struct lwp * l)1025 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag,
1026 struct lwp *l)
1027 {
1028 gpio_chipset_tag_t gc;
1029 struct gpio_pin_op *op;
1030 struct gpio_pin_ctl *ctl;
1031 struct gpio_attach *attach;
1032 struct gpio_dev *gdev;
1033
1034 int error, pin, value, flags;
1035
1036 gc = sc->sc_gc;
1037
1038 switch (cmd) {
1039 case GPIOPINREAD:
1040 op = data;
1041
1042 pin = op->gp_pin;
1043
1044 if (pin < 0 || pin >= sc->sc_npins)
1045 return EINVAL;
1046
1047 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
1048 kauth_authorize_device(l->l_cred,
1049 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
1050 return EPERM;
1051
1052 /* return read value */
1053 op->gp_value = gpiobus_pin_read(gc, pin);
1054 break;
1055 case GPIOPINWRITE:
1056 if ((flag & FWRITE) == 0)
1057 return EBADF;
1058
1059 op = data;
1060
1061 pin = op->gp_pin;
1062
1063 if (pin < 0 || pin >= sc->sc_npins)
1064 return EINVAL;
1065
1066 if (sc->sc_pins[pin].pin_mapped)
1067 return EBUSY;
1068
1069 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
1070 kauth_authorize_device(l->l_cred,
1071 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
1072 return EPERM;
1073
1074 value = op->gp_value;
1075 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
1076 return EINVAL;
1077
1078 gpiobus_pin_write(gc, pin, value);
1079 /* return old value */
1080 op->gp_value = sc->sc_pins[pin].pin_state;
1081 /* update current value */
1082 sc->sc_pins[pin].pin_state = value;
1083 break;
1084 case GPIOPINTOGGLE:
1085 if ((flag & FWRITE) == 0)
1086 return EBADF;
1087
1088 op = data;
1089
1090 pin = op->gp_pin;
1091
1092 if (pin < 0 || pin >= sc->sc_npins)
1093 return EINVAL;
1094
1095 if (sc->sc_pins[pin].pin_mapped)
1096 return EBUSY;
1097
1098 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
1099 kauth_authorize_device(l->l_cred,
1100 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
1101 return EPERM;
1102
1103 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
1104 GPIO_PIN_HIGH : GPIO_PIN_LOW);
1105 gpiobus_pin_write(gc, pin, value);
1106 /* return old value */
1107 op->gp_value = sc->sc_pins[pin].pin_state;
1108 /* update current value */
1109 sc->sc_pins[pin].pin_state = value;
1110 break;
1111 case GPIOPINCTL:
1112 ctl = data;
1113
1114 if (kauth_authorize_device(l->l_cred,
1115 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
1116 return EPERM;
1117
1118 pin = ctl->gp_pin;
1119
1120 if (pin < 0 || pin >= sc->sc_npins)
1121 return EINVAL;
1122 if (sc->sc_pins[pin].pin_mapped)
1123 return EBUSY;
1124 flags = ctl->gp_flags;
1125
1126 /* check that the controller supports all requested flags */
1127 if ((flags & sc->sc_pins[pin].pin_caps) != flags)
1128 return ENODEV;
1129
1130 ctl->gp_caps = sc->sc_pins[pin].pin_caps;
1131 /* return old value */
1132 ctl->gp_flags = sc->sc_pins[pin].pin_flags;
1133 if (flags > 0) {
1134 gpiobus_pin_ctl(gc, pin, flags);
1135 /* update current value */
1136 sc->sc_pins[pin].pin_flags = flags;
1137 }
1138 break;
1139 case GPIODETACH50:
1140 /* FALLTHOUGH */
1141 case GPIODETACH:
1142 if (kauth_authorize_device(l->l_cred,
1143 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL))
1144 return EPERM;
1145
1146 error = 0;
1147 mutex_enter(&sc->sc_mtx);
1148 while (sc->sc_attach_busy) {
1149 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
1150 if (error)
1151 break;
1152 }
1153 if (!error)
1154 sc->sc_attach_busy = 1;
1155 mutex_exit(&sc->sc_mtx);
1156 if (error)
1157 return EBUSY;
1158
1159 KERNEL_LOCK(1, NULL);
1160 attach = data;
1161 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) {
1162 if (strcmp(device_xname(gdev->sc_dev),
1163 attach->ga_dvname) == 0) {
1164 mutex_enter(&sc->sc_mtx);
1165 sc->sc_attach_busy = 0;
1166 cv_signal(&sc->sc_attach);
1167 mutex_exit(&sc->sc_mtx);
1168
1169 if (config_detach(gdev->sc_dev, 0) == 0) {
1170 KERNEL_UNLOCK_ONE(NULL);
1171 return 0;
1172 }
1173 break;
1174 }
1175 }
1176 KERNEL_UNLOCK_ONE(NULL);
1177
1178 if (gdev == NULL) {
1179 mutex_enter(&sc->sc_mtx);
1180 sc->sc_attach_busy = 0;
1181 cv_signal(&sc->sc_attach);
1182 mutex_exit(&sc->sc_mtx);
1183 }
1184 return EINVAL;
1185
1186 default:
1187 return ENOTTY;
1188 }
1189 return 0;
1190 }
1191 #endif /* COMPAT_50 */
1192
1193 MODULE(MODULE_CLASS_DRIVER, gpio, NULL);
1194
1195 #ifdef _MODULE
1196 #include "ioconf.c"
1197 #endif
1198
1199 static int
gpio_modcmd(modcmd_t cmd,void * opaque)1200 gpio_modcmd(modcmd_t cmd, void *opaque)
1201 {
1202 #ifdef _MODULE
1203 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR;
1204 int error;
1205 #endif
1206 switch (cmd) {
1207 case MODULE_CMD_INIT:
1208 #ifdef _MODULE
1209 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor,
1210 &gpio_cdevsw, &cmajor);
1211 if (error) {
1212 aprint_error("%s: unable to register devsw\n",
1213 gpio_cd.cd_name);
1214 return error;
1215 }
1216 error = config_init_component(cfdriver_ioconf_gpio,
1217 cfattach_ioconf_gpio, cfdata_ioconf_gpio);
1218 if (error) {
1219 aprint_error("%s: unable to init component\n",
1220 gpio_cd.cd_name);
1221 devsw_detach(NULL, &gpio_cdevsw);
1222 return error;
1223 }
1224 #endif
1225 return 0;
1226 case MODULE_CMD_FINI:
1227 #ifdef _MODULE
1228 config_fini_component(cfdriver_ioconf_gpio,
1229 cfattach_ioconf_gpio, cfdata_ioconf_gpio);
1230 devsw_detach(NULL, &gpio_cdevsw);
1231 #endif
1232 return 0;
1233 default:
1234 return ENOTTY;
1235 }
1236 }
1237