1 /*******************************************************************************
2
3 Copyright (c) 2006-2013, Myricom Inc.
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Myricom Inc, nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
15
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
27
28 $FreeBSD: stable/10/sys/dev/mxge/if_mxge_var.h 247160 2013-02-22 19:23:33Z gallatin $
29
30 ***************************************************************************/
31
32 #define MXGE_ETH_STOPPED 0
33 #define MXGE_ETH_STOPPING 1
34 #define MXGE_ETH_STARTING 2
35 #define MXGE_ETH_RUNNING 3
36 #define MXGE_ETH_OPEN_FAILED 4
37
38 #define MXGE_FW_OFFSET 1024*1024
39 #define MXGE_EEPROM_STRINGS_SIZE 256
40 #define MXGE_MAX_SEND_DESC 128
41
42 #if ((__FreeBSD_version > 800000 && __FreeBSD_version < 800005) \
43 || __FreeBSD_version < 700111)
44 #define MXGE_VIRT_JUMBOS 1
45 #else
46 #define MXGE_VIRT_JUMBOS 0
47 #endif
48
49 #if (__FreeBSD_version > 800082)
50 #define IFNET_BUF_RING 1
51 #endif
52
53 #if (__FreeBSD_version < 1000020)
54 #undef IF_Kbps
55 #undef IF_Mbps
56 #undef IF_Gbps
57 #define IF_Kbps(x) ((uintmax_t)(x) * 1000) /* kilobits/sec. */
58 #define IF_Mbps(x) (IF_Kbps((x) * 1000)) /* megabits/sec. */
59 #define IF_Gbps(x) (IF_Mbps((x) * 1000)) /* gigabits/sec. */
60 static __inline void
if_initbaudrate(struct ifnet * ifp,uintmax_t baud)61 if_initbaudrate(struct ifnet *ifp, uintmax_t baud)
62 {
63 ifp->if_baudrate = baud;
64 }
65 #endif
66 #ifndef VLAN_CAPABILITIES
67 #define VLAN_CAPABILITIES(ifp)
68 #define mxge_vlans_active(sc) (sc)->ifp->if_nvlans
69 #else
70 #define mxge_vlans_active(sc) (sc)->ifp->if_vlantrunk
71 #endif
72
73 #ifndef VLAN_TAG_VALUE
74 #define MXGE_NEW_VLAN_API
75 #endif
76
77 #ifndef IFCAP_LRO
78 #define IFCAP_LRO 0
79 #endif
80
81 #ifndef IFCAP_TSO
82 #define IFCAP_TSO 0
83 #endif
84
85 #ifndef IFCAP_TSO4
86 #define IFCAP_TSO4 0
87 #endif
88
89 #ifndef IFCAP_TSO6
90 #define IFCAP_TSO6 0
91 #endif
92
93 #ifndef IFCAP_TXCSUM_IPV6
94 #define IFCAP_TXCSUM_IPV6 0
95 #endif
96
97 #ifndef IFCAP_RXCSUM_IPV6
98 #define IFCAP_RXCSUM_IPV6 0
99 #endif
100
101 #ifndef CSUM_TSO
102 #define CSUM_TSO 0
103 #endif
104
105 #ifndef CSUM_TCP_IPV6
106 #define CSUM_TCP_IPV6 0
107 #endif
108
109 #ifndef CSUM_UDP_IPV6
110 #define CSUM_UDP_IPV6 0
111 #endif
112
113 #ifndef CSUM_DELAY_DATA_IPV6
114 #define CSUM_DELAY_DATA_IPV6 0
115 #endif
116
117 typedef struct {
118 void *addr;
119 bus_addr_t bus_addr;
120 bus_dma_tag_t dmat;
121 bus_dmamap_t map;
122 } mxge_dma_t;
123
124
125 typedef struct {
126 mcp_slot_t *entry;
127 mxge_dma_t dma;
128 int cnt;
129 int idx;
130 int mask;
131 } mxge_rx_done_t;
132
133 typedef struct
134 {
135 uint32_t data0;
136 uint32_t data1;
137 uint32_t data2;
138 } mxge_cmd_t;
139
140 struct mxge_rx_buffer_state {
141 struct mbuf *m;
142 bus_dmamap_t map;
143 };
144
145 struct mxge_tx_buffer_state {
146 struct mbuf *m;
147 bus_dmamap_t map;
148 int flag;
149 };
150
151 typedef struct
152 {
153 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
154 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
155 struct mxge_rx_buffer_state *info;
156 bus_dma_tag_t dmat;
157 bus_dmamap_t extra_map;
158 int cnt;
159 int nbufs;
160 int cl_size;
161 int alloc_fail;
162 int mask; /* number of rx slots -1 */
163 int mlen;
164 } mxge_rx_ring_t;
165
166 typedef struct
167 {
168 struct mtx mtx;
169 #ifdef IFNET_BUF_RING
170 struct buf_ring *br;
171 #endif
172 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
173 volatile uint32_t *send_go; /* doorbell for sendq */
174 volatile uint32_t *send_stop; /* doorbell for sendq */
175 mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
176 char *req_bytes;
177 bus_dma_segment_t *seg_list;
178 struct mxge_tx_buffer_state *info;
179 bus_dma_tag_t dmat;
180 int req; /* transmits submitted */
181 int mask; /* number of transmit slots -1 */
182 int done; /* transmits completed */
183 int pkt_done; /* packets completed */
184 int max_desc; /* max descriptors per xmit */
185 int queue_active; /* fw currently polling this queue*/
186 int activate;
187 int deactivate;
188 int stall; /* #times hw queue exhausted */
189 int wake; /* #times irq re-enabled xmit */
190 int watchdog_req; /* cache of req */
191 int watchdog_done; /* cache of done */
192 int watchdog_rx_pause; /* cache of pause rq recvd */
193 int defrag;
194 char mtx_name[16];
195 } mxge_tx_ring_t;
196
197 struct mxge_softc;
198 typedef struct mxge_softc mxge_softc_t;
199
200 struct mxge_slice_state {
201 mxge_softc_t *sc;
202 mxge_tx_ring_t tx; /* transmit ring */
203 mxge_rx_ring_t rx_small;
204 mxge_rx_ring_t rx_big;
205 mxge_rx_done_t rx_done;
206 mcp_irq_data_t *fw_stats;
207 volatile uint32_t *irq_claim;
208 u_long ipackets;
209 u_long opackets;
210 u_long obytes;
211 u_long omcasts;
212 u_long oerrors;
213 int if_drv_flags;
214 struct lro_ctrl lc;
215 mxge_dma_t fw_stats_dma;
216 struct sysctl_oid *sysctl_tree;
217 struct sysctl_ctx_list sysctl_ctx;
218 char scratch[256];
219 };
220
221 struct mxge_softc {
222 struct ifnet* ifp;
223 struct mxge_slice_state *ss;
224 int tx_boundary; /* boundary transmits cannot cross*/
225 int lro_cnt;
226 bus_dma_tag_t parent_dmat;
227 volatile uint8_t *sram;
228 int sram_size;
229 volatile uint32_t *irq_deassert;
230 mcp_cmd_response_t *cmd;
231 mxge_dma_t cmd_dma;
232 mxge_dma_t zeropad_dma;
233 struct pci_dev *pdev;
234 int legacy_irq;
235 int link_state;
236 unsigned int rdma_tags_available;
237 int intr_coal_delay;
238 volatile uint32_t *intr_coal_delay_ptr;
239 int wc;
240 struct mtx cmd_mtx;
241 struct mtx driver_mtx;
242 int wake_queue;
243 int stop_queue;
244 int down_cnt;
245 int watchdog_resets;
246 int watchdog_countdown;
247 int pause;
248 struct resource *mem_res;
249 struct resource *irq_res;
250 struct resource **msix_irq_res;
251 struct resource *msix_table_res;
252 struct resource *msix_pba_res;
253 void *ih;
254 void **msix_ih;
255 char *fw_name;
256 char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
257 char fw_version[128];
258 int fw_ver_major;
259 int fw_ver_minor;
260 int fw_ver_tiny;
261 int adopted_rx_filter_bug;
262 device_t dev;
263 struct ifmedia media;
264 int read_dma;
265 int write_dma;
266 int read_write_dma;
267 int fw_multicast_support;
268 int link_width;
269 int max_mtu;
270 int throttle;
271 int tx_defrag;
272 int media_flags;
273 int need_media_probe;
274 int num_slices;
275 int rx_ring_size;
276 int dying;
277 int connector;
278 int current_media;
279 int max_tso6_hlen;
280 mxge_dma_t dmabench_dma;
281 struct callout co_hdl;
282 struct taskqueue *tq;
283 struct task watchdog_task;
284 struct sysctl_oid *slice_sysctl_tree;
285 struct sysctl_ctx_list slice_sysctl_ctx;
286 char *mac_addr_string;
287 uint8_t mac_addr[6]; /* eeprom mac address */
288 uint16_t pectl; /* save PCIe CTL state */
289 char product_code_string[64];
290 char serial_number_string[64];
291 char cmd_mtx_name[16];
292 char driver_mtx_name[16];
293 };
294
295 #define MXGE_PCI_VENDOR_MYRICOM 0x14c1
296 #define MXGE_PCI_DEVICE_Z8E 0x0008
297 #define MXGE_PCI_DEVICE_Z8E_9 0x0009
298 #define MXGE_PCI_REV_Z8E 0
299 #define MXGE_PCI_REV_Z8ES 1
300 #define MXGE_XFP_COMPLIANCE_BYTE 131
301 #define MXGE_SFP_COMPLIANCE_BYTE 3
302 #define MXGE_MIN_THROTTLE 416
303 #define MXGE_MAX_THROTTLE 4096
304
305 /* Types of connectors on NICs supported by this driver */
306 #define MXGE_CX4 0
307 #define MXGE_XFP 1
308 #define MXGE_SFP 2
309 #define MXGE_QRF 3
310
311 #define MXGE_HIGHPART_TO_U32(X) \
312 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
313 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
314
315 struct mxge_media_type
316 {
317 int flag;
318 uint8_t bitmask;
319 char *name;
320 };
321
322 struct mxge_pkt_info {
323 int ip_off;
324 int ip_hlen;
325 struct ip *ip;
326 struct ip6_hdr *ip6;
327 struct tcphdr *tcp;
328 };
329
330
331 /* implement our own memory barriers, since bus_space_barrier
332 cannot handle write-combining regions */
333
334 #if __FreeBSD_version < 800053
335
336 #if defined (__GNUC__)
337 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
338 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory")
339 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
340 #define wmb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
341 #elif #cpu(sparc) || defined sparc || defined __sparc__
342 #define wmb() __asm__ __volatile__ ("stbar;": : :"memory")
343 #else
344 #define wmb() /* XXX just to make this compile */
345 #endif
346 #else
347 #error "unknown compiler"
348 #endif
349
350 #endif
351
352 static inline void
mxge_pio_copy(volatile void * to_v,void * from_v,size_t size)353 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
354 {
355 register volatile uintptr_t *to;
356 volatile uintptr_t *from;
357 size_t i;
358
359 to = (volatile uintptr_t *) to_v;
360 from = from_v;
361 for (i = (size / sizeof (uintptr_t)); i; i--) {
362 *to = *from;
363 to++;
364 from++;
365 }
366
367 }
368
369 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro);
370 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head,
371 uint32_t csum);
372
373
374
375 /*
376 This file uses Myri10GE driver indentation.
377
378 Local Variables:
379 c-file-style:"linux"
380 tab-width:8
381 End:
382 */
383