1 /*-
2  * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *      This product includes software developed by Herb Peyerl.
16  * 4. The name of Herb Peyerl may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD: stable/9/sys/dev/ep/if_ep.c 248078 2013-03-09 00:39:54Z marius $");
33 
34 /*
35  *	Modified from the FreeBSD 1.1.5.1 version by:
36  *		 	Andres Vega Garcia
37  *			INRIA - Sophia Antipolis, France
38  *			avega@sophia.inria.fr
39  */
40 
41 /*
42  *  Promiscuous mode added and interrupt logic slightly changed
43  *  to reduce the number of adapter failures. Transceiver select
44  *  logic changed to use value from EEPROM. Autoconfiguration
45  *  features added.
46  *  Done by:
47  *          Serge Babkin
48  *          Chelindbank (Chelyabinsk, Russia)
49  *          babkin@hq.icb.chel.su
50  */
51 
52 /*
53  * Pccard support for 3C589 by:
54  *		HAMADA Naoki
55  *		nao@tom-yam.or.jp
56  */
57 
58 /*
59  * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
60  *                             <mdodd@FreeBSD.org>
61  */
62 
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/kernel.h>
66 #include <sys/mbuf.h>
67 #include <sys/socket.h>
68 #include <sys/sockio.h>
69 #include <sys/bus.h>
70 
71 #include <machine/bus.h>
72 #include <machine/resource.h>
73 #include <sys/rman.h>
74 
75 #include <net/if.h>
76 #include <net/if_dl.h>
77 #include <net/if_media.h>
78 #include <net/if_types.h>
79 #include <net/ethernet.h>
80 #include <net/bpf.h>
81 
82 #include <dev/ep/if_epreg.h>
83 #include <dev/ep/if_epvar.h>
84 
85 /* Exported variables */
86 devclass_t ep_devclass;
87 
88 static int ep_media2if_media[] =
89 {IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
90 
91 /* if functions */
92 static void epinit(void *);
93 static int epioctl(struct ifnet *, u_long, caddr_t);
94 static void epstart(struct ifnet *);
95 
96 static void ep_intr_locked(struct ep_softc *);
97 static void epstart_locked(struct ifnet *);
98 static void epinit_locked(struct ep_softc *);
99 static void eptick(void *);
100 static void epwatchdog(struct ep_softc *);
101 
102 /* if_media functions */
103 static int ep_ifmedia_upd(struct ifnet *);
104 static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
105 
106 static void epstop(struct ep_softc *);
107 static void epread(struct ep_softc *);
108 static int eeprom_rdy(struct ep_softc *);
109 
110 #define EP_FTST(sc, f)	(sc->stat &   (f))
111 #define EP_FSET(sc, f)	(sc->stat |=  (f))
112 #define EP_FRST(sc, f)	(sc->stat &= ~(f))
113 
114 static int
eeprom_rdy(struct ep_softc * sc)115 eeprom_rdy(struct ep_softc *sc)
116 {
117 	int i;
118 
119 	for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
120 		DELAY(100);
121 
122 	if (i >= MAX_EEPROMBUSY) {
123 		device_printf(sc->dev, "eeprom failed to come ready.\n");
124  		return (ENXIO);
125 	}
126 
127 	return (0);
128 }
129 
130 /*
131  * get_e: gets a 16 bits word from the EEPROM. we must have set the window
132  * before
133  */
134 int
ep_get_e(struct ep_softc * sc,uint16_t offset,uint16_t * result)135 ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
136 {
137 
138 	if (eeprom_rdy(sc))
139 		return (ENXIO);
140 
141 	CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
142 	    (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
143 
144 	if (eeprom_rdy(sc))
145 		return (ENXIO);
146 
147 	(*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
148 
149 	return (0);
150 }
151 
152 static int
ep_get_macaddr(struct ep_softc * sc,u_char * addr)153 ep_get_macaddr(struct ep_softc *sc, u_char *addr)
154 {
155 	int i;
156 	uint16_t result;
157 	int error;
158 	uint16_t *macaddr;
159 
160 	macaddr = (uint16_t *) addr;
161 
162 	GO_WINDOW(sc, 0);
163 	for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
164 		error = ep_get_e(sc, i, &result);
165 		if (error)
166 			return (error);
167 		macaddr[i] = htons(result);
168 	}
169 	return (0);
170 }
171 
172 int
ep_alloc(device_t dev)173 ep_alloc(device_t dev)
174 {
175 	struct ep_softc *sc = device_get_softc(dev);
176 	int rid;
177 	int error = 0;
178 	uint16_t result;
179 
180 	rid = 0;
181 	sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
182 	    RF_ACTIVE);
183 	if (!sc->iobase) {
184 		device_printf(dev, "No I/O space?!\n");
185 		error = ENXIO;
186 		goto bad;
187 	}
188 	rid = 0;
189 	sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
190 	if (!sc->irq) {
191 		device_printf(dev, "No irq?!\n");
192 		error = ENXIO;
193 		goto bad;
194 	}
195 	sc->dev = dev;
196 	sc->stat = 0;		/* 16 bit access */
197 
198 	sc->bst = rman_get_bustag(sc->iobase);
199 	sc->bsh = rman_get_bushandle(sc->iobase);
200 
201 	sc->ep_connectors = 0;
202 	sc->ep_connector = 0;
203 
204 	GO_WINDOW(sc, 0);
205 
206 	error = ep_get_e(sc, EEPROM_PROD_ID, &result);
207 	if (error)
208 		goto bad;
209 	sc->epb.prod_id = result;
210 
211 	error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result);
212 	if (error)
213 		goto bad;
214 	sc->epb.res_cfg = result;
215 
216 bad:
217 	if (error != 0)
218 		ep_free(dev);
219 	return (error);
220 }
221 
222 void
ep_get_media(struct ep_softc * sc)223 ep_get_media(struct ep_softc *sc)
224 {
225 	uint16_t config;
226 
227 	GO_WINDOW(sc, 0);
228 	config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
229 	if (config & IS_AUI)
230 		sc->ep_connectors |= AUI;
231 	if (config & IS_BNC)
232 		sc->ep_connectors |= BNC;
233 	if (config & IS_UTP)
234 		sc->ep_connectors |= UTP;
235 
236 	if (!(sc->ep_connectors & 7))
237 		if (bootverbose)
238 			device_printf(sc->dev, "no connectors!\n");
239 
240 	/*
241 	 * This works for most of the cards so we'll do it here.
242 	 * The cards that require something different can override
243 	 * this later on.
244 	 */
245 	sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
246 }
247 
248 void
ep_free(device_t dev)249 ep_free(device_t dev)
250 {
251 	struct ep_softc *sc = device_get_softc(dev);
252 
253 	if (sc->ep_intrhand)
254 		bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
255 	if (sc->iobase)
256 		bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
257 	if (sc->irq)
258 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
259 	sc->ep_intrhand = 0;
260 	sc->iobase = 0;
261 	sc->irq = 0;
262 }
263 
264 static void
ep_setup_station(struct ep_softc * sc,u_char * enaddr)265 ep_setup_station(struct ep_softc *sc, u_char *enaddr)
266 {
267 	int i;
268 
269 	/*
270 	 * Setup the station address
271 	 */
272 	GO_WINDOW(sc, 2);
273 	for (i = 0; i < ETHER_ADDR_LEN; i++)
274 		CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]);
275 }
276 
277 int
ep_attach(struct ep_softc * sc)278 ep_attach(struct ep_softc *sc)
279 {
280 	struct ifnet *ifp = NULL;
281 	struct ifmedia *ifm = NULL;
282 	int error;
283 
284 	sc->gone = 0;
285 	EP_LOCK_INIT(sc);
286 	if (! (sc->stat & F_ENADDR_SKIP)) {
287 		error = ep_get_macaddr(sc, sc->eaddr);
288 		if (error) {
289 			device_printf(sc->dev, "Unable to get MAC address!\n");
290 			EP_LOCK_DESTROY(sc);
291 			return (ENXIO);
292 		}
293 	}
294 	ep_setup_station(sc, sc->eaddr);
295 	ifp = sc->ifp = if_alloc(IFT_ETHER);
296 	if (ifp == NULL) {
297 		device_printf(sc->dev, "if_alloc() failed\n");
298 		EP_LOCK_DESTROY(sc);
299 		return (ENOSPC);
300 	}
301 
302 	ifp->if_softc = sc;
303 	if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
304 	ifp->if_mtu = ETHERMTU;
305 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
306 	ifp->if_start = epstart;
307 	ifp->if_ioctl = epioctl;
308 	ifp->if_init = epinit;
309 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
310 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
311 	IFQ_SET_READY(&ifp->if_snd);
312 
313 	callout_init_mtx(&sc->watchdog_timer, &sc->sc_mtx, 0);
314 	if (!sc->epb.mii_trans) {
315 		ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
316 
317 		if (sc->ep_connectors & AUI)
318 			ifmedia_add(&sc->ifmedia,
319 			    IFM_ETHER | IFM_10_5, 0, NULL);
320 		if (sc->ep_connectors & UTP)
321 			ifmedia_add(&sc->ifmedia,
322 			    IFM_ETHER | IFM_10_T, 0, NULL);
323 		if (sc->ep_connectors & BNC)
324 			ifmedia_add(&sc->ifmedia,
325 			    IFM_ETHER | IFM_10_2, 0, NULL);
326 		if (!sc->ep_connectors)
327 			ifmedia_add(&sc->ifmedia,
328 			    IFM_ETHER | IFM_NONE, 0, NULL);
329 
330 		ifmedia_set(&sc->ifmedia,
331 		    IFM_ETHER | ep_media2if_media[sc->ep_connector]);
332 
333 		ifm = &sc->ifmedia;
334 		ifm->ifm_media = ifm->ifm_cur->ifm_media;
335 		ep_ifmedia_upd(ifp);
336 	}
337 	ether_ifattach(ifp, sc->eaddr);
338 
339 #ifdef EP_LOCAL_STATS
340 	sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
341 	    sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
342 #endif
343 	EP_FSET(sc, F_RX_FIRST);
344 	sc->top = sc->mcur = 0;
345 
346 	epstop(sc);
347 
348 	return (0);
349 }
350 
351 int
ep_detach(device_t dev)352 ep_detach(device_t dev)
353 {
354 	struct ep_softc *sc;
355 	struct ifnet *ifp;
356 
357 	sc = device_get_softc(dev);
358 	ifp = sc->ifp;
359 	EP_ASSERT_UNLOCKED(sc);
360 	EP_LOCK(sc);
361 	if (bus_child_present(dev))
362 		epstop(sc);
363 	sc->gone = 1;
364 	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
365 	EP_UNLOCK(sc);
366 	ether_ifdetach(ifp);
367 	callout_drain(&sc->watchdog_timer);
368 	ep_free(dev);
369 
370 	if_free(ifp);
371 	EP_LOCK_DESTROY(sc);
372 
373 	return (0);
374 }
375 
376 static void
epinit(void * xsc)377 epinit(void *xsc)
378 {
379 	struct ep_softc *sc = xsc;
380 	EP_LOCK(sc);
381 	epinit_locked(sc);
382 	EP_UNLOCK(sc);
383 }
384 
385 /*
386  * The order in here seems important. Otherwise we may not receive
387  * interrupts. ?!
388  */
389 static void
epinit_locked(struct ep_softc * sc)390 epinit_locked(struct ep_softc *sc)
391 {
392 	struct ifnet *ifp = sc->ifp;
393 	int i;
394 
395 	if (sc->gone)
396 		return;
397 
398 	EP_ASSERT_LOCKED(sc);
399 	EP_BUSY_WAIT(sc);
400 
401 	GO_WINDOW(sc, 0);
402 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
403 	GO_WINDOW(sc, 4);
404 	CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
405 	GO_WINDOW(sc, 0);
406 
407 	/* Disable the card */
408 	CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
409 
410 	/* Enable the card */
411 	CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
412 
413 	GO_WINDOW(sc, 2);
414 	/* Reload the ether_addr. */
415 	ep_setup_station(sc, IF_LLADDR(sc->ifp));
416 
417 	CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
418 	CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
419 	EP_BUSY_WAIT(sc);
420 
421 	/* Window 1 is operating window */
422 	GO_WINDOW(sc, 1);
423 	for (i = 0; i < 31; i++)
424 		CSR_READ_1(sc, EP_W1_TX_STATUS);
425 
426 	/* get rid of stray intr's */
427 	CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
428 
429 	CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
430 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
431 
432 	if (ifp->if_flags & IFF_PROMISC)
433 		CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
434 		    FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
435 	else
436 		CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
437 		    FIL_MULTICAST | FIL_BRDCST);
438 
439 	if (!sc->epb.mii_trans)
440 		ep_ifmedia_upd(ifp);
441 
442 	if (sc->stat & F_HAS_TX_PLL)
443 		CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
444 	CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
445 	CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
446 
447 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
448 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;	/* just in case */
449 
450 #ifdef EP_LOCAL_STATS
451 	sc->rx_no_first = sc->rx_no_mbuf =
452 	    sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
453 #endif
454 	EP_FSET(sc, F_RX_FIRST);
455 	if (sc->top) {
456 		m_freem(sc->top);
457 		sc->top = sc->mcur = 0;
458 	}
459 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
460 	CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
461 
462 	GO_WINDOW(sc, 1);
463 	epstart_locked(ifp);
464 	callout_reset(&sc->watchdog_timer, hz, eptick, sc);
465 }
466 
467 static void
epstart(struct ifnet * ifp)468 epstart(struct ifnet *ifp)
469 {
470 	struct ep_softc *sc;
471 	sc = ifp->if_softc;
472 	EP_LOCK(sc);
473 	epstart_locked(ifp);
474 	EP_UNLOCK(sc);
475 }
476 
477 static void
epstart_locked(struct ifnet * ifp)478 epstart_locked(struct ifnet *ifp)
479 {
480 	struct ep_softc *sc;
481 	u_int len;
482 	struct mbuf *m, *m0;
483 	int pad, started;
484 
485 	sc = ifp->if_softc;
486 	if (sc->gone)
487 		return;
488 	EP_ASSERT_LOCKED(sc);
489 	EP_BUSY_WAIT(sc);
490 	if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
491 		return;
492 	started = 0;
493 startagain:
494 	/* Sneak a peek at the next packet */
495 	IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
496 	if (m0 == NULL)
497 		return;
498 	if (!started && (sc->stat & F_HAS_TX_PLL))
499 		CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
500 	started++;
501 	for (len = 0, m = m0; m != NULL; m = m->m_next)
502 		len += m->m_len;
503 
504 	pad = (4 - len) & 3;
505 
506 	/*
507 	 * The 3c509 automatically pads short packets to minimum
508 	 * ethernet length, but we drop packets that are too large.
509 	 * Perhaps we should truncate them instead?
510 	 */
511 	if (len + pad > ETHER_MAX_LEN) {
512 		/* packet is obviously too large: toss it */
513 		ifp->if_oerrors++;
514 		m_freem(m0);
515 		goto readcheck;
516 	}
517 	if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
518 		/* no room in FIFO */
519 		CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
520 		/* make sure */
521 		if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
522 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
523 			IFQ_DRV_PREPEND(&ifp->if_snd, m0);
524 			goto done;
525 		}
526 	} else
527 		CSR_WRITE_2(sc, EP_COMMAND,
528 		    SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
529 
530 	/* XXX 4.x and earlier would splhigh here */
531 
532 	CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
533 	/* Second dword meaningless */
534 	CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
535 
536 	if (EP_FTST(sc, F_ACCESS_32_BITS)) {
537 		for (m = m0; m != NULL; m = m->m_next) {
538 			if (m->m_len > 3)
539 				CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
540 				    mtod(m, uint32_t *), m->m_len / 4);
541 			if (m->m_len & 3)
542 				CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
543 				    mtod(m, uint8_t *)+(m->m_len & (~3)),
544 				    m->m_len & 3);
545 		}
546 	} else {
547 		for (m = m0; m != NULL; m = m->m_next) {
548 			if (m->m_len > 1)
549 				CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
550 				    mtod(m, uint16_t *), m->m_len / 2);
551 			if (m->m_len & 1)
552 				CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
553 				    *(mtod(m, uint8_t *)+m->m_len - 1));
554 		}
555 	}
556 
557 	while (pad--)
558 		CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0);	/* Padding */
559 
560 	/* XXX and drop splhigh here */
561 
562 	BPF_MTAP(ifp, m0);
563 
564 	sc->tx_timer = 2;
565 	ifp->if_opackets++;
566 	m_freem(m0);
567 
568 	/*
569 	 * Is another packet coming in? We don't want to overflow
570 	 * the tiny RX fifo.
571 	 */
572 readcheck:
573 	if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
574 		/*
575 		 * we check if we have packets left, in that case
576 		 * we prepare to come back later
577 		 */
578 		if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
579 			CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
580 		goto done;
581 	}
582 	goto startagain;
583 done:;
584 	return;
585 }
586 
587 void
ep_intr(void * arg)588 ep_intr(void *arg)
589 {
590 	struct ep_softc *sc;
591 
592 	sc = (struct ep_softc *) arg;
593 	EP_LOCK(sc);
594 	ep_intr_locked(sc);
595 	EP_UNLOCK(sc);
596 }
597 
598 static void
ep_intr_locked(struct ep_softc * sc)599 ep_intr_locked(struct ep_softc *sc)
600 {
601 	int status;
602 	struct ifnet *ifp;
603 
604 	/* XXX 4.x splbio'd here to reduce interruptability */
605 
606 	/*
607 	 * quick fix: Try to detect an interrupt when the card goes away.
608 	 */
609 	if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff)
610 		return;
611 	ifp = sc->ifp;
612 
613 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);	/* disable all Ints */
614 
615 rescan:
616 
617 	while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
618 
619 		/* first acknowledge all interrupt sources */
620 		CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
621 
622 		if (status & (S_RX_COMPLETE | S_RX_EARLY))
623 			epread(sc);
624 		if (status & S_TX_AVAIL) {
625 			/* we need ACK */
626 			sc->tx_timer = 0;
627 			ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
628 			GO_WINDOW(sc, 1);
629 			CSR_READ_2(sc, EP_W1_FREE_TX);
630 			epstart_locked(ifp);
631 		}
632 		if (status & S_CARD_FAILURE) {
633 			sc->tx_timer = 0;
634 #ifdef EP_LOCAL_STATS
635 			device_printf(sc->dev, "\n\tStatus: %x\n", status);
636 			GO_WINDOW(sc, 4);
637 			printf("\tFIFO Diagnostic: %x\n",
638 			    CSR_READ_2(sc, EP_W4_FIFO_DIAG));
639 			printf("\tStat: %x\n", sc->stat);
640 			printf("\tIpackets=%d, Opackets=%d\n",
641 			    ifp->if_ipackets, ifp->if_opackets);
642 			printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
643 			    sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
644 			    sc->rx_overrunl, sc->tx_underrun);
645 #else
646 
647 #ifdef DIAGNOSTIC
648 			device_printf(sc->dev,
649 			    "Status: %x (input buffer overflow)\n", status);
650 #else
651 			++ifp->if_ierrors;
652 #endif
653 
654 #endif
655 			epinit_locked(sc);
656 			return;
657 		}
658 		if (status & S_TX_COMPLETE) {
659 			sc->tx_timer = 0;
660 			/*
661 			 * We need ACK. We do it at the end.
662 			 *
663 		         * We need to read TX_STATUS until we get a
664 			 * 0 status in order to turn off the interrupt flag.
665 		         */
666 			while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
667 			    TXS_COMPLETE) {
668 				if (status & TXS_SUCCES_INTR_REQ)
669 					;	/* nothing */
670 				else if (status &
671 				    (TXS_UNDERRUN | TXS_JABBER |
672 				    TXS_MAX_COLLISION)) {
673 					CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
674 					if (status & TXS_UNDERRUN) {
675 #ifdef EP_LOCAL_STATS
676 						sc->tx_underrun++;
677 #endif
678 					}
679 					if (status & TXS_MAX_COLLISION) {
680 						/*
681 						 * TXS_MAX_COLLISION we
682 						 * shouldn't get here
683 						 */
684 						++ifp->if_collisions;
685 					}
686 					++ifp->if_oerrors;
687 					CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
688 					/*
689 				         * To have a tx_avail_int but giving
690 					 * the chance to the Reception
691 				         */
692 					if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
693 						CSR_WRITE_2(sc, EP_COMMAND,
694 						    SET_TX_AVAIL_THRESH | 8);
695 				}
696 				/* pops up the next status */
697 				CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
698 			}	/* while */
699 			ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
700 			GO_WINDOW(sc, 1);
701 			CSR_READ_2(sc, EP_W1_FREE_TX);
702 			epstart_locked(ifp);
703 		}	/* end TX_COMPLETE */
704 	}
705 
706 	CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);	/* ACK int Latch */
707 
708 	if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
709 		goto rescan;
710 
711 	/* re-enable Ints */
712 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
713 }
714 
715 static void
epread(struct ep_softc * sc)716 epread(struct ep_softc *sc)
717 {
718 	struct mbuf *top, *mcur, *m;
719 	struct ifnet *ifp;
720 	int lenthisone;
721 	short rx_fifo2, status;
722 	short rx_fifo;
723 
724 /* XXX Must be called with sc locked */
725 
726 	ifp = sc->ifp;
727 	status = CSR_READ_2(sc, EP_W1_RX_STATUS);
728 
729 read_again:
730 
731 	if (status & ERR_RX) {
732 		++ifp->if_ierrors;
733 		if (status & ERR_RX_OVERRUN) {
734 			/*
735 		         * We can think the rx latency is actually
736 			 * greather than we expect
737 		         */
738 #ifdef EP_LOCAL_STATS
739 			if (EP_FTST(sc, F_RX_FIRST))
740 				sc->rx_overrunf++;
741 			else
742 				sc->rx_overrunl++;
743 #endif
744 		}
745 		goto out;
746 	}
747 	rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
748 
749 	if (EP_FTST(sc, F_RX_FIRST)) {
750 		MGETHDR(m, M_NOWAIT, MT_DATA);
751 		if (!m)
752 			goto out;
753 		if (rx_fifo >= MINCLSIZE)
754 			MCLGET(m, M_NOWAIT);
755 		sc->top = sc->mcur = top = m;
756 #define EROUND  ((sizeof(struct ether_header) + 3) & ~3)
757 #define EOFF    (EROUND - sizeof(struct ether_header))
758 		top->m_data += EOFF;
759 
760 		/* Read what should be the header. */
761 		CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
762 		    mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
763 		top->m_len = sizeof(struct ether_header);
764 		rx_fifo -= sizeof(struct ether_header);
765 		sc->cur_len = rx_fifo2;
766 	} else {
767 		/* come here if we didn't have a complete packet last time */
768 		top = sc->top;
769 		m = sc->mcur;
770 		sc->cur_len += rx_fifo2;
771 	}
772 
773 	/* Reads what is left in the RX FIFO */
774 	while (rx_fifo > 0) {
775 		lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
776 		if (lenthisone == 0) {	/* no room in this one */
777 			mcur = m;
778 			MGET(m, M_NOWAIT, MT_DATA);
779 			if (!m)
780 				goto out;
781 			if (rx_fifo >= MINCLSIZE)
782 				MCLGET(m, M_NOWAIT);
783 			m->m_len = 0;
784 			mcur->m_next = m;
785 			lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
786 		}
787 		if (EP_FTST(sc, F_ACCESS_32_BITS)) {
788 			/* default for EISA configured cards */
789 			CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
790 			    (uint32_t *)(mtod(m, caddr_t)+m->m_len),
791 			    lenthisone / 4);
792 			m->m_len += (lenthisone & ~3);
793 			if (lenthisone & 3)
794 				CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
795 				    mtod(m, caddr_t)+m->m_len, lenthisone & 3);
796 			m->m_len += (lenthisone & 3);
797 		} else {
798 			CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
799 			    (uint16_t *)(mtod(m, caddr_t)+m->m_len),
800 			    lenthisone / 2);
801 			m->m_len += lenthisone;
802 			if (lenthisone & 1)
803 				*(mtod(m, caddr_t)+m->m_len - 1) =
804 				    CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
805 		}
806 		rx_fifo -= lenthisone;
807 	}
808 
809 	if (status & ERR_RX_INCOMPLETE) {
810 		/* we haven't received the complete packet */
811 		sc->mcur = m;
812 #ifdef EP_LOCAL_STATS
813 		/* to know how often we come here */
814 		sc->rx_no_first++;
815 #endif
816 		EP_FRST(sc, F_RX_FIRST);
817 		status = CSR_READ_2(sc, EP_W1_RX_STATUS);
818 		if (!(status & ERR_RX_INCOMPLETE)) {
819 			/*
820 			 * We see if by now, the packet has completly
821 			 * arrived
822 			 */
823 			goto read_again;
824 		}
825 		CSR_WRITE_2(sc, EP_COMMAND,
826 		    SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
827 		return;
828 	}
829 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
830 	++ifp->if_ipackets;
831 	EP_FSET(sc, F_RX_FIRST);
832 	top->m_pkthdr.rcvif = sc->ifp;
833 	top->m_pkthdr.len = sc->cur_len;
834 
835 	/*
836 	 * Drop locks before calling if_input() since it may re-enter
837 	 * ep_start() in the netisr case.  This would result in a
838 	 * lock reversal.  Better performance might be obtained by
839 	 * chaining all packets received, dropping the lock, and then
840 	 * calling if_input() on each one.
841 	 */
842 	EP_UNLOCK(sc);
843 	(*ifp->if_input) (ifp, top);
844 	EP_LOCK(sc);
845 	sc->top = 0;
846 	EP_BUSY_WAIT(sc);
847 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
848 	return;
849 
850 out:
851 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
852 	if (sc->top) {
853 		m_freem(sc->top);
854 		sc->top = 0;
855 #ifdef EP_LOCAL_STATS
856 		sc->rx_no_mbuf++;
857 #endif
858 	}
859 	EP_FSET(sc, F_RX_FIRST);
860 	EP_BUSY_WAIT(sc);
861 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
862 }
863 
864 static int
ep_ifmedia_upd(struct ifnet * ifp)865 ep_ifmedia_upd(struct ifnet *ifp)
866 {
867 	struct ep_softc *sc = ifp->if_softc;
868 	int i = 0, j;
869 
870 	GO_WINDOW(sc, 0);
871 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
872 	GO_WINDOW(sc, 4);
873 	CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
874 	GO_WINDOW(sc, 0);
875 
876 	switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
877 	case IFM_10_T:
878 		if (sc->ep_connectors & UTP) {
879 			i = ACF_CONNECTOR_UTP;
880 			GO_WINDOW(sc, 4);
881 			CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
882 		}
883 		break;
884 	case IFM_10_2:
885 		if (sc->ep_connectors & BNC) {
886 			i = ACF_CONNECTOR_BNC;
887 			CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
888 			DELAY(DELAY_MULTIPLE * 1000);
889 		}
890 		break;
891 	case IFM_10_5:
892 		if (sc->ep_connectors & AUI)
893 			i = ACF_CONNECTOR_AUI;
894 		break;
895 	default:
896 		i = sc->ep_connector;
897 		device_printf(sc->dev,
898 		    "strange connector type in EEPROM: assuming AUI\n");
899 	}
900 
901 	GO_WINDOW(sc, 0);
902 	j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
903 	CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
904 
905 	return (0);
906 }
907 
908 static void
ep_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)909 ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
910 {
911 	struct ep_softc *sc = ifp->if_softc;
912 	uint16_t ms;
913 
914 	switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
915 	case IFM_10_T:
916 		GO_WINDOW(sc, 4);
917 		ms = CSR_READ_2(sc, EP_W4_MEDIA_TYPE);
918 		GO_WINDOW(sc, 0);
919 		ifmr->ifm_status = IFM_AVALID;
920 		if (ms & MT_LB) {
921 			ifmr->ifm_status |= IFM_ACTIVE;
922 			ifmr->ifm_active = IFM_ETHER | IFM_10_T;
923 		} else {
924 			ifmr->ifm_active = IFM_ETHER | IFM_NONE;
925 		}
926 		break;
927 	default:
928 		ifmr->ifm_active = sc->ifmedia.ifm_media;
929 		break;
930 	}
931 }
932 
933 static int
epioctl(struct ifnet * ifp,u_long cmd,caddr_t data)934 epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
935 {
936 	struct ep_softc *sc = ifp->if_softc;
937 	struct ifreq *ifr = (struct ifreq *) data;
938 	int error = 0;
939 
940 	switch (cmd) {
941 	case SIOCSIFFLAGS:
942 		EP_LOCK(sc);
943 		if (((ifp->if_flags & IFF_UP) == 0) &&
944 		    (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
945 			epstop(sc);
946 		} else
947 			/* reinitialize card on any parameter change */
948 			epinit_locked(sc);
949 		EP_UNLOCK(sc);
950 		break;
951 	case SIOCADDMULTI:
952 	case SIOCDELMULTI:
953 		/*
954 		 * The Etherlink III has no programmable multicast
955 		 * filter.  We always initialize the card to be
956 		 * promiscuous to multicast, since we're always a
957 		 * member of the ALL-SYSTEMS group, so there's no
958 		 * need to process SIOC*MULTI requests.
959 		 */
960 		error = 0;
961 		break;
962 	case SIOCSIFMEDIA:
963 	case SIOCGIFMEDIA:
964 		if (!sc->epb.mii_trans)
965 			error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
966 		else
967 			error = EINVAL;
968 		break;
969 	default:
970 		error = ether_ioctl(ifp, cmd, data);
971 		break;
972 	}
973 	return (error);
974 }
975 
976 static void
eptick(void * arg)977 eptick(void *arg)
978 {
979 	struct ep_softc *sc;
980 
981 	sc = arg;
982 	if (sc->tx_timer != 0 && --sc->tx_timer == 0)
983 		epwatchdog(sc);
984 	callout_reset(&sc->watchdog_timer, hz, eptick, sc);
985 }
986 
987 static void
epwatchdog(struct ep_softc * sc)988 epwatchdog(struct ep_softc *sc)
989 {
990 	struct ifnet *ifp;
991 
992 	ifp = sc->ifp;
993 	if (sc->gone)
994 		return;
995 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
996 	epstart_locked(ifp);
997 	ep_intr_locked(sc);
998 }
999 
1000 static void
epstop(struct ep_softc * sc)1001 epstop(struct ep_softc *sc)
1002 {
1003 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
1004 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
1005 	EP_BUSY_WAIT(sc);
1006 
1007 	CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
1008 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
1009 	DELAY(800);
1010 
1011 	CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
1012 	EP_BUSY_WAIT(sc);
1013 	CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
1014 	EP_BUSY_WAIT(sc);
1015 
1016 	CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
1017 	CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
1018 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
1019 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);
1020 
1021 	sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1022 	callout_stop(&sc->watchdog_timer);
1023 }
1024