1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2001 Wind River Systems, Inc.
5 * All rights reserved.
6 * Written by: John Baldwin <jhb@FreeBSD.org>
7 *
8 * Copyright (c) 2009 Jeffrey Roberson <jeff@freebsd.org>
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the author nor the names of any co-contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 */
35
36 /*
37 * This module provides MI support for per-cpu data.
38 *
39 * Each architecture determines the mapping of logical CPU IDs to physical
40 * CPUs. The requirements of this mapping are as follows:
41 * - Logical CPU IDs must reside in the range 0 ... MAXCPU - 1.
42 * - The mapping is not required to be dense. That is, there may be
43 * gaps in the mappings.
44 * - The platform sets the value of MAXCPU in <machine/param.h>.
45 * - It is suggested, but not required, that in the non-SMP case, the
46 * platform define MAXCPU to be 1 and define the logical ID of the
47 * sole CPU as 0.
48 */
49
50 #include <sys/cdefs.h>
51 #include "opt_ddb.h"
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/sysctl.h>
56 #include <sys/lock.h>
57 #include <sys/malloc.h>
58 #include <sys/pcpu.h>
59 #include <sys/proc.h>
60 #include <sys/smp.h>
61 #include <sys/sx.h>
62 #include <vm/uma.h>
63 #include <ddb/ddb.h>
64
65 static MALLOC_DEFINE(M_PCPU, "Per-cpu", "Per-cpu resource accouting.");
66
67 struct dpcpu_free {
68 uintptr_t df_start;
69 int df_len;
70 TAILQ_ENTRY(dpcpu_free) df_link;
71 };
72
73 DPCPU_DEFINE_STATIC(char, modspace[DPCPU_MODMIN] __aligned(__alignof(void *)));
74 static TAILQ_HEAD(, dpcpu_free) dpcpu_head = TAILQ_HEAD_INITIALIZER(dpcpu_head);
75 static struct sx dpcpu_lock;
76 uintptr_t dpcpu_off[MAXCPU];
77 struct pcpu *cpuid_to_pcpu[MAXCPU];
78 struct cpuhead cpuhead = STAILQ_HEAD_INITIALIZER(cpuhead);
79
80 /*
81 * Initialize the MI portions of a struct pcpu.
82 */
83 void
pcpu_init(struct pcpu * pcpu,int cpuid,size_t size)84 pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
85 {
86
87 bzero(pcpu, size);
88 KASSERT(cpuid >= 0 && cpuid < MAXCPU,
89 ("pcpu_init: invalid cpuid %d", cpuid));
90 pcpu->pc_cpuid = cpuid;
91 cpuid_to_pcpu[cpuid] = pcpu;
92 STAILQ_INSERT_TAIL(&cpuhead, pcpu, pc_allcpu);
93 cpu_pcpu_init(pcpu, cpuid, size);
94 pcpu->pc_rm_queue.rmq_next = &pcpu->pc_rm_queue;
95 pcpu->pc_rm_queue.rmq_prev = &pcpu->pc_rm_queue;
96 pcpu->pc_zpcpu_offset = zpcpu_offset_cpu(cpuid);
97 }
98
99 void
dpcpu_init(void * dpcpu,int cpuid)100 dpcpu_init(void *dpcpu, int cpuid)
101 {
102 struct pcpu *pcpu;
103
104 pcpu = pcpu_find(cpuid);
105 pcpu->pc_dynamic = (uintptr_t)dpcpu - DPCPU_START;
106
107 /*
108 * Initialize defaults from our linker section.
109 */
110 memcpy(dpcpu, (void *)DPCPU_START, DPCPU_BYTES);
111
112 /*
113 * Place it in the global pcpu offset array.
114 */
115 dpcpu_off[cpuid] = pcpu->pc_dynamic;
116 }
117
118 static void
dpcpu_startup(void * dummy __unused)119 dpcpu_startup(void *dummy __unused)
120 {
121 struct dpcpu_free *df;
122
123 df = malloc(sizeof(*df), M_PCPU, M_WAITOK | M_ZERO);
124 df->df_start = (uintptr_t)&DPCPU_NAME(modspace);
125 df->df_len = DPCPU_MODMIN;
126 TAILQ_INSERT_HEAD(&dpcpu_head, df, df_link);
127 sx_init(&dpcpu_lock, "dpcpu alloc lock");
128 }
129 SYSINIT(dpcpu, SI_SUB_KLD, SI_ORDER_FIRST, dpcpu_startup, NULL);
130
131 /*
132 * UMA_ZONE_PCPU zones for general kernel use.
133 */
134 uma_zone_t pcpu_zone_4;
135 uma_zone_t pcpu_zone_8;
136 uma_zone_t pcpu_zone_16;
137 uma_zone_t pcpu_zone_32;
138 uma_zone_t pcpu_zone_64;
139
140 static void
pcpu_zones_startup(void)141 pcpu_zones_startup(void)
142 {
143
144 pcpu_zone_4 = uma_zcreate("pcpu-4", 4,
145 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
146 pcpu_zone_8 = uma_zcreate("pcpu-8", 8,
147 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
148 pcpu_zone_16 = uma_zcreate("pcpu-16", 16,
149 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
150 pcpu_zone_32 = uma_zcreate("pcpu-32", 32,
151 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
152 pcpu_zone_64 = uma_zcreate("pcpu-64", 64,
153 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
154 }
155 SYSINIT(pcpu_zones, SI_SUB_COUNTER, SI_ORDER_FIRST, pcpu_zones_startup, NULL);
156
157 /*
158 * First-fit extent based allocator for allocating space in the per-cpu
159 * region reserved for modules. This is only intended for use by the
160 * kernel linkers to place module linker sets.
161 */
162 void *
dpcpu_alloc(int size)163 dpcpu_alloc(int size)
164 {
165 struct dpcpu_free *df;
166 void *s;
167
168 s = NULL;
169 size = roundup2(size, sizeof(void *));
170 sx_xlock(&dpcpu_lock);
171 TAILQ_FOREACH(df, &dpcpu_head, df_link) {
172 if (df->df_len < size)
173 continue;
174 if (df->df_len == size) {
175 s = (void *)df->df_start;
176 TAILQ_REMOVE(&dpcpu_head, df, df_link);
177 free(df, M_PCPU);
178 break;
179 }
180 s = (void *)df->df_start;
181 df->df_len -= size;
182 df->df_start = df->df_start + size;
183 break;
184 }
185 sx_xunlock(&dpcpu_lock);
186
187 return (s);
188 }
189
190 /*
191 * Free dynamic per-cpu space at module unload time.
192 */
193 void
dpcpu_free(void * s,int size)194 dpcpu_free(void *s, int size)
195 {
196 struct dpcpu_free *df;
197 struct dpcpu_free *dn;
198 uintptr_t start;
199 uintptr_t end;
200
201 size = roundup2(size, sizeof(void *));
202 start = (uintptr_t)s;
203 end = start + size;
204 /*
205 * Free a region of space and merge it with as many neighbors as
206 * possible. Keeping the list sorted simplifies this operation.
207 */
208 sx_xlock(&dpcpu_lock);
209 TAILQ_FOREACH(df, &dpcpu_head, df_link) {
210 if (df->df_start > end)
211 break;
212 /*
213 * If we expand at the end of an entry we may have to
214 * merge it with the one following it as well.
215 */
216 if (df->df_start + df->df_len == start) {
217 df->df_len += size;
218 dn = TAILQ_NEXT(df, df_link);
219 if (df->df_start + df->df_len == dn->df_start) {
220 df->df_len += dn->df_len;
221 TAILQ_REMOVE(&dpcpu_head, dn, df_link);
222 free(dn, M_PCPU);
223 }
224 sx_xunlock(&dpcpu_lock);
225 return;
226 }
227 if (df->df_start == end) {
228 df->df_start = start;
229 df->df_len += size;
230 sx_xunlock(&dpcpu_lock);
231 return;
232 }
233 }
234 dn = malloc(sizeof(*df), M_PCPU, M_WAITOK | M_ZERO);
235 dn->df_start = start;
236 dn->df_len = size;
237 if (df)
238 TAILQ_INSERT_BEFORE(df, dn, df_link);
239 else
240 TAILQ_INSERT_TAIL(&dpcpu_head, dn, df_link);
241 sx_xunlock(&dpcpu_lock);
242 }
243
244 /*
245 * Initialize the per-cpu storage from an updated linker-set region.
246 */
247 void
dpcpu_copy(void * s,int size)248 dpcpu_copy(void *s, int size)
249 {
250 #ifdef SMP
251 uintptr_t dpcpu;
252 int i;
253
254 CPU_FOREACH(i) {
255 dpcpu = dpcpu_off[i];
256 if (dpcpu == 0)
257 continue;
258 memcpy((void *)(dpcpu + (uintptr_t)s), s, size);
259 }
260 #else
261 memcpy((void *)(dpcpu_off[0] + (uintptr_t)s), s, size);
262 #endif
263 }
264
265 /*
266 * Destroy a struct pcpu.
267 */
268 void
pcpu_destroy(struct pcpu * pcpu)269 pcpu_destroy(struct pcpu *pcpu)
270 {
271
272 STAILQ_REMOVE(&cpuhead, pcpu, pcpu, pc_allcpu);
273 cpuid_to_pcpu[pcpu->pc_cpuid] = NULL;
274 dpcpu_off[pcpu->pc_cpuid] = 0;
275 }
276
277 /*
278 * Locate a struct pcpu by cpu id.
279 */
280 struct pcpu *
pcpu_find(u_int cpuid)281 pcpu_find(u_int cpuid)
282 {
283
284 return (cpuid_to_pcpu[cpuid]);
285 }
286
287 int
sysctl_dpcpu_quad(SYSCTL_HANDLER_ARGS)288 sysctl_dpcpu_quad(SYSCTL_HANDLER_ARGS)
289 {
290 uintptr_t dpcpu;
291 int64_t count;
292 int i;
293
294 count = 0;
295 CPU_FOREACH(i) {
296 dpcpu = dpcpu_off[i];
297 if (dpcpu == 0)
298 continue;
299 count += *(int64_t *)(dpcpu + (uintptr_t)arg1);
300 }
301 return (SYSCTL_OUT(req, &count, sizeof(count)));
302 }
303
304 int
sysctl_dpcpu_long(SYSCTL_HANDLER_ARGS)305 sysctl_dpcpu_long(SYSCTL_HANDLER_ARGS)
306 {
307 uintptr_t dpcpu;
308 long count;
309 int i;
310
311 count = 0;
312 CPU_FOREACH(i) {
313 dpcpu = dpcpu_off[i];
314 if (dpcpu == 0)
315 continue;
316 count += *(long *)(dpcpu + (uintptr_t)arg1);
317 }
318 return (SYSCTL_OUT(req, &count, sizeof(count)));
319 }
320
321 int
sysctl_dpcpu_int(SYSCTL_HANDLER_ARGS)322 sysctl_dpcpu_int(SYSCTL_HANDLER_ARGS)
323 {
324 uintptr_t dpcpu;
325 int count;
326 int i;
327
328 count = 0;
329 CPU_FOREACH(i) {
330 dpcpu = dpcpu_off[i];
331 if (dpcpu == 0)
332 continue;
333 count += *(int *)(dpcpu + (uintptr_t)arg1);
334 }
335 return (SYSCTL_OUT(req, &count, sizeof(count)));
336 }
337
338 #ifdef DDB
DB_SHOW_COMMAND(dpcpu_off,db_show_dpcpu_off)339 DB_SHOW_COMMAND(dpcpu_off, db_show_dpcpu_off)
340 {
341 int id;
342
343 CPU_FOREACH(id) {
344 db_printf("dpcpu_off[%2d] = 0x%jx (+ DPCPU_START = %p)\n",
345 id, (uintmax_t)dpcpu_off[id],
346 (void *)(uintptr_t)(dpcpu_off[id] + DPCPU_START));
347 }
348 }
349
350 static void
show_pcpu(struct pcpu * pc)351 show_pcpu(struct pcpu *pc)
352 {
353 struct thread *td;
354
355 db_printf("cpuid = %d\n", pc->pc_cpuid);
356 db_printf("dynamic pcpu = %p\n", (void *)pc->pc_dynamic);
357 db_printf("curthread = ");
358 td = pc->pc_curthread;
359 if (td != NULL)
360 db_printf("%p: pid %d tid %d critnest %d \"%s\"\n", td,
361 td->td_proc->p_pid, td->td_tid, td->td_critnest,
362 td->td_name);
363 else
364 db_printf("none\n");
365 db_printf("curpcb = %p\n", pc->pc_curpcb);
366 db_printf("fpcurthread = ");
367 td = pc->pc_fpcurthread;
368 if (td != NULL)
369 db_printf("%p: pid %d \"%s\"\n", td, td->td_proc->p_pid,
370 td->td_name);
371 else
372 db_printf("none\n");
373 db_printf("idlethread = ");
374 td = pc->pc_idlethread;
375 if (td != NULL)
376 db_printf("%p: tid %d \"%s\"\n", td, td->td_tid, td->td_name);
377 else
378 db_printf("none\n");
379 db_show_mdpcpu(pc);
380
381 #ifdef VIMAGE
382 db_printf("curvnet = %p\n", pc->pc_curthread->td_vnet);
383 #endif
384
385 #ifdef WITNESS
386 db_printf("spin locks held:\n");
387 witness_list_locks(&pc->pc_spinlocks, db_printf);
388 #endif
389 }
390
DB_SHOW_COMMAND(pcpu,db_show_pcpu)391 DB_SHOW_COMMAND(pcpu, db_show_pcpu)
392 {
393 struct pcpu *pc;
394 int id;
395
396 if (have_addr)
397 id = ((addr >> 4) % 16) * 10 + (addr % 16);
398 else
399 id = PCPU_GET(cpuid);
400 pc = pcpu_find(id);
401 if (pc == NULL) {
402 db_printf("CPU %d not found\n", id);
403 return;
404 }
405 show_pcpu(pc);
406 }
407
DB_SHOW_ALL_COMMAND(pcpu,db_show_cpu_all)408 DB_SHOW_ALL_COMMAND(pcpu, db_show_cpu_all)
409 {
410 struct pcpu *pc;
411 int id;
412
413 db_printf("Current CPU: %d\n\n", PCPU_GET(cpuid));
414 CPU_FOREACH(id) {
415 pc = pcpu_find(id);
416 if (pc != NULL) {
417 show_pcpu(pc);
418 db_printf("\n");
419 }
420 }
421 }
422 DB_SHOW_ALIAS(allpcpu, db_show_cpu_all);
423 #endif
424