xref: /dragonfly/sys/dev/drm/amd/display/dc/gpio/hw_hpd.c (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 
28 #include "include/gpio_types.h"
29 #include "hw_gpio.h"
30 #include "hw_hpd.h"
31 
32 #include "reg_helper.h"
33 #include "hpd_regs.h"
34 
35 #undef FN
36 #define FN(reg_name, field_name) \
37           hpd->shifts->field_name, hpd->masks->field_name
38 
39 #define CTX \
40           hpd->base.base.ctx
41 #define REG(reg)\
42           (hpd->regs->reg)
43 
dal_hw_hpd_construct(struct hw_hpd * pin,enum gpio_id id,uint32_t en,struct dc_context * ctx)44 static void dal_hw_hpd_construct(
45           struct hw_hpd *pin,
46           enum gpio_id id,
47           uint32_t en,
48           struct dc_context *ctx)
49 {
50           dal_hw_gpio_construct(&pin->base, id, en, ctx);
51 }
52 
dal_hw_hpd_destruct(struct hw_hpd * pin)53 static void dal_hw_hpd_destruct(
54           struct hw_hpd *pin)
55 {
56           dal_hw_gpio_destruct(&pin->base);
57 }
58 
59 
destruct(struct hw_hpd * hpd)60 static void destruct(
61           struct hw_hpd *hpd)
62 {
63           dal_hw_hpd_destruct(hpd);
64 }
65 
destroy(struct hw_gpio_pin ** ptr)66 static void destroy(
67           struct hw_gpio_pin **ptr)
68 {
69           struct hw_hpd *hpd = HW_HPD_FROM_BASE(*ptr);
70 
71           destruct(hpd);
72 
73           kfree(hpd);
74 
75           *ptr = NULL;
76 }
77 
get_value(const struct hw_gpio_pin * ptr,uint32_t * value)78 static enum gpio_result get_value(
79           const struct hw_gpio_pin *ptr,
80           uint32_t *value)
81 {
82           struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
83           uint32_t hpd_delayed = 0;
84 
85           /* in Interrupt mode we ask for SENSE bit */
86 
87           if (ptr->mode == GPIO_MODE_INTERRUPT) {
88 
89                     REG_GET(int_status,
90                               DC_HPD_SENSE_DELAYED, &hpd_delayed);
91 
92                     *value = hpd_delayed;
93                     return GPIO_RESULT_OK;
94           }
95 
96           /* in any other modes, operate as normal GPIO */
97 
98           return dal_hw_gpio_get_value(ptr, value);
99 }
100 
set_config(struct hw_gpio_pin * ptr,const struct gpio_config_data * config_data)101 static enum gpio_result set_config(
102           struct hw_gpio_pin *ptr,
103           const struct gpio_config_data *config_data)
104 {
105           struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
106 
107           if (!config_data)
108                     return GPIO_RESULT_INVALID_DATA;
109 
110           REG_UPDATE_2(toggle_filt_cntl,
111                     DC_HPD_CONNECT_INT_DELAY, config_data->config.hpd.delay_on_connect / 10,
112                     DC_HPD_DISCONNECT_INT_DELAY, config_data->config.hpd.delay_on_disconnect / 10);
113 
114           return GPIO_RESULT_OK;
115 }
116 
117 static const struct hw_gpio_pin_funcs funcs = {
118           .destroy = destroy,
119           .open = dal_hw_gpio_open,
120           .get_value = get_value,
121           .set_value = dal_hw_gpio_set_value,
122           .set_config = set_config,
123           .change_mode = dal_hw_gpio_change_mode,
124           .close = dal_hw_gpio_close,
125 };
126 
construct(struct hw_hpd * hpd,enum gpio_id id,uint32_t en,struct dc_context * ctx)127 static void construct(
128           struct hw_hpd *hpd,
129           enum gpio_id id,
130           uint32_t en,
131           struct dc_context *ctx)
132 {
133           dal_hw_hpd_construct(hpd, id, en, ctx);
134           hpd->base.base.funcs = &funcs;
135 }
136 
dal_hw_hpd_create(struct dc_context * ctx,enum gpio_id id,uint32_t en)137 struct hw_gpio_pin *dal_hw_hpd_create(
138           struct dc_context *ctx,
139           enum gpio_id id,
140           uint32_t en)
141 {
142           struct hw_hpd *hpd;
143 
144           if (id != GPIO_ID_HPD) {
145                     ASSERT_CRITICAL(false);
146                     return NULL;
147           }
148 
149           if ((en < GPIO_HPD_MIN) || (en > GPIO_HPD_MAX)) {
150                     ASSERT_CRITICAL(false);
151                     return NULL;
152           }
153 
154           hpd = kzalloc(sizeof(struct hw_hpd), GFP_KERNEL);
155           if (!hpd) {
156                     ASSERT_CRITICAL(false);
157                     return NULL;
158           }
159 
160           construct(hpd, id, en, ctx);
161           return &hpd->base.base;
162 }
163