1 /* $OpenBSD: ubsecvar.h,v 1.36 2003/06/04 16:02:41 jason Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Theo de Raadt 5 * Copyright (c) 2001 Patrik Lindergren (patrik@ipunplugged.com) 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Effort sponsored in part by the Defense Advanced Research Projects 29 * Agency (DARPA) and Air Force Research Laboratory, Air Force 30 * Materiel Command, USAF, under agreement number F30602-01-2-0537. 31 * 32 */ 33 34 /* Maximum queue length */ 35 #ifndef UBS_MAX_NQUEUE 36 #define UBS_MAX_NQUEUE 60 37 #endif 38 39 #define UBS_MAX_SCATTER 64 /* Maximum scatter/gather depth */ 40 41 #ifndef UBS_MAX_AGGR 42 #define UBS_MAX_AGGR 5 /* Maximum aggregation count */ 43 #endif 44 45 #define UBSEC_CARD(sid) (((sid) & 0xf0000000) >> 28) 46 #define UBSEC_SESSION(sid) ( (sid) & 0x0fffffff) 47 #define UBSEC_SID(crd, sesn) (((crd) << 28) | ((sesn) & 0x0fffffff)) 48 49 #define UBS_DEF_RTY 0xff /* PCI Retry Timeout */ 50 #define UBS_DEF_TOUT 0xff /* PCI TRDY Timeout */ 51 #define UBS_DEF_CACHELINE 0x01 /* Cache Line setting */ 52 53 struct ubsec_dma_alloc { 54 u_int32_t dma_paddr; 55 caddr_t dma_vaddr; 56 bus_dmamap_t dma_map; 57 bus_dma_segment_t dma_seg; 58 bus_size_t dma_size; 59 int dma_nseg; 60 }; 61 62 struct ubsec_q2 { 63 SIMPLEQ_ENTRY(ubsec_q2) q_next; 64 struct ubsec_dma_alloc q_mcr; 65 struct ubsec_dma_alloc q_ctx; 66 u_int q_type; 67 }; 68 69 struct ubsec_q2_rng { 70 struct ubsec_q2 rng_q; 71 struct ubsec_dma_alloc rng_buf; 72 int rng_used; 73 }; 74 75 /* C = (M ^ E) mod N */ 76 #define UBS_MODEXP_PAR_M 0 77 #define UBS_MODEXP_PAR_E 1 78 #define UBS_MODEXP_PAR_N 2 79 struct ubsec_q2_modexp { 80 struct ubsec_q2 me_q; 81 struct cryptkop * me_krp; 82 struct ubsec_dma_alloc me_M; 83 struct ubsec_dma_alloc me_E; 84 struct ubsec_dma_alloc me_C; 85 struct ubsec_dma_alloc me_epb; 86 int me_modbits; 87 int me_shiftbits; 88 int me_normbits; 89 }; 90 91 #define UBS_RSAPRIV_PAR_P 0 92 #define UBS_RSAPRIV_PAR_Q 1 93 #define UBS_RSAPRIV_PAR_DP 2 94 #define UBS_RSAPRIV_PAR_DQ 3 95 #define UBS_RSAPRIV_PAR_PINV 4 96 #define UBS_RSAPRIV_PAR_MSGIN 5 97 #define UBS_RSAPRIV_PAR_MSGOUT 6 98 struct ubsec_q2_rsapriv { 99 struct ubsec_q2 rpr_q; 100 struct cryptkop * rpr_krp; 101 struct ubsec_dma_alloc rpr_msgin; 102 struct ubsec_dma_alloc rpr_msgout; 103 }; 104 105 #define UBSEC_RNG_BUFSIZ 16 /* measured in 32bit words */ 106 107 struct ubsec_dmachunk { 108 struct ubsec_mcr d_mcr; 109 struct ubsec_mcr_add d_mcradd[UBS_MAX_AGGR-1]; 110 struct ubsec_pktbuf d_sbuf[UBS_MAX_SCATTER-1]; 111 struct ubsec_pktbuf d_dbuf[UBS_MAX_SCATTER-1]; 112 u_int32_t d_macbuf[5]; 113 union { 114 struct ubsec_pktctx_long ctxl; 115 struct ubsec_pktctx ctx; 116 } d_ctx; 117 }; 118 119 struct ubsec_dma { 120 SIMPLEQ_ENTRY(ubsec_dma) d_next; 121 struct ubsec_dmachunk *d_dma; 122 struct ubsec_dma_alloc d_alloc; 123 }; 124 125 #define UBS_FLAGS_KEY 0x01 /* has key accelerator */ 126 #define UBS_FLAGS_LONGCTX 0x02 /* uses long ipsec ctx */ 127 #define UBS_FLAGS_BIGKEY 0x04 /* 2048bit keys */ 128 #define UBS_FLAGS_HWNORM 0x08 /* hardware normalization */ 129 #define UBS_FLAGS_RNG 0x10 /* hardware rng */ 130 131 struct ubsec_q { 132 SIMPLEQ_ENTRY(ubsec_q) q_next; 133 int q_nstacked_mcrs; 134 struct ubsec_q *q_stacked_mcr[UBS_MAX_AGGR-1]; 135 struct cryptop *q_crp; 136 struct ubsec_dma *q_dma; 137 138 struct mbuf *q_src_m, *q_dst_m; 139 struct uio *q_src_io, *q_dst_io; 140 141 bus_dmamap_t q_src_map; 142 bus_dmamap_t q_dst_map; 143 144 int q_sesn; 145 int q_flags; 146 }; 147 148 struct ubsec_softc { 149 struct device sc_dv; /* generic device */ 150 void *sc_ih; /* interrupt handler cookie */ 151 bus_space_handle_t sc_sh; /* memory handle */ 152 bus_space_tag_t sc_st; /* memory tag */ 153 bus_dma_tag_t sc_dmat; /* dma tag */ 154 int sc_flags; /* device specific flags */ 155 u_int32_t sc_statmask; /* interrupt status mask */ 156 int32_t sc_cid; /* crypto tag */ 157 SIMPLEQ_HEAD(,ubsec_q) sc_queue; /* packet queue, mcr1 */ 158 int sc_nqueue; /* count enqueued, mcr1 */ 159 SIMPLEQ_HEAD(,ubsec_q) sc_qchip; /* on chip, mcr1 */ 160 SIMPLEQ_HEAD(,ubsec_q) sc_freequeue; /* list of free queue elements */ 161 SIMPLEQ_HEAD(,ubsec_q2) sc_queue2; /* packet queue, mcr2 */ 162 int sc_nqueue2; /* count enqueued, mcr2 */ 163 SIMPLEQ_HEAD(,ubsec_q2) sc_qchip2; /* on chip, mcr2 */ 164 int sc_nsessions; /* # of sessions */ 165 struct ubsec_session *sc_sessions; /* sessions */ 166 struct timeout sc_rngto; /* rng timeout */ 167 int sc_rnghz; /* rng poll time */ 168 struct ubsec_q2_rng sc_rng; 169 struct ubsec_dma sc_dmaa[UBS_MAX_NQUEUE]; 170 struct ubsec_q *sc_queuea[UBS_MAX_NQUEUE]; 171 SIMPLEQ_HEAD(,ubsec_q2) sc_q2free; /* free list */ 172 }; 173 174 #define UBSEC_QFLAGS_COPYOUTIV 0x1 175 176 struct ubsec_session { 177 u_int32_t ses_used; 178 u_int32_t ses_deskey[6]; /* 3DES key */ 179 u_int32_t ses_hminner[5]; /* hmac inner state */ 180 u_int32_t ses_hmouter[5]; /* hmac outer state */ 181 u_int32_t ses_iv[2]; /* [3]DES iv */ 182 }; 183 184 struct ubsec_stats { 185 u_int64_t hst_ibytes; 186 u_int64_t hst_obytes; 187 u_int32_t hst_ipackets; 188 u_int32_t hst_opackets; 189 u_int32_t hst_invalid; 190 u_int32_t hst_nomem; 191 u_int32_t hst_queuefull; 192 u_int32_t hst_dmaerr; 193 u_int32_t hst_mcrerr; 194 u_int32_t hst_nodmafree; 195 }; 196