1 /*-
2 * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 /*
33 *
34 * Device driver for Crystal Semiconductor CS8920 based ethernet
35 * adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997
36 */
37
38 /*
39 #define CS_DEBUG
40 */
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/malloc.h>
45 #include <sys/mbuf.h>
46 #include <sys/socket.h>
47 #include <sys/sockio.h>
48 #include <sys/kernel.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
51
52 #include <sys/module.h>
53 #include <sys/bus.h>
54 #include <machine/bus.h>
55 #include <sys/rman.h>
56 #include <machine/resource.h>
57
58 #include <net/if.h>
59 #include <net/if_var.h>
60 #include <net/if_arp.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/ethernet.h>
65 #include <net/bpf.h>
66
67 #include <dev/cs/if_csvar.h>
68 #include <dev/cs/if_csreg.h>
69
70 #ifdef CS_USE_64K_DMA
71 #define CS_DMA_BUFFER_SIZE 65536
72 #else
73 #define CS_DMA_BUFFER_SIZE 16384
74 #endif
75
76 static void cs_init(void *);
77 static void cs_init_locked(struct cs_softc *);
78 static int cs_ioctl(struct ifnet *, u_long, caddr_t);
79 static void cs_start(struct ifnet *);
80 static void cs_start_locked(struct ifnet *);
81 static void cs_stop(struct cs_softc *);
82 static void cs_reset(struct cs_softc *);
83 static void cs_watchdog(void *);
84
85 static int cs_mediachange(struct ifnet *);
86 static void cs_mediastatus(struct ifnet *, struct ifmediareq *);
87 static int cs_mediaset(struct cs_softc *, int);
88
89 static void cs_write_mbufs(struct cs_softc*, struct mbuf*);
90 static void cs_xmit_buf(struct cs_softc*);
91 static int cs_get_packet(struct cs_softc*);
92 static void cs_setmode(struct cs_softc*);
93
94 static int get_eeprom_data(struct cs_softc *sc, int, int, uint16_t *);
95 static int get_eeprom_cksum(int, int, uint16_t *);
96 static int wait_eeprom_ready( struct cs_softc *);
97 static void control_dc_dc( struct cs_softc *, int );
98 static int enable_tp(struct cs_softc *);
99 static int enable_aui(struct cs_softc *);
100 static int enable_bnc(struct cs_softc *);
101 static int cs_duplex_auto(struct cs_softc *);
102
103 devclass_t cs_devclass;
104 driver_intr_t csintr;
105
106 /* sysctl vars */
107 static SYSCTL_NODE(_hw, OID_AUTO, cs, CTLFLAG_RD, 0, "cs device parameters");
108
109 int cs_ignore_cksum_failure = 0;
110 SYSCTL_INT(_hw_cs, OID_AUTO, ignore_checksum_failure, CTLFLAG_RWTUN,
111 &cs_ignore_cksum_failure, 0,
112 "ignore checksum errors in cs card EEPROM");
113
114 static int cs_recv_delay = 570;
115 SYSCTL_INT(_hw_cs, OID_AUTO, recv_delay, CTLFLAG_RWTUN, &cs_recv_delay, 570, "");
116
117 static int cs8900_eeint2irq[16] = {
118 10, 11, 12, 5, 255, 255, 255, 255,
119 255, 255, 255, 255, 255, 255, 255, 255
120 };
121
122 static int cs8900_irq2eeint[16] = {
123 255, 255, 255, 255, 255, 3, 255, 255,
124 255, 0, 1, 2, 255, 255, 255, 255
125 };
126
127 static int
get_eeprom_data(struct cs_softc * sc,int off,int len,uint16_t * buffer)128 get_eeprom_data(struct cs_softc *sc, int off, int len, uint16_t *buffer)
129 {
130 int i;
131
132 #ifdef CS_DEBUG
133 device_printf(sc->dev, "EEPROM data from %x for %x:\n", off, len);
134 #endif
135 for (i=0; i < len; i++) {
136 if (wait_eeprom_ready(sc) < 0)
137 return (-1);
138 /* Send command to EEPROM to read */
139 cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD);
140 if (wait_eeprom_ready(sc) < 0)
141 return (-1);
142 buffer[i] = cs_readreg(sc, PP_EEData);
143
144 #ifdef CS_DEBUG
145 printf("%04x ",buffer[i]);
146 #endif
147 }
148
149 #ifdef CS_DEBUG
150 printf("\n");
151 #endif
152 return (0);
153 }
154
155 static int
get_eeprom_cksum(int off,int len,uint16_t * buffer)156 get_eeprom_cksum(int off, int len, uint16_t *buffer)
157 {
158 int i;
159 uint16_t cksum=0;
160
161 for (i = 0; i < len; i++)
162 cksum += buffer[i];
163 cksum &= 0xffff;
164 if (cksum == 0 || cs_ignore_cksum_failure)
165 return (0);
166 return (-1);
167 }
168
169 static int
wait_eeprom_ready(struct cs_softc * sc)170 wait_eeprom_ready(struct cs_softc *sc)
171 {
172 int i;
173
174 /*
175 * From the CS8900A datasheet, section 3.5.2:
176 * "Before issuing any command to the EEPROM, the host must wait
177 * for the SIBUSY bit (Register 16, SelfST, bit 8) to clear. After
178 * each command has been issued, the host must wait again for SIBUSY
179 * to clear."
180 *
181 * Before we issue the command, we should be !busy, so that will
182 * be fast. The datasheet suggests that clock out from the part
183 * per word will be on the order of 25us, which is consistant with
184 * the 1MHz serial clock and 16bits... We should never hit 100,
185 * let alone 15,000 here. The original code did an unconditional
186 * 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us.
187 */
188 for (i = 0; i < 15000; i++) /* 30ms max */
189 if (!(cs_readreg(sc, PP_SelfST) & SI_BUSY))
190 return (0);
191 return (1);
192 }
193
194 static void
control_dc_dc(struct cs_softc * sc,int on_not_off)195 control_dc_dc(struct cs_softc *sc, int on_not_off)
196 {
197 unsigned int self_control = HCB1_ENBL;
198
199 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off)
200 self_control |= HCB1;
201 else
202 self_control &= ~HCB1;
203 cs_writereg(sc, PP_SelfCTL, self_control);
204 DELAY(500000); /* Bad! */
205 }
206
207
208 static int
cs_duplex_auto(struct cs_softc * sc)209 cs_duplex_auto(struct cs_softc *sc)
210 {
211 int i, error=0;
212
213 cs_writereg(sc, PP_AutoNegCTL,
214 RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE);
215 for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) {
216 if (i > 4000) {
217 device_printf(sc->dev,
218 "full/half duplex auto negotiation timeout\n");
219 error = ETIMEDOUT;
220 break;
221 }
222 DELAY(1000);
223 }
224 return (error);
225 }
226
227 static int
enable_tp(struct cs_softc * sc)228 enable_tp(struct cs_softc *sc)
229 {
230
231 cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY);
232 control_dc_dc(sc, 0);
233 return (0);
234 }
235
236 static int
enable_aui(struct cs_softc * sc)237 enable_aui(struct cs_softc *sc)
238 {
239
240 cs_writereg(sc, PP_LineCTL,
241 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
242 control_dc_dc(sc, 0);
243 return (0);
244 }
245
246 static int
enable_bnc(struct cs_softc * sc)247 enable_bnc(struct cs_softc *sc)
248 {
249
250 cs_writereg(sc, PP_LineCTL,
251 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
252 control_dc_dc(sc, 1);
253 return (0);
254 }
255
256 int
cs_cs89x0_probe(device_t dev)257 cs_cs89x0_probe(device_t dev)
258 {
259 int i;
260 int error;
261 u_long irq, junk;
262 struct cs_softc *sc = device_get_softc(dev);
263 unsigned rev_type = 0;
264 uint16_t id;
265 char chip_revision;
266 uint16_t eeprom_buff[CHKSUM_LEN];
267 int chip_type, pp_isaint;
268
269 sc->dev = dev;
270 error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS);
271 if (error)
272 return (error);
273
274 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) {
275 /* Chip not detected. Let's try to reset it */
276 if (bootverbose)
277 device_printf(dev, "trying to reset the chip.\n");
278 cs_outw(sc, ADD_PORT, PP_SelfCTL);
279 i = cs_inw(sc, DATA_PORT);
280 cs_outw(sc, ADD_PORT, PP_SelfCTL);
281 cs_outw(sc, DATA_PORT, i | POWER_ON_RESET);
282 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG)
283 return (ENXIO);
284 }
285
286 for (i = 0; i < 10000; i++) {
287 id = cs_readreg(sc, PP_ChipID);
288 if (id == CHIP_EISA_ID_SIG)
289 break;
290 }
291 if (i == 10000)
292 return (ENXIO);
293
294 rev_type = cs_readreg(sc, PRODUCT_ID_ADD);
295 chip_type = rev_type & ~REVISON_BITS;
296 chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
297
298 sc->chip_type = chip_type;
299
300 if (chip_type == CS8900) {
301 pp_isaint = PP_CS8900_ISAINT;
302 sc->send_cmd = TX_CS8900_AFTER_ALL;
303 } else {
304 pp_isaint = PP_CS8920_ISAINT;
305 sc->send_cmd = TX_CS8920_AFTER_ALL;
306 }
307
308 /*
309 * Clear some fields so that fail of EEPROM will left them clean
310 */
311 sc->auto_neg_cnf = 0;
312 sc->adapter_cnf = 0;
313 sc->isa_config = 0;
314
315 /*
316 * If no interrupt specified, use what the board tells us.
317 */
318 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
319
320 /*
321 * Get data from EEPROM
322 */
323 if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) {
324 device_printf(dev, "No EEPROM, assuming defaults.\n");
325 } else if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
326 device_printf(dev, "EEPROM read failed, assuming defaults.\n");
327 } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
328 device_printf(dev, "EEPROM cheksum bad, assuming defaults.\n");
329 } else {
330 sc->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET];
331 sc->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET];
332 sc->isa_config = eeprom_buff[ISA_CNF_OFFSET];
333 for (i=0; i<ETHER_ADDR_LEN/2; i++) {
334 sc->enaddr[i*2] = eeprom_buff[i];
335 sc->enaddr[i*2+1] = eeprom_buff[i] >> 8;
336 }
337 /*
338 * If no interrupt specified, use what the
339 * board tells us.
340 */
341 if (error) {
342 irq = sc->isa_config & INT_NO_MASK;
343 error = 0;
344 if (chip_type == CS8900) {
345 irq = cs8900_eeint2irq[irq];
346 } else {
347 if (irq > CS8920_NO_INTS)
348 irq = 255;
349 }
350 if (irq == 255) {
351 device_printf(dev, "invalid irq in EEPROM.\n");
352 error = EINVAL;
353 }
354 if (!error)
355 bus_set_resource(dev, SYS_RES_IRQ, 0,
356 irq, 1);
357 }
358 }
359
360 if (!error && !(sc->flags & CS_NO_IRQ)) {
361 if (chip_type == CS8900) {
362 if (irq < 16)
363 irq = cs8900_irq2eeint[irq];
364 else
365 irq = 255;
366 } else {
367 if (irq > CS8920_NO_INTS)
368 irq = 255;
369 }
370 if (irq == 255)
371 error = EINVAL;
372 }
373
374 if (error) {
375 device_printf(dev, "Unknown or invalid irq\n");
376 return (error);
377 }
378
379 if (!(sc->flags & CS_NO_IRQ))
380 cs_writereg(sc, pp_isaint, irq);
381
382 if (bootverbose)
383 device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n",
384 chip_type == CS8900 ? '0' : '2',
385 chip_type == CS8920M ? "M" : "",
386 chip_revision,
387 (sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "",
388 (sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "",
389 (sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : "");
390
391 if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) &&
392 (sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH))
393 sc->line_ctl = LOW_RX_SQUELCH;
394 else
395 sc->line_ctl = 0;
396
397 return (0);
398 }
399
400 /*
401 * Allocate a port resource with the given resource id.
402 */
403 int
cs_alloc_port(device_t dev,int rid,int size)404 cs_alloc_port(device_t dev, int rid, int size)
405 {
406 struct cs_softc *sc = device_get_softc(dev);
407 struct resource *res;
408
409 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
410 0ul, ~0ul, size, RF_ACTIVE);
411 if (res == NULL)
412 return (ENOENT);
413 sc->port_rid = rid;
414 sc->port_res = res;
415 return (0);
416 }
417
418 /*
419 * Allocate an irq resource with the given resource id.
420 */
421 int
cs_alloc_irq(device_t dev,int rid)422 cs_alloc_irq(device_t dev, int rid)
423 {
424 struct cs_softc *sc = device_get_softc(dev);
425 struct resource *res;
426
427 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
428 if (res == NULL)
429 return (ENOENT);
430 sc->irq_rid = rid;
431 sc->irq_res = res;
432 return (0);
433 }
434
435 /*
436 * Release all resources
437 */
438 void
cs_release_resources(device_t dev)439 cs_release_resources(device_t dev)
440 {
441 struct cs_softc *sc = device_get_softc(dev);
442
443 if (sc->port_res) {
444 bus_release_resource(dev, SYS_RES_IOPORT,
445 sc->port_rid, sc->port_res);
446 sc->port_res = 0;
447 }
448 if (sc->irq_res) {
449 bus_release_resource(dev, SYS_RES_IRQ,
450 sc->irq_rid, sc->irq_res);
451 sc->irq_res = 0;
452 }
453 }
454
455 /*
456 * Install the interface into kernel networking data structures
457 */
458 int
cs_attach(device_t dev)459 cs_attach(device_t dev)
460 {
461 int error, media=0;
462 struct cs_softc *sc = device_get_softc(dev);
463 struct ifnet *ifp;
464
465 sc->dev = dev;
466
467 ifp = sc->ifp = if_alloc(IFT_ETHER);
468 if (ifp == NULL) {
469 device_printf(dev, "can not if_alloc()\n");
470 cs_release_resources(dev);
471 return (ENOMEM);
472 }
473
474 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
475 MTX_DEF);
476 callout_init_mtx(&sc->timer, &sc->lock, 0);
477
478 CS_LOCK(sc);
479 cs_stop(sc);
480 CS_UNLOCK(sc);
481
482 ifp->if_softc=sc;
483 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
484 ifp->if_start=cs_start;
485 ifp->if_ioctl=cs_ioctl;
486 ifp->if_init=cs_init;
487 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
488
489 ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
490
491 /*
492 * this code still in progress (DMA support)
493 *
494
495 sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT);
496 if (sc->recv_ring == NULL) {
497 log(LOG_ERR,
498 "%s: Couldn't allocate memory for NIC\n", ifp->if_xname);
499 return(0);
500 }
501 if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF))
502 < (128*1024-CS_DMA_BUFFER_SIZE))
503 sc->recv_ring+=16*1024;
504
505 */
506
507 sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT);
508 if (sc->buffer == NULL) {
509 device_printf(sc->dev, "Couldn't allocate memory for NIC\n");
510 if_free(ifp);
511 mtx_destroy(&sc->lock);
512 cs_release_resources(dev);
513 return(ENOMEM);
514 }
515
516 /*
517 * Initialize the media structures.
518 */
519 ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus);
520
521 if (sc->adapter_cnf & A_CNF_10B_T) {
522 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL);
523 if (sc->chip_type != CS8900) {
524 ifmedia_add(&sc->media,
525 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
526 ifmedia_add(&sc->media,
527 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
528 }
529 }
530
531 if (sc->adapter_cnf & A_CNF_10B_2)
532 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL);
533
534 if (sc->adapter_cnf & A_CNF_AUI)
535 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL);
536
537 if (sc->adapter_cnf & A_CNF_MEDIA)
538 ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL);
539
540 /* Set default media from EEPROM */
541 switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) {
542 case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break;
543 case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break;
544 case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break;
545 case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break;
546 default:
547 device_printf(sc->dev, "no media, assuming 10baseT\n");
548 sc->adapter_cnf |= A_CNF_10B_T;
549 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL);
550 if (sc->chip_type != CS8900) {
551 ifmedia_add(&sc->media,
552 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
553 ifmedia_add(&sc->media,
554 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
555 }
556 media = IFM_ETHER | IFM_10_T;
557 break;
558 }
559 ifmedia_set(&sc->media, media);
560 cs_mediaset(sc, media);
561
562 ether_ifattach(ifp, sc->enaddr);
563
564 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
565 NULL, csintr, sc, &sc->irq_handle);
566 if (error) {
567 ether_ifdetach(ifp);
568 free(sc->buffer, M_DEVBUF);
569 if_free(ifp);
570 mtx_destroy(&sc->lock);
571 cs_release_resources(dev);
572 return (error);
573 }
574
575 return (0);
576 }
577
578 int
cs_detach(device_t dev)579 cs_detach(device_t dev)
580 {
581 struct cs_softc *sc;
582 struct ifnet *ifp;
583
584 sc = device_get_softc(dev);
585 ifp = sc->ifp;
586
587 CS_LOCK(sc);
588 cs_stop(sc);
589 CS_UNLOCK(sc);
590 callout_drain(&sc->timer);
591 ether_ifdetach(ifp);
592 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
593 cs_release_resources(dev);
594 free(sc->buffer, M_DEVBUF);
595 if_free(ifp);
596 mtx_destroy(&sc->lock);
597 return (0);
598 }
599
600 /*
601 * Initialize the board
602 */
603 static void
cs_init(void * xsc)604 cs_init(void *xsc)
605 {
606 struct cs_softc *sc=(struct cs_softc *)xsc;
607
608 CS_LOCK(sc);
609 cs_init_locked(sc);
610 CS_UNLOCK(sc);
611 }
612
613 static void
cs_init_locked(struct cs_softc * sc)614 cs_init_locked(struct cs_softc *sc)
615 {
616 struct ifnet *ifp = sc->ifp;
617 int i, rx_cfg;
618
619 /*
620 * reset watchdog timer
621 */
622 sc->tx_timeout = 0;
623 sc->buf_len = 0;
624
625 /*
626 * Hardware initialization of cs
627 */
628
629 /* Enable receiver and transmitter */
630 cs_writereg(sc, PP_LineCTL,
631 cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);
632
633 /* Configure the receiver mode */
634 cs_setmode(sc);
635
636 /*
637 * This defines what type of frames will cause interrupts
638 * Bad frames should generate interrupts so that the driver
639 * could track statistics of discarded packets
640 */
641 rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL |
642 RX_EXTRA_DATA_ENBL;
643 if (sc->isa_config & STREAM_TRANSFER)
644 rx_cfg |= RX_STREAM_ENBL;
645 cs_writereg(sc, PP_RxCFG, rx_cfg);
646 cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL |
647 TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL |
648 TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL);
649 cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL |
650 RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL |
651 TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/);
652
653 /* Write MAC address into IA filter */
654 for (i=0; i<ETHER_ADDR_LEN/2; i++)
655 cs_writereg(sc, PP_IA + i * 2,
656 sc->enaddr[i * 2] |
657 (sc->enaddr[i * 2 + 1] << 8) );
658
659 /*
660 * Now enable everything
661 */
662 /*
663 #ifdef CS_USE_64K_DMA
664 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K);
665 #else
666 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
667 #endif
668 */
669 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
670
671 /*
672 * Set running and clear output active flags
673 */
674 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
675 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
676 callout_reset(&sc->timer, hz, cs_watchdog, sc);
677
678 /*
679 * Start sending process
680 */
681 cs_start_locked(ifp);
682 }
683
684 /*
685 * Get the packet from the board and send it to the upper layer.
686 */
687 static int
cs_get_packet(struct cs_softc * sc)688 cs_get_packet(struct cs_softc *sc)
689 {
690 struct ifnet *ifp = sc->ifp;
691 int status, length;
692 struct mbuf *m;
693
694 #ifdef CS_DEBUG
695 int i;
696 #endif
697
698 status = cs_inw(sc, RX_FRAME_PORT);
699 length = cs_inw(sc, RX_FRAME_PORT);
700
701 #ifdef CS_DEBUG
702 device_printf(sc->dev, "rcvd: stat %x, len %d\n",
703 status, length);
704 #endif
705
706 if (!(status & RX_OK)) {
707 #ifdef CS_DEBUG
708 device_printf(sc->dev, "bad pkt stat %x\n", status);
709 #endif
710 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
711 return (-1);
712 }
713
714 MGETHDR(m, M_NOWAIT, MT_DATA);
715 if (m==NULL)
716 return (-1);
717
718 if (length > MHLEN) {
719 if (!(MCLGET(m, M_NOWAIT))) {
720 m_freem(m);
721 return (-1);
722 }
723 }
724
725 /* Initialize packet's header info */
726 m->m_pkthdr.rcvif = ifp;
727 m->m_pkthdr.len = length;
728 m->m_len = length;
729
730 /* Get the data */
731 bus_read_multi_2(sc->port_res, RX_FRAME_PORT, mtod(m, uint16_t *),
732 (length + 1) >> 1);
733
734 #ifdef CS_DEBUG
735 for (i=0;i<length;i++)
736 printf(" %02x",(unsigned char)*((char *)(m->m_data+i)));
737 printf( "\n" );
738 #endif
739
740 if (status & (RX_IA | RX_BROADCAST) ||
741 (ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) {
742 /* Feed the packet to the upper layer */
743 (*ifp->if_input)(ifp, m);
744 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
745 if (length == ETHER_MAX_LEN-ETHER_CRC_LEN)
746 DELAY(cs_recv_delay);
747 } else {
748 m_freem(m);
749 }
750
751 return (0);
752 }
753
754 /*
755 * Handle interrupts
756 */
757 void
csintr(void * arg)758 csintr(void *arg)
759 {
760 struct cs_softc *sc = (struct cs_softc*) arg;
761 struct ifnet *ifp = sc->ifp;
762 int status;
763
764 #ifdef CS_DEBUG
765 device_printf(sc->dev, "Interrupt.\n");
766 #endif
767
768 CS_LOCK(sc);
769 while ((status=cs_inw(sc, ISQ_PORT))) {
770
771 #ifdef CS_DEBUG
772 device_printf(sc->dev, "from ISQ: %04x\n", status);
773 #endif
774
775 switch (status & ISQ_EVENT_MASK) {
776 case ISQ_RECEIVER_EVENT:
777 cs_get_packet(sc);
778 break;
779
780 case ISQ_TRANSMITTER_EVENT:
781 if (status & TX_OK)
782 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
783 else
784 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
785 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
786 sc->tx_timeout = 0;
787 break;
788
789 case ISQ_BUFFER_EVENT:
790 if (status & READY_FOR_TX) {
791 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
792 sc->tx_timeout = 0;
793 }
794
795 if (status & TX_UNDERRUN) {
796 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
797 sc->tx_timeout = 0;
798 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
799 }
800 break;
801
802 case ISQ_RX_MISS_EVENT:
803 if_inc_counter(ifp, IFCOUNTER_IERRORS, status >> 6);
804 break;
805
806 case ISQ_TX_COL_EVENT:
807 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, status >> 6);
808 break;
809 }
810 }
811
812 if (!(ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
813 cs_start_locked(ifp);
814 }
815 CS_UNLOCK(sc);
816 }
817
818 /*
819 * Save the data in buffer
820 */
821
822 static void
cs_write_mbufs(struct cs_softc * sc,struct mbuf * m)823 cs_write_mbufs( struct cs_softc *sc, struct mbuf *m )
824 {
825 int len;
826 struct mbuf *mp;
827 unsigned char *data, *buf;
828
829 for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) {
830 len = mp->m_len;
831
832 /*
833 * Ignore empty parts
834 */
835 if (!len)
836 continue;
837
838 /*
839 * Find actual data address
840 */
841 data = mtod(mp, caddr_t);
842
843 bcopy((caddr_t) data, (caddr_t) buf, len);
844 buf += len;
845 sc->buf_len += len;
846 }
847 }
848
849
850 static void
cs_xmit_buf(struct cs_softc * sc)851 cs_xmit_buf( struct cs_softc *sc )
852 {
853 bus_write_multi_2(sc->port_res, TX_FRAME_PORT, (uint16_t *)sc->buffer,
854 (sc->buf_len + 1) >> 1);
855 sc->buf_len = 0;
856 }
857
858 static void
cs_start(struct ifnet * ifp)859 cs_start(struct ifnet *ifp)
860 {
861 struct cs_softc *sc = ifp->if_softc;
862
863 CS_LOCK(sc);
864 cs_start_locked(ifp);
865 CS_UNLOCK(sc);
866 }
867
868 static void
cs_start_locked(struct ifnet * ifp)869 cs_start_locked(struct ifnet *ifp)
870 {
871 int length;
872 struct mbuf *m, *mp;
873 struct cs_softc *sc = ifp->if_softc;
874
875 for (;;) {
876 if (sc->buf_len)
877 length = sc->buf_len;
878 else {
879 IF_DEQUEUE( &ifp->if_snd, m );
880
881 if (m==NULL) {
882 return;
883 }
884
885 for (length=0, mp=m; mp != NULL; mp=mp->m_next)
886 length += mp->m_len;
887
888 /* Skip zero-length packets */
889 if (length == 0) {
890 m_freem(m);
891 continue;
892 }
893
894 cs_write_mbufs(sc, m);
895
896 BPF_MTAP(ifp, m);
897
898 m_freem(m);
899 }
900
901 /*
902 * Issue a SEND command
903 */
904 cs_outw(sc, TX_CMD_PORT, sc->send_cmd);
905 cs_outw(sc, TX_LEN_PORT, length );
906
907 /*
908 * If there's no free space in the buffer then leave
909 * this packet for the next time: indicate output active
910 * and return.
911 */
912 if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) {
913 sc->tx_timeout = sc->buf_len;
914 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
915 return;
916 }
917
918 cs_xmit_buf(sc);
919
920 /*
921 * Set the watchdog timer in case we never hear
922 * from board again. (I don't know about correct
923 * value for this timeout)
924 */
925 sc->tx_timeout = length;
926
927 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
928 return;
929 }
930 }
931
932 /*
933 * Stop everything on the interface
934 */
935 static void
cs_stop(struct cs_softc * sc)936 cs_stop(struct cs_softc *sc)
937 {
938
939 CS_ASSERT_LOCKED(sc);
940 cs_writereg(sc, PP_RxCFG, 0);
941 cs_writereg(sc, PP_TxCFG, 0);
942 cs_writereg(sc, PP_BufCFG, 0);
943 cs_writereg(sc, PP_BusCTL, 0);
944
945 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
946 sc->tx_timeout = 0;
947 callout_stop(&sc->timer);
948 }
949
950 /*
951 * Reset the interface
952 */
953 static void
cs_reset(struct cs_softc * sc)954 cs_reset(struct cs_softc *sc)
955 {
956
957 CS_ASSERT_LOCKED(sc);
958 cs_stop(sc);
959 cs_init_locked(sc);
960 }
961
962 static uint16_t
cs_hash_index(struct sockaddr_dl * addr)963 cs_hash_index(struct sockaddr_dl *addr)
964 {
965 uint32_t crc;
966 uint16_t idx;
967 caddr_t lla;
968
969 lla = LLADDR(addr);
970 crc = ether_crc32_le(lla, ETHER_ADDR_LEN);
971 idx = crc >> 26;
972
973 return (idx);
974 }
975
976 static void
cs_setmode(struct cs_softc * sc)977 cs_setmode(struct cs_softc *sc)
978 {
979 int rx_ctl;
980 uint16_t af[4];
981 uint16_t port, mask, index;
982 struct ifnet *ifp = sc->ifp;
983 struct ifmultiaddr *ifma;
984
985 /* Stop the receiver while changing filters */
986 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON);
987
988 if (ifp->if_flags & IFF_PROMISC) {
989 /* Turn on promiscuous mode. */
990 rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT;
991 } else if (ifp->if_flags & IFF_MULTICAST) {
992 /* Allow receiving frames with multicast addresses */
993 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
994 RX_OK_ACCEPT | RX_MULTCAST_ACCEPT;
995
996 /* Start with an empty filter */
997 af[0] = af[1] = af[2] = af[3] = 0x0000;
998
999 if (ifp->if_flags & IFF_ALLMULTI) {
1000 /* Accept all multicast frames */
1001 af[0] = af[1] = af[2] = af[3] = 0xffff;
1002 } else {
1003 /*
1004 * Set up the filter to only accept multicast
1005 * frames we're interested in.
1006 */
1007 if_maddr_rlock(ifp);
1008 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1009 struct sockaddr_dl *dl =
1010 (struct sockaddr_dl *)ifma->ifma_addr;
1011
1012 index = cs_hash_index(dl);
1013 port = (u_int16_t) (index >> 4);
1014 mask = (u_int16_t) (1 << (index & 0xf));
1015 af[port] |= mask;
1016 }
1017 if_maddr_runlock(ifp);
1018 }
1019
1020 cs_writereg(sc, PP_LAF + 0, af[0]);
1021 cs_writereg(sc, PP_LAF + 2, af[1]);
1022 cs_writereg(sc, PP_LAF + 4, af[2]);
1023 cs_writereg(sc, PP_LAF + 6, af[3]);
1024 } else {
1025 /*
1026 * Receive only good frames addressed for us and
1027 * good broadcasts.
1028 */
1029 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
1030 RX_OK_ACCEPT;
1031 }
1032
1033 /* Set up the filter */
1034 cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl);
1035
1036 /* Turn on receiver */
1037 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON);
1038 }
1039
1040 static int
cs_ioctl(register struct ifnet * ifp,u_long command,caddr_t data)1041 cs_ioctl(register struct ifnet *ifp, u_long command, caddr_t data)
1042 {
1043 struct cs_softc *sc=ifp->if_softc;
1044 struct ifreq *ifr = (struct ifreq *)data;
1045 int error=0;
1046
1047 #ifdef CS_DEBUG
1048 if_printf(ifp, "%s command=%lx\n", __func__, command);
1049 #endif
1050
1051 switch (command) {
1052 case SIOCSIFFLAGS:
1053 /*
1054 * Switch interface state between "running" and
1055 * "stopped", reflecting the UP flag.
1056 */
1057 CS_LOCK(sc);
1058 if (sc->ifp->if_flags & IFF_UP) {
1059 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)==0) {
1060 cs_init_locked(sc);
1061 }
1062 } else {
1063 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)!=0) {
1064 cs_stop(sc);
1065 }
1066 }
1067 /*
1068 * Promiscuous and/or multicast flags may have changed,
1069 * so reprogram the multicast filter and/or receive mode.
1070 *
1071 * See note about multicasts in cs_setmode
1072 */
1073 cs_setmode(sc);
1074 CS_UNLOCK(sc);
1075 break;
1076
1077 case SIOCADDMULTI:
1078 case SIOCDELMULTI:
1079 /*
1080 * Multicast list has changed; set the hardware filter
1081 * accordingly.
1082 *
1083 * See note about multicasts in cs_setmode
1084 */
1085 CS_LOCK(sc);
1086 cs_setmode(sc);
1087 CS_UNLOCK(sc);
1088 error = 0;
1089 break;
1090
1091 case SIOCSIFMEDIA:
1092 case SIOCGIFMEDIA:
1093 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1094 break;
1095
1096 default:
1097 error = ether_ioctl(ifp, command, data);
1098 break;
1099 }
1100
1101 return (error);
1102 }
1103
1104 /*
1105 * Device timeout/watchdog routine. Entered if the device neglects to
1106 * generate an interrupt after a transmit has been started on it.
1107 */
1108 static void
cs_watchdog(void * arg)1109 cs_watchdog(void *arg)
1110 {
1111 struct cs_softc *sc = arg;
1112 struct ifnet *ifp = sc->ifp;
1113
1114 CS_ASSERT_LOCKED(sc);
1115 if (sc->tx_timeout && --sc->tx_timeout == 0) {
1116 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1117 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
1118
1119 /* Reset the interface */
1120 if (ifp->if_flags & IFF_UP)
1121 cs_reset(sc);
1122 else
1123 cs_stop(sc);
1124 }
1125 callout_reset(&sc->timer, hz, cs_watchdog, sc);
1126 }
1127
1128 static int
cs_mediachange(struct ifnet * ifp)1129 cs_mediachange(struct ifnet *ifp)
1130 {
1131 struct cs_softc *sc = ifp->if_softc;
1132 struct ifmedia *ifm = &sc->media;
1133 int error;
1134
1135 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1136 return (EINVAL);
1137
1138 CS_LOCK(sc);
1139 error = cs_mediaset(sc, ifm->ifm_media);
1140 CS_UNLOCK(sc);
1141 return (error);
1142 }
1143
1144 static void
cs_mediastatus(struct ifnet * ifp,struct ifmediareq * ifmr)1145 cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
1146 {
1147 int line_status;
1148 struct cs_softc *sc = ifp->if_softc;
1149
1150 CS_LOCK(sc);
1151 ifmr->ifm_active = IFM_ETHER;
1152 line_status = cs_readreg(sc, PP_LineST);
1153 if (line_status & TENBASET_ON) {
1154 ifmr->ifm_active |= IFM_10_T;
1155 if (sc->chip_type != CS8900) {
1156 if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE)
1157 ifmr->ifm_active |= IFM_FDX;
1158 if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE)
1159 ifmr->ifm_active |= IFM_HDX;
1160 }
1161 ifmr->ifm_status = IFM_AVALID;
1162 if (line_status & LINK_OK)
1163 ifmr->ifm_status |= IFM_ACTIVE;
1164 } else {
1165 if (line_status & AUI_ON) {
1166 cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) |
1167 HCB1_ENBL);
1168 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^
1169 (cs_readreg(sc, PP_SelfCTL) & HCB1))
1170 ifmr->ifm_active |= IFM_10_2;
1171 else
1172 ifmr->ifm_active |= IFM_10_5;
1173 }
1174 }
1175 CS_UNLOCK(sc);
1176 }
1177
1178 static int
cs_mediaset(struct cs_softc * sc,int media)1179 cs_mediaset(struct cs_softc *sc, int media)
1180 {
1181 int error = 0;
1182
1183 /* Stop the receiver & transmitter */
1184 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) &
1185 ~(SERIAL_RX_ON | SERIAL_TX_ON));
1186
1187 #ifdef CS_DEBUG
1188 device_printf(sc->dev, "%s media=%x\n", __func__, media);
1189 #endif
1190
1191 switch (IFM_SUBTYPE(media)) {
1192 default:
1193 case IFM_AUTO:
1194 /*
1195 * This chip makes it a little hard to support this, so treat
1196 * it as IFM_10_T, auto duplex.
1197 */
1198 enable_tp(sc);
1199 cs_duplex_auto(sc);
1200 break;
1201 case IFM_10_T:
1202 enable_tp(sc);
1203 if (media & IFM_FDX)
1204 cs_duplex_full(sc);
1205 else if (media & IFM_HDX)
1206 cs_duplex_half(sc);
1207 else
1208 error = cs_duplex_auto(sc);
1209 break;
1210 case IFM_10_2:
1211 enable_bnc(sc);
1212 break;
1213 case IFM_10_5:
1214 enable_aui(sc);
1215 break;
1216 }
1217
1218 /*
1219 * Turn the transmitter & receiver back on
1220 */
1221 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) |
1222 SERIAL_RX_ON | SERIAL_TX_ON);
1223
1224 return (error);
1225 }
1226