1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 Oleksandr Tymoshenko
5 * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification, immediately at the beginning of the file.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31 #include <sys/cdefs.h>
32 #include "opt_hwpmc_hooks.h"
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/interrupt.h>
38 #include <sys/pmc.h>
39 #include <sys/pmckern.h>
40
41 #include <machine/clock.h>
42 #include <machine/cpu.h>
43 #include <machine/cpufunc.h>
44 #include <machine/cpuinfo.h>
45 #include <machine/cpuregs.h>
46 #include <machine/frame.h>
47 #include <machine/intr_machdep.h>
48 #include <machine/md_var.h>
49 #include <machine/trap.h>
50
51 #ifndef INTRNG
52 #define INTRCNT_COUNT 256
53 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
54
55 MALLOC_DECLARE(M_MIPSINTR);
56 MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling");
57
58 u_long *intrcnt;
59 char *intrnames;
60 size_t sintrcnt;
61 size_t sintrnames;
62 #endif
63
64 static struct intr_event *hardintr_events[NHARD_IRQS];
65 static struct intr_event *softintr_events[NSOFT_IRQS];
66 static mips_intrcnt_t mips_intr_counters[NSOFT_IRQS + NHARD_IRQS];
67
68 static int intrcnt_index;
69
70 static cpu_intr_mask_t hardintr_mask_func;
71 static cpu_intr_unmask_t hardintr_unmask_func;
72
73 mips_intrcnt_t
mips_intrcnt_create(const char * name)74 mips_intrcnt_create(const char* name)
75 {
76 mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
77
78 mips_intrcnt_setname(counter, name);
79 return counter;
80 }
81
82 void
mips_intrcnt_setname(mips_intrcnt_t counter,const char * name)83 mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
84 {
85 int idx = counter - intrcnt;
86
87 KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
88
89 snprintf(intrnames + (MAXCOMLEN + 1) * idx,
90 MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
91 }
92
93 static void
mips_mask_hard_irq(void * source)94 mips_mask_hard_irq(void *source)
95 {
96 uintptr_t irq = (uintptr_t)source;
97
98 mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2));
99 }
100
101 static void
mips_unmask_hard_irq(void * source)102 mips_unmask_hard_irq(void *source)
103 {
104 uintptr_t irq = (uintptr_t)source;
105
106 mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2));
107 }
108
109 static void
mips_mask_soft_irq(void * source)110 mips_mask_soft_irq(void *source)
111 {
112 uintptr_t irq = (uintptr_t)source;
113
114 mips_wr_status(mips_rd_status() & ~((1 << irq) << 8));
115 }
116
117 static void
mips_unmask_soft_irq(void * source)118 mips_unmask_soft_irq(void *source)
119 {
120 uintptr_t irq = (uintptr_t)source;
121
122 mips_wr_status(mips_rd_status() | ((1 << irq) << 8));
123 }
124
125 /*
126 * Perform initialization of interrupts prior to setting
127 * handlings
128 */
129 void
cpu_init_interrupts()130 cpu_init_interrupts()
131 {
132 int i;
133 char name[MAXCOMLEN + 1];
134
135 #ifndef INTRNG
136 intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR,
137 M_WAITOK | M_ZERO);
138 intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR,
139 M_WAITOK | M_ZERO);
140 sintrcnt = INTRCNT_COUNT * sizeof(u_long);
141 sintrnames = INTRCNT_COUNT * INTRNAME_LEN;
142 #endif
143
144 /*
145 * Initialize all available vectors so spare IRQ
146 * would show up in systat output
147 */
148 for (i = 0; i < NSOFT_IRQS; i++) {
149 snprintf(name, MAXCOMLEN + 1, "sint%d:", i);
150 mips_intr_counters[i] = mips_intrcnt_create(name);
151 }
152
153 for (i = 0; i < NHARD_IRQS; i++) {
154 snprintf(name, MAXCOMLEN + 1, "int%d:", i);
155 mips_intr_counters[NSOFT_IRQS + i] = mips_intrcnt_create(name);
156 }
157 }
158
159 void
cpu_set_hardintr_mask_func(cpu_intr_mask_t func)160 cpu_set_hardintr_mask_func(cpu_intr_mask_t func)
161 {
162
163 hardintr_mask_func = func;
164 }
165
166 void
cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func)167 cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func)
168 {
169
170 hardintr_unmask_func = func;
171 }
172
173 void
cpu_establish_hardintr(const char * name,driver_filter_t * filt,void (* handler)(void *),void * arg,int irq,int flags,void ** cookiep)174 cpu_establish_hardintr(const char *name, driver_filter_t *filt,
175 void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
176 {
177 struct intr_event *event;
178 int error;
179
180 /*
181 * We have 6 levels, but thats 0 - 5 (not including 6)
182 */
183 if (irq < 0 || irq >= NHARD_IRQS)
184 panic("%s called for unknown hard intr %d", __func__, irq);
185
186 if (hardintr_mask_func == NULL)
187 hardintr_mask_func = mips_mask_hard_irq;
188
189 if (hardintr_unmask_func == NULL)
190 hardintr_unmask_func = mips_unmask_hard_irq;
191
192 event = hardintr_events[irq];
193 if (event == NULL) {
194 error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
195 irq, hardintr_mask_func, hardintr_unmask_func,
196 NULL, NULL, "int%d", irq);
197 if (error)
198 return;
199 hardintr_events[irq] = event;
200 mips_unmask_hard_irq((void*)(uintptr_t)irq);
201 }
202
203 intr_event_add_handler(event, name, filt, handler, arg,
204 intr_priority(flags), flags, cookiep);
205
206 mips_intrcnt_setname(mips_intr_counters[NSOFT_IRQS + irq],
207 event->ie_fullname);
208 }
209
210 void
cpu_establish_softintr(const char * name,driver_filter_t * filt,void (* handler)(void *),void * arg,int irq,int flags,void ** cookiep)211 cpu_establish_softintr(const char *name, driver_filter_t *filt,
212 void (*handler)(void*), void *arg, int irq, int flags,
213 void **cookiep)
214 {
215 struct intr_event *event;
216 int error;
217
218 #if 0
219 printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n",
220 irq, filt, handler, arg);
221 #endif
222 if (irq < 0 || irq > NSOFT_IRQS)
223 panic("%s called for unknown hard intr %d", __func__, irq);
224
225 event = softintr_events[irq];
226 if (event == NULL) {
227 error = intr_event_create(&event, (void *)(uintptr_t)irq, 0,
228 irq, mips_mask_soft_irq, mips_unmask_soft_irq,
229 NULL, NULL, "sint%d:", irq);
230 if (error)
231 return;
232 softintr_events[irq] = event;
233 mips_unmask_soft_irq((void*)(uintptr_t)irq);
234 }
235
236 intr_event_add_handler(event, name, filt, handler, arg,
237 intr_priority(flags), flags, cookiep);
238
239 mips_intrcnt_setname(mips_intr_counters[irq], event->ie_fullname);
240 }
241
242 void
cpu_intr(struct trapframe * tf)243 cpu_intr(struct trapframe *tf)
244 {
245 struct intr_event *event;
246 register_t cause, status;
247 int hard, i, intr;
248
249 critical_enter();
250
251 cause = mips_rd_cause();
252 status = mips_rd_status();
253 intr = (cause & MIPS_INT_MASK) >> 8;
254 /*
255 * Do not handle masked interrupts. They were masked by
256 * pre_ithread function (mips_mask_XXX_intr) and will be
257 * unmasked once ithread is through with handler
258 */
259 intr &= (status & MIPS_INT_MASK) >> 8;
260 while ((i = fls(intr)) != 0) {
261 intr &= ~(1 << (i - 1));
262 switch (i) {
263 case 1: case 2:
264 /* Software interrupt. */
265 i--; /* Get a 0-offset interrupt. */
266 hard = 0;
267 event = softintr_events[i];
268 mips_intrcnt_inc(mips_intr_counters[i]);
269 break;
270 default:
271 /* Hardware interrupt. */
272 i -= 2; /* Trim software interrupt bits. */
273 i--; /* Get a 0-offset interrupt. */
274 hard = 1;
275 event = hardintr_events[i];
276 mips_intrcnt_inc(mips_intr_counters[NSOFT_IRQS + i]);
277 break;
278 }
279
280 if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
281 printf("stray %s interrupt %d\n",
282 hard ? "hard" : "soft", i);
283 continue;
284 }
285
286 if (intr_event_handle(event, tf) != 0) {
287 printf("stray %s interrupt %d\n",
288 hard ? "hard" : "soft", i);
289 }
290 }
291
292 KASSERT(i == 0, ("all interrupts handled"));
293
294 critical_exit();
295
296 #ifdef HWPMC_HOOKS
297 if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
298 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
299 #endif
300 }
301