1 /*- 2 * Copyright (c) 2003-2009 RMI Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of RMI Corporation, nor the names of its contributors, 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: stable/9/sys/mips/rmi/dev/sec/rmilib.h 212763 2010-09-16 20:23:22Z jchandra $ 30 * RMI_BSD 31 */ 32 33 #ifndef _RMILIB_H_ 34 #define _RMILIB_H_ 35 36 #include <sys/cdefs.h> 37 #include <mips/rmi/dev/sec/desc.h> 38 #include <mips/rmi/iomap.h> 39 40 /* #define XLR_SEC_CMD_DEBUG */ 41 42 #ifdef XLR_SEC_CMD_DEBUG 43 #define DPRINT printf 44 #define XLR_SEC_CMD_DIAG(fmt, args...) { \ 45 DPRINT(fmt, ##args); \ 46 } 47 #define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec) { \ 48 decode_symkey_desc ((desc), (vec)); \ 49 } 50 #else 51 #define DPRINT(fmt, args...) 52 #define XLR_SEC_CMD_DIAG(fmt, args...) 53 #define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec) 54 #endif 55 56 57 58 59 60 61 /* 62 #include <mips/include/pmap.h> 63 64 #define OS_ALLOC_KERNEL(size) kmalloc((size), GFP_KERNEL) 65 #define virt_to_phys(x) vtophys((vm_offset_t)(x)) 66 */ 67 /* 68 * Cryptographic parameter definitions 69 */ 70 #define XLR_SEC_DES_KEY_LENGTH 8 /* Bytes */ 71 #define XLR_SEC_3DES_KEY_LENGTH 24 /* Bytes */ 72 #define XLR_SEC_AES128_KEY_LENGTH 16 /* Bytes */ 73 #define XLR_SEC_AES192_KEY_LENGTH 24 /* Bytes */ 74 #define XLR_SEC_AES256_KEY_LENGTH 32 /* Bytes */ 75 #define XLR_SEC_AES128F8_KEY_LENGTH 32 /* Bytes */ 76 #define XLR_SEC_AES192F8_KEY_LENGTH 48 /* Bytes */ 77 #define XLR_SEC_AES256F8_KEY_LENGTH 64 /* Bytes */ 78 #define XLR_SEC_KASUMI_F8_KEY_LENGTH 16 /* Bytes */ 79 #define XLR_SEC_MAX_CRYPT_KEY_LENGTH XLR_SEC_AES256F8_KEY_LENGTH 80 81 82 #define XLR_SEC_DES_IV_LENGTH 8 /* Bytes */ 83 #define XLR_SEC_AES_IV_LENGTH 16 /* Bytes */ 84 #define XLR_SEC_ARC4_IV_LENGTH 0 /* Bytes */ 85 #define XLR_SEC_KASUMI_F8_IV_LENGTH 16 /* Bytes */ 86 #define XLR_SEC_MAX_IV_LENGTH 16 /* Bytes */ 87 #define XLR_SEC_IV_LENGTH_BYTES 8 /* Bytes */ 88 89 #define XLR_SEC_AES_BLOCK_SIZE 16 /* Bytes */ 90 #define XLR_SEC_DES_BLOCK_SIZE 8 /* Bytes */ 91 #define XLR_SEC_3DES_BLOCK_SIZE 8 /* Bytes */ 92 93 #define XLR_SEC_MD5_BLOCK_SIZE 64 /* Bytes */ 94 #define XLR_SEC_SHA1_BLOCK_SIZE 64 /* Bytes */ 95 #define XLR_SEC_SHA256_BLOCK_SIZE 64 /* Bytes */ 96 #define XLR_SEC_SHA384_BLOCK_SIZE 128 /* Bytes */ 97 #define XLR_SEC_SHA512_BLOCK_SIZE 128 /* Bytes */ 98 #define XLR_SEC_GCM_BLOCK_SIZE 16 /* XXX: Bytes */ 99 #define XLR_SEC_KASUMI_F9_BLOCK_SIZE 16 /* XXX: Bytes */ 100 #define XLR_SEC_MAX_BLOCK_SIZE 64 /* Max of MD5/SHA */ 101 #define XLR_SEC_MD5_LENGTH 16 /* Bytes */ 102 #define XLR_SEC_SHA1_LENGTH 20 /* Bytes */ 103 #define XLR_SEC_SHA256_LENGTH 32 /* Bytes */ 104 #define XLR_SEC_SHA384_LENGTH 64 /* Bytes */ 105 #define XLR_SEC_SHA512_LENGTH 64 /* Bytes */ 106 #define XLR_SEC_GCM_LENGTH 16 /* Bytes */ 107 #define XLR_SEC_KASUMI_F9_LENGTH 16 /* Bytes */ 108 #define XLR_SEC_KASUMI_F9_RESULT_LENGTH 4 /* Bytes */ 109 #define XLR_SEC_HMAC_LENGTH 64 /* Max of MD5/SHA/SHA256 */ 110 #define XLR_SEC_MAX_AUTH_KEY_LENGTH XLR_SEC_SHA512_BLOCK_SIZE 111 #define XLR_SEC_MAX_RC4_STATE_SIZE 264 /* char s[256], int i, int j */ 112 113 /* Status code is used by the SRL to indicate status */ 114 typedef unsigned int xlr_sec_status_t; 115 116 /* 117 * Status codes 118 */ 119 #define XLR_SEC_STATUS_SUCCESS 0 120 #define XLR_SEC_STATUS_NO_DEVICE -1 121 #define XLR_SEC_STATUS_TIMEOUT -2 122 #define XLR_SEC_STATUS_INVALID_PARAMETER -3 123 #define XLR_SEC_STATUS_DEVICE_FAILED -4 124 #define XLR_SEC_STATUS_DEVICE_BUSY -5 125 #define XLR_SEC_STATUS_NO_RESOURCE -6 126 #define XLR_SEC_STATUS_CANCELLED -7 127 128 /* 129 * Flags 130 */ 131 #define XLR_SEC_FLAGS_HIGH_PRIORITY 1 132 133 /* Error code is used to indicate any errors */ 134 typedef int xlr_sec_error_t; 135 136 /* 137 */ 138 #define XLR_SEC_ERR_NONE 0 139 #define XLR_SEC_ERR_CIPHER_OP -1 140 #define XLR_SEC_ERR_CIPHER_TYPE -2 141 #define XLR_SEC_ERR_CIPHER_MODE -3 142 #define XLR_SEC_ERR_CIPHER_INIT -4 143 #define XLR_SEC_ERR_DIGEST_TYPE -5 144 #define XLR_SEC_ERR_DIGEST_INIT -6 145 #define XLR_SEC_ERR_DIGEST_SRC -7 146 #define XLR_SEC_ERR_CKSUM_TYPE -8 147 #define XLR_SEC_ERR_CKSUM_SRC -9 148 #define XLR_SEC_ERR_ALLOC -10 149 #define XLR_SEC_ERR_CONTROL_VECTOR -11 150 #define XLR_SEC_ERR_LOADHMACKEY_MODE -12 151 #define XLR_SEC_ERR_PADHASH_MODE -13 152 #define XLR_SEC_ERR_HASHBYTES_MODE -14 153 #define XLR_SEC_ERR_NEXT_MODE -15 154 #define XLR_SEC_ERR_PKT_IV_MODE -16 155 #define XLR_SEC_ERR_LASTWORD_MODE -17 156 #define XLR_SEC_ERR_PUBKEY_OP -18 157 #define XLR_SEC_ERR_SYMKEY_MSGSND -19 158 #define XLR_SEC_ERR_PUBKEY_MSGSND -20 159 #define XLR_SEC_ERR_SYMKEY_GETSEM -21 160 #define XLR_SEC_ERR_PUBKEY_GETSEM -22 161 162 /* 163 * Descriptor Vector quantities 164 * (helps to identify descriptor type per operation) 165 */ 166 #define XLR_SEC_VECTOR_CIPHER_DES 0x0001 167 #define XLR_SEC_VECTOR_CIPHER_3DES 0x0002 168 #define XLR_SEC_VECTOR_CIPHER_AES128 0x0004 169 #define XLR_SEC_VECTOR_CIPHER_AES192 0x0008 170 #define XLR_SEC_VECTOR_CIPHER_AES256 0x0010 171 #define XLR_SEC_VECTOR_CIPHER_ARC4 0x0020 172 #define XLR_SEC_VECTOR_CIPHER_AES (XLR_SEC_VECTOR_CIPHER_AES128 | \ 173 XLR_SEC_VECTOR_CIPHER_AES192 | \ 174 XLR_SEC_VECTOR_CIPHER_AES256) 175 #define XLR_SEC_VECTOR_CIPHER (XLR_SEC_VECTOR_CIPHER_DES | \ 176 XLR_SEC_VECTOR_CIPHER_3DES | \ 177 XLR_SEC_VECTOR_CIPHER_AES128 | \ 178 XLR_SEC_VECTOR_CIPHER_AES192 | \ 179 XLR_SEC_VECTOR_CIPHER_AES256 | \ 180 XLR_SEC_VECTOR_CIPHER_ARC4) 181 182 #define XLR_SEC_VECTOR_HMAC 0x0040 183 #define XLR_SEC_VECTOR_MAC 0x0080 184 #define XLR_SEC_VECTOR_MODE_CTR_CFB 0x0100 185 #define XLR_SEC_VECTOR_MODE_ECB_CBC_OFB 0x0200 186 #define XLR_SEC_VECTOR_MODE_ECB_CBC 0x0400 187 #define XLR_SEC_VECTOR_STATE 0x0800 188 #define XLR_SEC_VECTOR_CIPHER_KASUMI_F8 0x01000 189 #define XLR_SEC_VECTOR_HMAC2 0x02000 190 #define XLR_SEC_VECTOR_GCM 0x04000 191 #define XLR_SEC_VECTOR_F9 0x08000 192 #define XLR_SEC_VECTOR_MODE_F8 0x10000 193 194 #define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC \ 195 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC) 196 #define XLR_SEC_VECTOR_CIPHER_ARC4__STATE \ 197 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_STATE) 198 #define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE \ 199 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_STATE) 200 201 #define XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \ 202 (XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC) 203 204 #define XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \ 205 (XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_MODE_ECB_CBC) 206 207 #define XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \ 208 (XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC) 209 210 #define XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \ 211 (XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_MODE_ECB_CBC) 212 213 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \ 214 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB) 215 216 #define XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \ 217 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_CTR_CFB) 218 219 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB \ 220 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 221 222 #define XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \ 223 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 224 225 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \ 226 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB) 227 228 #define XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \ 229 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_CTR_CFB) 230 231 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB \ 232 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 233 234 #define XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \ 235 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 236 237 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \ 238 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB) 239 240 #define XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \ 241 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_CTR_CFB) 242 243 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \ 244 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 245 246 #define XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \ 247 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 248 249 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \ 250 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8) 251 252 #define XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \ 253 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_F8) 254 255 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \ 256 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8) 257 258 #define XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \ 259 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_F8) 260 261 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \ 262 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8) 263 264 #define XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \ 265 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_F8) 266 267 #define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9 \ 268 (XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_F9) 269 270 #define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC \ 271 (XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC) 272 273 #define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2 \ 274 (XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC2) 275 276 #define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM \ 277 (XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_GCM) 278 279 #define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2 \ 280 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2) 281 282 #define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE \ 283 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_STATE) 284 285 #define XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \ 286 (XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC) 287 288 #define XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \ 289 (XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC) 290 291 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \ 292 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB) 293 294 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB \ 295 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 296 297 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \ 298 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB) 299 300 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB \ 301 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 302 303 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \ 304 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB) 305 306 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \ 307 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 308 309 #define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \ 310 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8) 311 312 #define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \ 313 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8) 314 315 #define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \ 316 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8) 317 318 #define XLR_SEC_VECTOR_CIPHER_ARC4__GCM \ 319 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM) 320 321 #define XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE \ 322 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_STATE) 323 324 #define XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \ 325 (XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC) 326 327 #define XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \ 328 (XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC) 329 330 #define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \ 331 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB) 332 333 #define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB \ 334 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 335 336 #define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \ 337 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB) 338 339 #define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB \ 340 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 341 342 #define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \ 343 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB) 344 345 #define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \ 346 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 347 348 #define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \ 349 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8) 350 351 #define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \ 352 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8) 353 354 #define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \ 355 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8) 356 357 #define XLR_SEC_VECTOR_CIPHER_ARC4__F9 \ 358 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9) 359 360 #define XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE \ 361 (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_STATE) 362 363 #define XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \ 364 (XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC) 365 366 #define XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \ 367 (XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC) 368 369 #define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \ 370 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB) 371 372 #define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB \ 373 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 374 375 #define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \ 376 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB) 377 378 #define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB \ 379 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 380 381 #define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \ 382 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB) 383 384 #define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \ 385 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB) 386 387 #define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \ 388 (XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8) 389 390 #define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \ 391 (XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8) 392 393 #define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \ 394 (XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8) 395 396 /* 397 * Cipher Modes 398 */ 399 typedef enum { 400 XLR_SEC_CIPHER_MODE_NONE = 0, 401 XLR_SEC_CIPHER_MODE_PASS = 1, 402 XLR_SEC_CIPHER_MODE_ECB, 403 XLR_SEC_CIPHER_MODE_CBC, 404 XLR_SEC_CIPHER_MODE_OFB, 405 XLR_SEC_CIPHER_MODE_CTR, 406 XLR_SEC_CIPHER_MODE_CFB, 407 XLR_SEC_CIPHER_MODE_F8 408 } XLR_SEC_CIPHER_MODE; 409 410 typedef enum { 411 XLR_SEC_CIPHER_OP_NONE = 0, 412 XLR_SEC_CIPHER_OP_ENCRYPT = 1, 413 XLR_SEC_CIPHER_OP_DECRYPT 414 } XLR_SEC_CIPHER_OP; 415 416 typedef enum { 417 XLR_SEC_CIPHER_TYPE_UNSUPPORTED = -1, 418 XLR_SEC_CIPHER_TYPE_NONE = 0, 419 XLR_SEC_CIPHER_TYPE_DES, 420 XLR_SEC_CIPHER_TYPE_3DES, 421 XLR_SEC_CIPHER_TYPE_AES128, 422 XLR_SEC_CIPHER_TYPE_AES192, 423 XLR_SEC_CIPHER_TYPE_AES256, 424 XLR_SEC_CIPHER_TYPE_ARC4, 425 XLR_SEC_CIPHER_TYPE_KASUMI_F8 426 } XLR_SEC_CIPHER_TYPE; 427 428 typedef enum { 429 XLR_SEC_CIPHER_INIT_OK = 1, /* Preserve old Keys */ 430 XLR_SEC_CIPHER_INIT_NK /* Load new Keys */ 431 } XLR_SEC_CIPHER_INIT; 432 433 434 /* 435 * Hash Modes 436 */ 437 typedef enum { 438 XLR_SEC_DIGEST_TYPE_UNSUPPORTED = -1, 439 XLR_SEC_DIGEST_TYPE_NONE = 0, 440 XLR_SEC_DIGEST_TYPE_MD5, 441 XLR_SEC_DIGEST_TYPE_SHA1, 442 XLR_SEC_DIGEST_TYPE_SHA256, 443 XLR_SEC_DIGEST_TYPE_SHA384, 444 XLR_SEC_DIGEST_TYPE_SHA512, 445 XLR_SEC_DIGEST_TYPE_GCM, 446 XLR_SEC_DIGEST_TYPE_KASUMI_F9, 447 XLR_SEC_DIGEST_TYPE_HMAC_MD5, 448 XLR_SEC_DIGEST_TYPE_HMAC_SHA1, 449 XLR_SEC_DIGEST_TYPE_HMAC_SHA256, 450 XLR_SEC_DIGEST_TYPE_HMAC_SHA384, 451 XLR_SEC_DIGEST_TYPE_HMAC_SHA512, 452 XLR_SEC_DIGEST_TYPE_HMAC_AES_CBC, 453 XLR_SEC_DIGEST_TYPE_HMAC_AES_XCBC 454 } XLR_SEC_DIGEST_TYPE; 455 456 typedef enum { 457 XLR_SEC_DIGEST_INIT_OLDKEY = 1, /* Preserve old key HMAC key stored in 458 * ID registers (moot if HASH.HMAC == 459 * 0) */ 460 XLR_SEC_DIGEST_INIT_NEWKEY /* Load new HMAC key from memory ctrl 461 * section to ID registers */ 462 } XLR_SEC_DIGEST_INIT; 463 464 typedef enum { 465 XLR_SEC_DIGEST_SRC_DMA = 1, /* DMA channel */ 466 XLR_SEC_DIGEST_SRC_CPHR /* Cipher if word count exceeded 467 * Cipher_Offset; else DMA */ 468 } XLR_SEC_DIGEST_SRC; 469 470 /* 471 * Checksum Modes 472 */ 473 typedef enum { 474 XLR_SEC_CKSUM_TYPE_NOP = 1, 475 XLR_SEC_CKSUM_TYPE_IP 476 } XLR_SEC_CKSUM_TYPE; 477 478 typedef enum { 479 XLR_SEC_CKSUM_SRC_DMA = 1, 480 XLR_SEC_CKSUM_SRC_CIPHER 481 } XLR_SEC_CKSUM_SRC; 482 483 /* 484 * Packet Modes 485 */ 486 typedef enum { 487 XLR_SEC_LOADHMACKEY_MODE_OLD = 1, 488 XLR_SEC_LOADHMACKEY_MODE_LOAD 489 } XLR_SEC_LOADHMACKEY_MODE; 490 491 typedef enum { 492 XLR_SEC_PADHASH_PADDED = 1, 493 XLR_SEC_PADHASH_PAD 494 } XLR_SEC_PADHASH_MODE; 495 496 typedef enum { 497 XLR_SEC_HASHBYTES_ALL8 = 1, 498 XLR_SEC_HASHBYTES_MSB, 499 XLR_SEC_HASHBYTES_MSW 500 } XLR_SEC_HASHBYTES_MODE; 501 502 typedef enum { 503 XLR_SEC_NEXT_FINISH = 1, 504 XLR_SEC_NEXT_DO 505 } XLR_SEC_NEXT_MODE; 506 507 typedef enum { 508 XLR_SEC_PKT_IV_OLD = 1, 509 XLR_SEC_PKT_IV_NEW 510 } XLR_SEC_PKT_IV_MODE; 511 512 typedef enum { 513 XLR_SEC_LASTWORD_128 = 1, 514 XLR_SEC_LASTWORD_96MASK, 515 XLR_SEC_LASTWORD_64MASK, 516 XLR_SEC_LASTWORD_32MASK 517 } XLR_SEC_LASTWORD_MODE; 518 519 typedef enum { 520 XLR_SEC_CFB_MASK_REGULAR_CTR = 0, 521 XLR_SEC_CFB_MASK_CCMP, 522 XLR_SEC_CFB_MASK_GCM_WITH_SCI, 523 XLR_SEC_CFB_MASK_GCM_WITHOUT_SCI 524 } XLR_SEC_CFB_MASK_MODE; 525 526 /* 527 * Public Key 528 */ 529 typedef enum { 530 RMIPK_BLKWIDTH_512 = 1, 531 RMIPK_BLKWIDTH_1024 532 } RMIPK_BLKWIDTH_MODE; 533 534 typedef enum { 535 RMIPK_LDCONST_OLD = 1, 536 RMIPK_LDCONST_NEW 537 } RMIPK_LDCONST_MODE; 538 539 540 typedef struct xlr_sec_io_s { 541 unsigned int command; 542 unsigned int result_status; 543 unsigned int flags; 544 unsigned int session_num; 545 unsigned int use_callback; 546 unsigned int time_us; 547 unsigned int user_context[2]; /* usable for anything by caller */ 548 unsigned int command_context; /* Context (ID) of this command). */ 549 unsigned char initial_vector[XLR_SEC_MAX_IV_LENGTH]; 550 unsigned char crypt_key[XLR_SEC_MAX_CRYPT_KEY_LENGTH]; 551 unsigned char mac_key[XLR_SEC_MAX_AUTH_KEY_LENGTH]; 552 553 XLR_SEC_CIPHER_OP cipher_op; 554 XLR_SEC_CIPHER_MODE cipher_mode; 555 XLR_SEC_CIPHER_TYPE cipher_type; 556 XLR_SEC_CIPHER_INIT cipher_init; 557 unsigned int cipher_offset; 558 559 XLR_SEC_DIGEST_TYPE digest_type; 560 XLR_SEC_DIGEST_INIT digest_init; 561 XLR_SEC_DIGEST_SRC digest_src; 562 unsigned int digest_offset; 563 564 XLR_SEC_CKSUM_TYPE cksum_type; 565 XLR_SEC_CKSUM_SRC cksum_src; 566 unsigned int cksum_offset; 567 568 XLR_SEC_LOADHMACKEY_MODE pkt_hmac; 569 XLR_SEC_PADHASH_MODE pkt_hash; 570 XLR_SEC_HASHBYTES_MODE pkt_hashbytes; 571 XLR_SEC_NEXT_MODE pkt_next; 572 XLR_SEC_PKT_IV_MODE pkt_iv; 573 XLR_SEC_LASTWORD_MODE pkt_lastword; 574 575 unsigned int nonce; 576 unsigned int cfb_mask; 577 578 unsigned int iv_offset; 579 unsigned short pad_type; 580 unsigned short rc4_key_len; 581 582 unsigned int num_packets; 583 unsigned int num_fragments; 584 585 uint64_t source_buf; 586 unsigned int source_buf_size; 587 uint64_t dest_buf; 588 unsigned int dest_buf_size; 589 590 uint64_t auth_dest; 591 uint64_t cksum_dest; 592 593 unsigned short rc4_loadstate; 594 unsigned short rc4_savestate; 595 uint64_t rc4_state; 596 597 } xlr_sec_io_t, *xlr_sec_io_pt; 598 599 600 #define XLR_SEC_SESSION(sid) ((sid) & 0x000007ff) 601 #define XLR_SEC_SID(crd,ses) (((crd) << 28) | ((ses) & 0x7ff)) 602 603 /* 604 * Length values for cryptography 605 */ 606 /* 607 #define XLR_SEC_DES_KEY_LENGTH 8 608 #define XLR_SEC_3DES_KEY_LENGTH 24 609 #define XLR_SEC_MAX_CRYPT_KEY_LENGTH XLR_SEC_3DES_KEY_LENGTH 610 #define XLR_SEC_IV_LENGTH 8 611 #define XLR_SEC_AES_IV_LENGTH 16 612 #define XLR_SEC_MAX_IV_LENGTH XLR_SEC_AES_IV_LENGTH 613 */ 614 615 #define SEC_MAX_FRAG_LEN 16000 616 617 struct xlr_sec_command { 618 uint16_t session_num; 619 struct cryptop *crp; 620 struct cryptodesc *enccrd, *maccrd; 621 622 xlr_sec_io_t op; 623 }; 624 struct xlr_sec_session { 625 uint32_t sessionid; 626 int hs_used; 627 int hs_mlen; 628 struct xlr_sec_command cmd; 629 void *desc_ptr; 630 uint8_t multi_frag_flag; 631 }; 632 633 /* 634 * Holds data specific to rmi security accelerators 635 */ 636 struct xlr_sec_softc { 637 device_t sc_dev; /* device backpointer */ 638 struct mtx sc_mtx; /* per-instance lock */ 639 640 int32_t sc_cid; 641 struct xlr_sec_session *sc_sessions; 642 int sc_nsessions; 643 xlr_reg_t *mmio; 644 }; 645 646 647 /* 648 649 union xlr_sec_operand_t { 650 struct mbuf *m; 651 struct uio *io; 652 void *buf; 653 }xlr_sec_operand; 654 */ 655 656 657 658 659 660 /* this is passed to packet setup to optimize */ 661 #define XLR_SEC_SETUP_OP_CIPHER 0x00000001 662 #define XLR_SEC_SETUP_OP_HMAC 0x00000002 663 #define XLR_SEC_SETUP_OP_CIPHER_HMAC (XLR_SEC_SETUP_OP_CIPHER | XLR_SEC_SETUP_OP_HMAC) 664 /* this is passed to control_setup to update w/preserving existing keys */ 665 #define XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY 0x80000000 666 #define XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY 0x40000000 667 #define XLR_SEC_SETUP_OP_UPDATE_KEYS 0x00000010 668 #define XLR_SEC_SETUP_OP_FLIP_3DES_KEY 0x00000020 669 670 671 672 673 674 /* 675 * Message Ring Specifics 676 */ 677 678 #define SEC_MSGRING_WORDSIZE 2 679 680 681 /* 682 * 683 * 684 * rwR 31 30 29 27 26 24 23 21 20 18 685 * | NA | RSA0Out | Rsa0In | Pipe3Out | Pipe3In | ... 686 * 687 * 17 15 14 12 11 9 8 6 5 3 2 0 688 * | Pipe2Out | Pipe2In | Pipe1In | Pipe1In | Pipe0Out | Pipe0In | 689 * 690 * DMA CREDIT REG - 691 * NUMBER OF CREDITS PER PIPE 692 */ 693 694 #define SEC_DMA_CREDIT_RSA0_OUT_FOUR 0x20000000 695 #define SEC_DMA_CREDIT_RSA0_OUT_TWO 0x10000000 696 #define SEC_DMA_CREDIT_RSA0_OUT_ONE 0x08000000 697 698 #define SEC_DMA_CREDIT_RSA0_IN_FOUR 0x04000000 699 #define SEC_DMA_CREDIT_RSA0_IN_TWO 0x02000000 700 #define SEC_DMA_CREDIT_RSA0_IN_ONE 0x01000000 701 702 #define SEC_DMA_CREDIT_PIPE3_OUT_FOUR 0x00800000 703 #define SEC_DMA_CREDIT_PIPE3_OUT_TWO 0x00400000 704 #define SEC_DMA_CREDIT_PIPE3_OUT_ONE 0x00200000 705 706 #define SEC_DMA_CREDIT_PIPE3_IN_FOUR 0x00100000 707 #define SEC_DMA_CREDIT_PIPE3_IN_TWO 0x00080000 708 #define SEC_DMA_CREDIT_PIPE3_IN_ONE 0x00040000 709 710 #define SEC_DMA_CREDIT_PIPE2_OUT_FOUR 0x00020000 711 #define SEC_DMA_CREDIT_PIPE2_OUT_TWO 0x00010000 712 #define SEC_DMA_CREDIT_PIPE2_OUT_ONE 0x00008000 713 714 #define SEC_DMA_CREDIT_PIPE2_IN_FOUR 0x00004000 715 #define SEC_DMA_CREDIT_PIPE2_IN_TWO 0x00002000 716 #define SEC_DMA_CREDIT_PIPE2_IN_ONE 0x00001000 717 718 #define SEC_DMA_CREDIT_PIPE1_OUT_FOUR 0x00000800 719 #define SEC_DMA_CREDIT_PIPE1_OUT_TWO 0x00000400 720 #define SEC_DMA_CREDIT_PIPE1_OUT_ONE 0x00000200 721 722 #define SEC_DMA_CREDIT_PIPE1_IN_FOUR 0x00000100 723 #define SEC_DMA_CREDIT_PIPE1_IN_TWO 0x00000080 724 #define SEC_DMA_CREDIT_PIPE1_IN_ONE 0x00000040 725 726 #define SEC_DMA_CREDIT_PIPE0_OUT_FOUR 0x00000020 727 #define SEC_DMA_CREDIT_PIPE0_OUT_TWO 0x00000010 728 #define SEC_DMA_CREDIT_PIPE0_OUT_ONE 0x00000008 729 730 #define SEC_DMA_CREDIT_PIPE0_IN_FOUR 0x00000004 731 #define SEC_DMA_CREDIT_PIPE0_IN_TWO 0x00000002 732 #define SEC_DMA_CREDIT_PIPE0_IN_ONE 0x00000001 733 734 735 /* 736 * Currently, FOUR credits per PIPE 737 * 0x24924924 738 */ 739 #define SEC_DMA_CREDIT_CONFIG SEC_DMA_CREDIT_RSA0_OUT_FOUR | \ 740 SEC_DMA_CREDIT_RSA0_IN_FOUR | \ 741 SEC_DMA_CREDIT_PIPE3_OUT_FOUR | \ 742 SEC_DMA_CREDIT_PIPE3_IN_FOUR | \ 743 SEC_DMA_CREDIT_PIPE2_OUT_FOUR | \ 744 SEC_DMA_CREDIT_PIPE2_IN_FOUR | \ 745 SEC_DMA_CREDIT_PIPE1_OUT_FOUR | \ 746 SEC_DMA_CREDIT_PIPE1_IN_FOUR | \ 747 SEC_DMA_CREDIT_PIPE0_OUT_FOUR | \ 748 SEC_DMA_CREDIT_PIPE0_IN_FOUR 749 750 751 752 753 /* 754 * CONFIG2 755 * 31 5 4 3 756 * | NA | PIPE3_DEF_DBL_ISS | PIPE2_DEF_DBL_ISS | ... 757 * 758 * 2 1 0 759 * ... | PIPE1_DEF_DBL_ISS | PIPE0_DEF_DBL_ISS | ROUND_ROBIN_MODE | 760 * 761 * DBL_ISS - mode for SECENG and DMA controller which slows down transfers 762 * (to be conservativei; 0=Disable,1=Enable). 763 * ROUND_ROBIN - mode where SECENG dispatches operations to PIPE0-PIPE3 764 * and all messages are sent to PIPE0. 765 * 766 */ 767 768 #define SEC_CFG2_PIPE3_DBL_ISS_ON 0x00000010 769 #define SEC_CFG2_PIPE3_DBL_ISS_OFF 0x00000000 770 #define SEC_CFG2_PIPE2_DBL_ISS_ON 0x00000008 771 #define SEC_CFG2_PIPE2_DBL_ISS_OFF 0x00000000 772 #define SEC_CFG2_PIPE1_DBL_ISS_ON 0x00000004 773 #define SEC_CFG2_PIPE1_DBL_ISS_OFF 0x00000000 774 #define SEC_CFG2_PIPE0_DBL_ISS_ON 0x00000002 775 #define SEC_CFG2_PIPE0_DBL_ISS_OFF 0x00000000 776 #define SEC_CFG2_ROUND_ROBIN_ON 0x00000001 777 #define SEC_CFG2_ROUND_ROBIN_OFF 0x00000000 778 779 780 enum sec_pipe_config { 781 782 SEC_PIPE_CIPHER_KEY0_L0 = 0x00, 783 SEC_PIPE_CIPHER_KEY0_HI, 784 SEC_PIPE_CIPHER_KEY1_LO, 785 SEC_PIPE_CIPHER_KEY1_HI, 786 SEC_PIPE_CIPHER_KEY2_LO, 787 SEC_PIPE_CIPHER_KEY2_HI, 788 SEC_PIPE_CIPHER_KEY3_LO, 789 SEC_PIPE_CIPHER_KEY3_HI, 790 SEC_PIPE_HMAC_KEY0_LO, 791 SEC_PIPE_HMAC_KEY0_HI, 792 SEC_PIPE_HMAC_KEY1_LO, 793 SEC_PIPE_HMAC_KEY1_HI, 794 SEC_PIPE_HMAC_KEY2_LO, 795 SEC_PIPE_HMAC_KEY2_HI, 796 SEC_PIPE_HMAC_KEY3_LO, 797 SEC_PIPE_HMAC_KEY3_HI, 798 SEC_PIPE_HMAC_KEY4_LO, 799 SEC_PIPE_HMAC_KEY4_HI, 800 SEC_PIPE_HMAC_KEY5_LO, 801 SEC_PIPE_HMAC_KEY5_HI, 802 SEC_PIPE_HMAC_KEY6_LO, 803 SEC_PIPE_HMAC_KEY6_HI, 804 SEC_PIPE_HMAC_KEY7_LO, 805 SEC_PIPE_HMAC_KEY7_HI, 806 SEC_PIPE_NCFBM_LO, 807 SEC_PIPE_NCFBM_HI, 808 SEC_PIPE_INSTR_LO, 809 SEC_PIPE_INSTR_HI, 810 SEC_PIPE_RSVD0, 811 SEC_PIPE_RSVD1, 812 SEC_PIPE_RSVD2, 813 SEC_PIPE_RSVD3, 814 815 SEC_PIPE_DF_PTRS0, 816 SEC_PIPE_DF_PTRS1, 817 SEC_PIPE_DF_PTRS2, 818 SEC_PIPE_DF_PTRS3, 819 SEC_PIPE_DF_PTRS4, 820 SEC_PIPE_DF_PTRS5, 821 SEC_PIPE_DF_PTRS6, 822 SEC_PIPE_DF_PTRS7, 823 824 SEC_PIPE_DU_DATA_IN_LO, 825 SEC_PIPE_DU_DATA_IN_HI, 826 SEC_PIPE_DU_DATA_IN_CTRL, 827 SEC_PIPE_DU_DATA_OUT_LO, 828 SEC_PIPE_DU_DATA_OUT_HI, 829 SEC_PIPE_DU_DATA_OUT_CTRL, 830 831 SEC_PIPE_STATE0, 832 SEC_PIPE_STATE1, 833 SEC_PIPE_STATE2, 834 SEC_PIPE_STATE3, 835 SEC_PIPE_STATE4, 836 SEC_PIPE_INCLUDE_MASK0, 837 SEC_PIPE_INCLUDE_MASK1, 838 SEC_PIPE_INCLUDE_MASK2, 839 SEC_PIPE_INCLUDE_MASK3, 840 SEC_PIPE_INCLUDE_MASK4, 841 SEC_PIPE_EXCLUDE_MASK0, 842 SEC_PIPE_EXCLUDE_MASK1, 843 SEC_PIPE_EXCLUDE_MASK2, 844 SEC_PIPE_EXCLUDE_MASK3, 845 SEC_PIPE_EXCLUDE_MASK4, 846 }; 847 848 849 enum sec_pipe_base_config { 850 851 SEC_PIPE0_BASE = 0x00, 852 SEC_PIPE1_BASE = 0x40, 853 SEC_PIPE2_BASE = 0x80, 854 SEC_PIPE3_BASE = 0xc0 855 856 }; 857 858 enum sec_rsa_config { 859 860 SEC_RSA_PIPE0_DU_DATA_IN_LO = 0x100, 861 SEC_RSA_PIPE0_DU_DATA_IN_HI, 862 SEC_RSA_PIPE0_DU_DATA_IN_CTRL, 863 SEC_RSA_PIPE0_DU_DATA_OUT_LO, 864 SEC_RSA_PIPE0_DU_DATA_OUT_HI, 865 SEC_RSA_PIPE0_DU_DATA_OUT_CTRL, 866 SEC_RSA_RSVD0, 867 SEC_RSA_RSVD1, 868 869 SEC_RSA_PIPE0_STATE0, 870 SEC_RSA_PIPE0_STATE1, 871 SEC_RSA_PIPE0_STATE2, 872 SEC_RSA_PIPE0_INCLUDE_MASK0, 873 SEC_RSA_PIPE0_INCLUDE_MASK1, 874 SEC_RSA_PIPE0_INCLUDE_MASK2, 875 SEC_RSA_PIPE0_EXCLUDE_MASK0, 876 SEC_RSA_PIPE0_EXCLUDE_MASK1, 877 SEC_RSA_PIPE0_EXCLUDE_MASK2, 878 SEC_RSA_PIPE0_EVENT_CTR 879 880 }; 881 882 883 884 885 enum sec_config { 886 887 SEC_DMA_CREDIT = 0x140, 888 SEC_CONFIG1, 889 SEC_CONFIG2, 890 SEC_CONFIG3, 891 892 }; 893 894 895 896 enum sec_debug_config { 897 898 SEC_DW0_DESCRIPTOR0_LO = 0x180, 899 SEC_DW0_DESCRIPTOR0_HI, 900 SEC_DW0_DESCRIPTOR1_LO, 901 SEC_DW0_DESCRIPTOR1_HI, 902 SEC_DW1_DESCRIPTOR0_LO, 903 SEC_DW1_DESCRIPTOR0_HI, 904 SEC_DW1_DESCRIPTOR1_LO, 905 SEC_DW1_DESCRIPTOR1_HI, 906 SEC_DW2_DESCRIPTOR0_LO, 907 SEC_DW2_DESCRIPTOR0_HI, 908 SEC_DW2_DESCRIPTOR1_LO, 909 SEC_DW2_DESCRIPTOR1_HI, 910 SEC_DW3_DESCRIPTOR0_LO, 911 SEC_DW3_DESCRIPTOR0_HI, 912 SEC_DW3_DESCRIPTOR1_LO, 913 SEC_DW3_DESCRIPTOR1_HI, 914 915 SEC_STATE0, 916 SEC_STATE1, 917 SEC_STATE2, 918 SEC_INCLUDE_MASK0, 919 SEC_INCLUDE_MASK1, 920 SEC_INCLUDE_MASK2, 921 SEC_EXCLUDE_MASK0, 922 SEC_EXCLUDE_MASK1, 923 SEC_EXCLUDE_MASK2, 924 SEC_EVENT_CTR 925 926 }; 927 928 929 enum sec_msgring_bucket_config { 930 931 SEC_BIU_CREDITS = 0x308, 932 933 SEC_MSG_BUCKET0_SIZE = 0x320, 934 SEC_MSG_BUCKET1_SIZE, 935 SEC_MSG_BUCKET2_SIZE, 936 SEC_MSG_BUCKET3_SIZE, 937 SEC_MSG_BUCKET4_SIZE, 938 SEC_MSG_BUCKET5_SIZE, 939 SEC_MSG_BUCKET6_SIZE, 940 SEC_MSG_BUCKET7_SIZE, 941 }; 942 943 enum sec_msgring_credit_config { 944 945 SEC_CC_CPU0_0 = 0x380, 946 SEC_CC_CPU1_0 = 0x388, 947 SEC_CC_CPU2_0 = 0x390, 948 SEC_CC_CPU3_0 = 0x398, 949 SEC_CC_CPU4_0 = 0x3a0, 950 SEC_CC_CPU5_0 = 0x3a8, 951 SEC_CC_CPU6_0 = 0x3b0, 952 SEC_CC_CPU7_0 = 0x3b8 953 954 }; 955 956 enum sec_engine_id { 957 SEC_PIPE0, 958 SEC_PIPE1, 959 SEC_PIPE2, 960 SEC_PIPE3, 961 SEC_RSA 962 }; 963 964 enum sec_cipher { 965 SEC_AES256_MODE_HMAC, 966 SEC_AES256_MODE, 967 SEC_AES256_HMAC, 968 SEC_AES256, 969 SEC_AES192_MODE_HMAC, 970 SEC_AES192_MODE, 971 SEC_AES192_HMAC, 972 SEC_AES192, 973 SEC_AES128_MODE_HMAC, 974 SEC_AES128_MODE, 975 SEC_AES128_HMAC, 976 SEC_AES128, 977 SEC_DES_HMAC, 978 SEC_DES, 979 SEC_3DES, 980 SEC_3DES_HMAC, 981 SEC_HMAC 982 }; 983 984 enum sec_msgrng_msg_ctrl_config { 985 SEC_EOP = 5, 986 SEC_SOP = 6, 987 }; 988 989 990 991 void 992 xlr_sec_init(struct xlr_sec_softc *sc); 993 994 int 995 xlr_sec_setup(struct xlr_sec_session *ses, 996 struct xlr_sec_command *cmd, symkey_desc_pt desc); 997 998 symkey_desc_pt xlr_sec_allocate_desc(void *); 999 1000 #endif 1001