1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <linux/string_helpers.h>
29
30 #include <linux/unaligned.h>
31
32 #include <drm/drm_device.h>
33 #include <drm/drm_util.h>
34
35 #define ATOM_DEBUG
36
37 #include "atom.h"
38 #include "atom-names.h"
39 #include "atom-bits.h"
40 #include "radeon.h"
41
42 #define ATOM_COND_ABOVE 0
43 #define ATOM_COND_ABOVEOREQUAL 1
44 #define ATOM_COND_ALWAYS 2
45 #define ATOM_COND_BELOW 3
46 #define ATOM_COND_BELOWOREQUAL 4
47 #define ATOM_COND_EQUAL 5
48 #define ATOM_COND_NOTEQUAL 6
49
50 #define ATOM_PORT_ATI 0
51 #define ATOM_PORT_PCI 1
52 #define ATOM_PORT_SYSIO 2
53
54 #define ATOM_UNIT_MICROSEC 0
55 #define ATOM_UNIT_MILLISEC 1
56
57 #define PLL_INDEX 2
58 #define PLL_DATA 3
59
60 typedef struct {
61 struct atom_context *ctx;
62 uint32_t *ps, *ws;
63 int ps_size, ws_size;
64 int ps_shift;
65 uint16_t start;
66 unsigned last_jump;
67 unsigned long last_jump_jiffies;
68 bool abort;
69 } atom_exec_context;
70
71 int atom_debug = 0;
72 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params, int params_size);
73 int atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size);
74
75 static uint32_t atom_arg_mask[8] = {
76 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
77 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
78 };
79 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
80
81 static int atom_dst_to_src[8][4] = {
82 /* translate destination alignment field to the source alignment encoding */
83 {0, 0, 0, 0},
84 {1, 2, 3, 0},
85 {1, 2, 3, 0},
86 {1, 2, 3, 0},
87 {4, 5, 6, 7},
88 {4, 5, 6, 7},
89 {4, 5, 6, 7},
90 {4, 5, 6, 7},
91 };
92 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
93
94 static int debug_depth = 0;
95 #ifdef ATOM_DEBUG
debug_print_spaces(int n)96 static void debug_print_spaces(int n)
97 {
98 while (n--)
99 printk(" ");
100 }
101
102 #ifdef DEBUG
103 #undef DEBUG
104 #endif
105
106 #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
107 #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
108 #else
109 #define DEBUG(...) do { } while (0)
110 #define SDEBUG(...) do { } while (0)
111 #endif
112
atom_iio_execute(struct atom_context * ctx,int base,uint32_t index,uint32_t data)113 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
114 uint32_t index, uint32_t data)
115 {
116 struct radeon_device *rdev = ctx->card->dev->dev_private;
117 uint32_t temp = 0xCDCDCDCD;
118
119 while (1)
120 switch (CU8(base)) {
121 case ATOM_IIO_NOP:
122 base++;
123 break;
124 case ATOM_IIO_READ:
125 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
126 base += 3;
127 break;
128 case ATOM_IIO_WRITE:
129 if (rdev->family == CHIP_RV515)
130 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
131 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
132 base += 3;
133 break;
134 case ATOM_IIO_CLEAR:
135 temp &=
136 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
137 CU8(base + 2));
138 base += 3;
139 break;
140 case ATOM_IIO_SET:
141 temp |=
142 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
143 2);
144 base += 3;
145 break;
146 case ATOM_IIO_MOVE_INDEX:
147 temp &=
148 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
149 CU8(base + 3));
150 temp |=
151 ((index >> CU8(base + 2)) &
152 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
153 3);
154 base += 4;
155 break;
156 case ATOM_IIO_MOVE_DATA:
157 temp &=
158 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
159 CU8(base + 3));
160 temp |=
161 ((data >> CU8(base + 2)) &
162 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
163 3);
164 base += 4;
165 break;
166 case ATOM_IIO_MOVE_ATTR:
167 temp &=
168 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
169 CU8(base + 3));
170 temp |=
171 ((ctx->io_attr >> CU8(base + 2)) &
172 (0xFFFFFFFF >> (32 - CU8(base + 1)))) <<
173 CU8(base + 3);
174 base += 4;
175 break;
176 case ATOM_IIO_END:
177 return temp;
178 default:
179 pr_info("Unknown IIO opcode\n");
180 return 0;
181 }
182 }
183
atom_get_src_int(atom_exec_context * ctx,uint8_t attr,int * ptr,uint32_t * saved,int print)184 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
185 int *ptr, uint32_t *saved, int print)
186 {
187 uint32_t idx, val = 0xCDCDCDCD, align, arg;
188 struct atom_context *gctx = ctx->ctx;
189 arg = attr & 7;
190 align = (attr >> 3) & 7;
191 switch (arg) {
192 case ATOM_ARG_REG:
193 idx = U16(*ptr);
194 (*ptr) += 2;
195 if (print)
196 DEBUG("REG[0x%04X]", idx);
197 idx += gctx->reg_block;
198 switch (gctx->io_mode) {
199 case ATOM_IO_MM:
200 val = gctx->card->reg_read(gctx->card, idx);
201 break;
202 case ATOM_IO_PCI:
203 pr_info("PCI registers are not implemented\n");
204 return 0;
205 case ATOM_IO_SYSIO:
206 pr_info("SYSIO registers are not implemented\n");
207 return 0;
208 default:
209 if (!(gctx->io_mode & 0x80)) {
210 pr_info("Bad IO mode\n");
211 return 0;
212 }
213 if (!gctx->iio[gctx->io_mode & 0x7F]) {
214 pr_info("Undefined indirect IO read method %d\n",
215 gctx->io_mode & 0x7F);
216 return 0;
217 }
218 val =
219 atom_iio_execute(gctx,
220 gctx->iio[gctx->io_mode & 0x7F],
221 idx, 0);
222 }
223 break;
224 case ATOM_ARG_PS:
225 idx = U8(*ptr);
226 (*ptr)++;
227 /* get_unaligned_le32 avoids unaligned accesses from atombios
228 * tables, noticed on a DEC Alpha. */
229 if (idx < ctx->ps_size)
230 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
231 else
232 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size);
233 if (print)
234 DEBUG("PS[0x%02X,0x%04X]", idx, val);
235 break;
236 case ATOM_ARG_WS:
237 idx = U8(*ptr);
238 (*ptr)++;
239 if (print)
240 DEBUG("WS[0x%02X]", idx);
241 switch (idx) {
242 case ATOM_WS_QUOTIENT:
243 val = gctx->divmul[0];
244 break;
245 case ATOM_WS_REMAINDER:
246 val = gctx->divmul[1];
247 break;
248 case ATOM_WS_DATAPTR:
249 val = gctx->data_block;
250 break;
251 case ATOM_WS_SHIFT:
252 val = gctx->shift;
253 break;
254 case ATOM_WS_OR_MASK:
255 val = 1 << gctx->shift;
256 break;
257 case ATOM_WS_AND_MASK:
258 val = ~(1 << gctx->shift);
259 break;
260 case ATOM_WS_FB_WINDOW:
261 val = gctx->fb_base;
262 break;
263 case ATOM_WS_ATTRIBUTES:
264 val = gctx->io_attr;
265 break;
266 case ATOM_WS_REGPTR:
267 val = gctx->reg_block;
268 break;
269 default:
270 if (idx < ctx->ws_size)
271 val = ctx->ws[idx];
272 else
273 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size);
274 }
275 break;
276 case ATOM_ARG_ID:
277 idx = U16(*ptr);
278 (*ptr) += 2;
279 if (print) {
280 if (gctx->data_block)
281 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
282 else
283 DEBUG("ID[0x%04X]", idx);
284 }
285 val = U32(idx + gctx->data_block);
286 break;
287 case ATOM_ARG_FB:
288 idx = U8(*ptr);
289 (*ptr)++;
290 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
291 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
292 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
293 val = 0;
294 } else
295 val = gctx->scratch[(gctx->fb_base / 4) + idx];
296 if (print)
297 DEBUG("FB[0x%02X]", idx);
298 break;
299 case ATOM_ARG_IMM:
300 switch (align) {
301 case ATOM_SRC_DWORD:
302 val = U32(*ptr);
303 (*ptr) += 4;
304 if (print)
305 DEBUG("IMM 0x%08X\n", val);
306 return val;
307 case ATOM_SRC_WORD0:
308 case ATOM_SRC_WORD8:
309 case ATOM_SRC_WORD16:
310 val = U16(*ptr);
311 (*ptr) += 2;
312 if (print)
313 DEBUG("IMM 0x%04X\n", val);
314 return val;
315 case ATOM_SRC_BYTE0:
316 case ATOM_SRC_BYTE8:
317 case ATOM_SRC_BYTE16:
318 case ATOM_SRC_BYTE24:
319 val = U8(*ptr);
320 (*ptr)++;
321 if (print)
322 DEBUG("IMM 0x%02X\n", val);
323 return val;
324 }
325 return 0;
326 case ATOM_ARG_PLL:
327 idx = U8(*ptr);
328 (*ptr)++;
329 if (print)
330 DEBUG("PLL[0x%02X]", idx);
331 val = gctx->card->pll_read(gctx->card, idx);
332 break;
333 case ATOM_ARG_MC:
334 idx = U8(*ptr);
335 (*ptr)++;
336 if (print)
337 DEBUG("MC[0x%02X]", idx);
338 val = gctx->card->mc_read(gctx->card, idx);
339 break;
340 }
341 if (saved)
342 *saved = val;
343 val &= atom_arg_mask[align];
344 val >>= atom_arg_shift[align];
345 if (print)
346 switch (align) {
347 case ATOM_SRC_DWORD:
348 DEBUG(".[31:0] -> 0x%08X\n", val);
349 break;
350 case ATOM_SRC_WORD0:
351 DEBUG(".[15:0] -> 0x%04X\n", val);
352 break;
353 case ATOM_SRC_WORD8:
354 DEBUG(".[23:8] -> 0x%04X\n", val);
355 break;
356 case ATOM_SRC_WORD16:
357 DEBUG(".[31:16] -> 0x%04X\n", val);
358 break;
359 case ATOM_SRC_BYTE0:
360 DEBUG(".[7:0] -> 0x%02X\n", val);
361 break;
362 case ATOM_SRC_BYTE8:
363 DEBUG(".[15:8] -> 0x%02X\n", val);
364 break;
365 case ATOM_SRC_BYTE16:
366 DEBUG(".[23:16] -> 0x%02X\n", val);
367 break;
368 case ATOM_SRC_BYTE24:
369 DEBUG(".[31:24] -> 0x%02X\n", val);
370 break;
371 }
372 return val;
373 }
374
atom_skip_src_int(atom_exec_context * ctx,uint8_t attr,int * ptr)375 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
376 {
377 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
378 switch (arg) {
379 case ATOM_ARG_REG:
380 case ATOM_ARG_ID:
381 (*ptr) += 2;
382 break;
383 case ATOM_ARG_PLL:
384 case ATOM_ARG_MC:
385 case ATOM_ARG_PS:
386 case ATOM_ARG_WS:
387 case ATOM_ARG_FB:
388 (*ptr)++;
389 break;
390 case ATOM_ARG_IMM:
391 switch (align) {
392 case ATOM_SRC_DWORD:
393 (*ptr) += 4;
394 return;
395 case ATOM_SRC_WORD0:
396 case ATOM_SRC_WORD8:
397 case ATOM_SRC_WORD16:
398 (*ptr) += 2;
399 return;
400 case ATOM_SRC_BYTE0:
401 case ATOM_SRC_BYTE8:
402 case ATOM_SRC_BYTE16:
403 case ATOM_SRC_BYTE24:
404 (*ptr)++;
405 return;
406 }
407 return;
408 }
409 }
410
atom_get_src(atom_exec_context * ctx,uint8_t attr,int * ptr)411 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
412 {
413 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
414 }
415
atom_get_src_direct(atom_exec_context * ctx,uint8_t align,int * ptr)416 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
417 {
418 uint32_t val = 0xCDCDCDCD;
419
420 switch (align) {
421 case ATOM_SRC_DWORD:
422 val = U32(*ptr);
423 (*ptr) += 4;
424 break;
425 case ATOM_SRC_WORD0:
426 case ATOM_SRC_WORD8:
427 case ATOM_SRC_WORD16:
428 val = U16(*ptr);
429 (*ptr) += 2;
430 break;
431 case ATOM_SRC_BYTE0:
432 case ATOM_SRC_BYTE8:
433 case ATOM_SRC_BYTE16:
434 case ATOM_SRC_BYTE24:
435 val = U8(*ptr);
436 (*ptr)++;
437 break;
438 }
439 return val;
440 }
441
atom_get_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr,uint32_t * saved,int print)442 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
443 int *ptr, uint32_t *saved, int print)
444 {
445 return atom_get_src_int(ctx,
446 arg | atom_dst_to_src[(attr >> 3) &
447 7][(attr >> 6) & 3] << 3,
448 ptr, saved, print);
449 }
450
atom_skip_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr)451 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
452 {
453 atom_skip_src_int(ctx,
454 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
455 3] << 3, ptr);
456 }
457
atom_put_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr,uint32_t val,uint32_t saved)458 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
459 int *ptr, uint32_t val, uint32_t saved)
460 {
461 uint32_t align =
462 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
463 val, idx;
464 struct atom_context *gctx = ctx->ctx;
465 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
466 val <<= atom_arg_shift[align];
467 val &= atom_arg_mask[align];
468 saved &= ~atom_arg_mask[align];
469 val |= saved;
470 switch (arg) {
471 case ATOM_ARG_REG:
472 idx = U16(*ptr);
473 (*ptr) += 2;
474 DEBUG("REG[0x%04X]", idx);
475 idx += gctx->reg_block;
476 switch (gctx->io_mode) {
477 case ATOM_IO_MM:
478 if (idx == 0)
479 gctx->card->reg_write(gctx->card, idx,
480 val << 2);
481 else
482 gctx->card->reg_write(gctx->card, idx, val);
483 break;
484 case ATOM_IO_PCI:
485 pr_info("PCI registers are not implemented\n");
486 return;
487 case ATOM_IO_SYSIO:
488 pr_info("SYSIO registers are not implemented\n");
489 return;
490 default:
491 if (!(gctx->io_mode & 0x80)) {
492 pr_info("Bad IO mode\n");
493 return;
494 }
495 if (!gctx->iio[gctx->io_mode & 0xFF]) {
496 pr_info("Undefined indirect IO write method %d\n",
497 gctx->io_mode & 0x7F);
498 return;
499 }
500 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
501 idx, val);
502 }
503 break;
504 case ATOM_ARG_PS:
505 idx = U8(*ptr);
506 (*ptr)++;
507 DEBUG("PS[0x%02X]", idx);
508 if (idx >= ctx->ps_size) {
509 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size);
510 return;
511 }
512 ctx->ps[idx] = cpu_to_le32(val);
513 break;
514 case ATOM_ARG_WS:
515 idx = U8(*ptr);
516 (*ptr)++;
517 DEBUG("WS[0x%02X]", idx);
518 switch (idx) {
519 case ATOM_WS_QUOTIENT:
520 gctx->divmul[0] = val;
521 break;
522 case ATOM_WS_REMAINDER:
523 gctx->divmul[1] = val;
524 break;
525 case ATOM_WS_DATAPTR:
526 gctx->data_block = val;
527 break;
528 case ATOM_WS_SHIFT:
529 gctx->shift = val;
530 break;
531 case ATOM_WS_OR_MASK:
532 case ATOM_WS_AND_MASK:
533 break;
534 case ATOM_WS_FB_WINDOW:
535 gctx->fb_base = val;
536 break;
537 case ATOM_WS_ATTRIBUTES:
538 gctx->io_attr = val;
539 break;
540 case ATOM_WS_REGPTR:
541 gctx->reg_block = val;
542 break;
543 default:
544 if (idx >= ctx->ws_size) {
545 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size);
546 return;
547 }
548 ctx->ws[idx] = val;
549 }
550 break;
551 case ATOM_ARG_FB:
552 idx = U8(*ptr);
553 (*ptr)++;
554 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
555 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
556 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
557 } else
558 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
559 DEBUG("FB[0x%02X]", idx);
560 break;
561 case ATOM_ARG_PLL:
562 idx = U8(*ptr);
563 (*ptr)++;
564 DEBUG("PLL[0x%02X]", idx);
565 gctx->card->pll_write(gctx->card, idx, val);
566 break;
567 case ATOM_ARG_MC:
568 idx = U8(*ptr);
569 (*ptr)++;
570 DEBUG("MC[0x%02X]", idx);
571 gctx->card->mc_write(gctx->card, idx, val);
572 return;
573 }
574 switch (align) {
575 case ATOM_SRC_DWORD:
576 DEBUG(".[31:0] <- 0x%08X\n", old_val);
577 break;
578 case ATOM_SRC_WORD0:
579 DEBUG(".[15:0] <- 0x%04X\n", old_val);
580 break;
581 case ATOM_SRC_WORD8:
582 DEBUG(".[23:8] <- 0x%04X\n", old_val);
583 break;
584 case ATOM_SRC_WORD16:
585 DEBUG(".[31:16] <- 0x%04X\n", old_val);
586 break;
587 case ATOM_SRC_BYTE0:
588 DEBUG(".[7:0] <- 0x%02X\n", old_val);
589 break;
590 case ATOM_SRC_BYTE8:
591 DEBUG(".[15:8] <- 0x%02X\n", old_val);
592 break;
593 case ATOM_SRC_BYTE16:
594 DEBUG(".[23:16] <- 0x%02X\n", old_val);
595 break;
596 case ATOM_SRC_BYTE24:
597 DEBUG(".[31:24] <- 0x%02X\n", old_val);
598 break;
599 }
600 }
601
atom_op_add(atom_exec_context * ctx,int * ptr,int arg)602 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
603 {
604 uint8_t attr = U8((*ptr)++);
605 uint32_t dst, src, saved;
606 int dptr = *ptr;
607 SDEBUG(" dst: ");
608 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
609 SDEBUG(" src: ");
610 src = atom_get_src(ctx, attr, ptr);
611 dst += src;
612 SDEBUG(" dst: ");
613 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
614 }
615
atom_op_and(atom_exec_context * ctx,int * ptr,int arg)616 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
617 {
618 uint8_t attr = U8((*ptr)++);
619 uint32_t dst, src, saved;
620 int dptr = *ptr;
621 SDEBUG(" dst: ");
622 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
623 SDEBUG(" src: ");
624 src = atom_get_src(ctx, attr, ptr);
625 dst &= src;
626 SDEBUG(" dst: ");
627 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
628 }
629
atom_op_beep(atom_exec_context * ctx,int * ptr,int arg)630 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
631 {
632 printk("ATOM BIOS beeped!\n");
633 }
634
atom_op_calltable(atom_exec_context * ctx,int * ptr,int arg)635 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
636 {
637 int idx = U8((*ptr)++);
638 int r = 0;
639
640 if (idx < ATOM_TABLE_NAMES_CNT)
641 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
642 else
643 SDEBUG(" table: %d\n", idx);
644 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
645 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift, ctx->ps_size - ctx->ps_shift);
646 if (r) {
647 ctx->abort = true;
648 }
649 }
650
atom_op_clear(atom_exec_context * ctx,int * ptr,int arg)651 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
652 {
653 uint8_t attr = U8((*ptr)++);
654 uint32_t saved;
655 int dptr = *ptr;
656 attr &= 0x38;
657 attr |= atom_def_dst[attr >> 3] << 6;
658 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
659 SDEBUG(" dst: ");
660 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
661 }
662
atom_op_compare(atom_exec_context * ctx,int * ptr,int arg)663 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
664 {
665 uint8_t attr = U8((*ptr)++);
666 uint32_t dst, src;
667 SDEBUG(" src1: ");
668 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
669 SDEBUG(" src2: ");
670 src = atom_get_src(ctx, attr, ptr);
671 ctx->ctx->cs_equal = (dst == src);
672 ctx->ctx->cs_above = (dst > src);
673 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
674 ctx->ctx->cs_above ? "GT" : "LE");
675 }
676
atom_op_delay(atom_exec_context * ctx,int * ptr,int arg)677 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
678 {
679 unsigned count = U8((*ptr)++);
680 SDEBUG(" count: %d\n", count);
681 if (arg == ATOM_UNIT_MICROSEC)
682 udelay(count);
683 else if (!drm_can_sleep())
684 mdelay(count);
685 else
686 drm_msleep(count);
687 }
688
atom_op_div(atom_exec_context * ctx,int * ptr,int arg)689 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
690 {
691 uint8_t attr = U8((*ptr)++);
692 uint32_t dst, src;
693 SDEBUG(" src1: ");
694 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
695 SDEBUG(" src2: ");
696 src = atom_get_src(ctx, attr, ptr);
697 if (src != 0) {
698 ctx->ctx->divmul[0] = dst / src;
699 ctx->ctx->divmul[1] = dst % src;
700 } else {
701 ctx->ctx->divmul[0] = 0;
702 ctx->ctx->divmul[1] = 0;
703 }
704 }
705
atom_op_eot(atom_exec_context * ctx,int * ptr,int arg)706 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
707 {
708 /* functionally, a nop */
709 }
710
atom_op_jump(atom_exec_context * ctx,int * ptr,int arg)711 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
712 {
713 int execute = 0, target = U16(*ptr);
714 unsigned long cjiffies;
715
716 (*ptr) += 2;
717 switch (arg) {
718 case ATOM_COND_ABOVE:
719 execute = ctx->ctx->cs_above;
720 break;
721 case ATOM_COND_ABOVEOREQUAL:
722 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
723 break;
724 case ATOM_COND_ALWAYS:
725 execute = 1;
726 break;
727 case ATOM_COND_BELOW:
728 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
729 break;
730 case ATOM_COND_BELOWOREQUAL:
731 execute = !ctx->ctx->cs_above;
732 break;
733 case ATOM_COND_EQUAL:
734 execute = ctx->ctx->cs_equal;
735 break;
736 case ATOM_COND_NOTEQUAL:
737 execute = !ctx->ctx->cs_equal;
738 break;
739 }
740 if (arg != ATOM_COND_ALWAYS)
741 SDEBUG(" taken: %s\n", str_yes_no(execute));
742 SDEBUG(" target: 0x%04X\n", target);
743 if (execute) {
744 if (ctx->last_jump == (ctx->start + target)) {
745 cjiffies = jiffies;
746 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
747 cjiffies -= ctx->last_jump_jiffies;
748 if ((jiffies_to_msecs(cjiffies) > 5000)) {
749 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
750 ctx->abort = true;
751 }
752 } else {
753 /* jiffies wrap around we will just wait a little longer */
754 ctx->last_jump_jiffies = jiffies;
755 }
756 } else {
757 ctx->last_jump = ctx->start + target;
758 ctx->last_jump_jiffies = jiffies;
759 }
760 *ptr = ctx->start + target;
761 }
762 }
763
atom_op_mask(atom_exec_context * ctx,int * ptr,int arg)764 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
765 {
766 uint8_t attr = U8((*ptr)++);
767 uint32_t dst, mask, src, saved;
768 int dptr = *ptr;
769 SDEBUG(" dst: ");
770 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
771 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
772 SDEBUG(" mask: 0x%08x", mask);
773 SDEBUG(" src: ");
774 src = atom_get_src(ctx, attr, ptr);
775 dst &= mask;
776 dst |= src;
777 SDEBUG(" dst: ");
778 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
779 }
780
atom_op_move(atom_exec_context * ctx,int * ptr,int arg)781 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
782 {
783 uint8_t attr = U8((*ptr)++);
784 uint32_t src, saved;
785 int dptr = *ptr;
786 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
787 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
788 else {
789 atom_skip_dst(ctx, arg, attr, ptr);
790 saved = 0xCDCDCDCD;
791 }
792 SDEBUG(" src: ");
793 src = atom_get_src(ctx, attr, ptr);
794 SDEBUG(" dst: ");
795 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
796 }
797
atom_op_mul(atom_exec_context * ctx,int * ptr,int arg)798 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
799 {
800 uint8_t attr = U8((*ptr)++);
801 uint32_t dst, src;
802 SDEBUG(" src1: ");
803 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
804 SDEBUG(" src2: ");
805 src = atom_get_src(ctx, attr, ptr);
806 ctx->ctx->divmul[0] = dst * src;
807 }
808
atom_op_nop(atom_exec_context * ctx,int * ptr,int arg)809 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
810 {
811 /* nothing */
812 }
813
atom_op_or(atom_exec_context * ctx,int * ptr,int arg)814 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
815 {
816 uint8_t attr = U8((*ptr)++);
817 uint32_t dst, src, saved;
818 int dptr = *ptr;
819 SDEBUG(" dst: ");
820 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
821 SDEBUG(" src: ");
822 src = atom_get_src(ctx, attr, ptr);
823 dst |= src;
824 SDEBUG(" dst: ");
825 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
826 }
827
atom_op_postcard(atom_exec_context * ctx,int * ptr,int arg)828 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
829 {
830 uint8_t val = U8((*ptr)++);
831 SDEBUG("POST card output: 0x%02X\n", val);
832 }
833
atom_op_repeat(atom_exec_context * ctx,int * ptr,int arg)834 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
835 {
836 pr_info("unimplemented!\n");
837 }
838
atom_op_restorereg(atom_exec_context * ctx,int * ptr,int arg)839 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
840 {
841 pr_info("unimplemented!\n");
842 }
843
atom_op_savereg(atom_exec_context * ctx,int * ptr,int arg)844 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
845 {
846 pr_info("unimplemented!\n");
847 }
848
atom_op_setdatablock(atom_exec_context * ctx,int * ptr,int arg)849 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
850 {
851 int idx = U8(*ptr);
852 (*ptr)++;
853 SDEBUG(" block: %d\n", idx);
854 if (!idx)
855 ctx->ctx->data_block = 0;
856 else if (idx == 255)
857 ctx->ctx->data_block = ctx->start;
858 else
859 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
860 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
861 }
862
atom_op_setfbbase(atom_exec_context * ctx,int * ptr,int arg)863 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
864 {
865 uint8_t attr = U8((*ptr)++);
866 SDEBUG(" fb_base: ");
867 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
868 }
869
atom_op_setport(atom_exec_context * ctx,int * ptr,int arg)870 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
871 {
872 int port;
873 switch (arg) {
874 case ATOM_PORT_ATI:
875 port = U16(*ptr);
876 if (port < ATOM_IO_NAMES_CNT)
877 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
878 else
879 SDEBUG(" port: %d\n", port);
880 if (!port)
881 ctx->ctx->io_mode = ATOM_IO_MM;
882 else
883 ctx->ctx->io_mode = ATOM_IO_IIO | port;
884 (*ptr) += 2;
885 break;
886 case ATOM_PORT_PCI:
887 ctx->ctx->io_mode = ATOM_IO_PCI;
888 (*ptr)++;
889 break;
890 case ATOM_PORT_SYSIO:
891 ctx->ctx->io_mode = ATOM_IO_SYSIO;
892 (*ptr)++;
893 break;
894 }
895 }
896
atom_op_setregblock(atom_exec_context * ctx,int * ptr,int arg)897 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
898 {
899 ctx->ctx->reg_block = U16(*ptr);
900 (*ptr) += 2;
901 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
902 }
903
atom_op_shift_left(atom_exec_context * ctx,int * ptr,int arg)904 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
905 {
906 uint8_t attr = U8((*ptr)++), shift;
907 uint32_t saved, dst;
908 int dptr = *ptr;
909 attr &= 0x38;
910 attr |= atom_def_dst[attr >> 3] << 6;
911 SDEBUG(" dst: ");
912 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
913 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
914 SDEBUG(" shift: %d\n", shift);
915 dst <<= shift;
916 SDEBUG(" dst: ");
917 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
918 }
919
atom_op_shift_right(atom_exec_context * ctx,int * ptr,int arg)920 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
921 {
922 uint8_t attr = U8((*ptr)++), shift;
923 uint32_t saved, dst;
924 int dptr = *ptr;
925 attr &= 0x38;
926 attr |= atom_def_dst[attr >> 3] << 6;
927 SDEBUG(" dst: ");
928 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
929 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
930 SDEBUG(" shift: %d\n", shift);
931 dst >>= shift;
932 SDEBUG(" dst: ");
933 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
934 }
935
atom_op_shl(atom_exec_context * ctx,int * ptr,int arg)936 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
937 {
938 uint8_t attr = U8((*ptr)++), shift;
939 uint32_t saved, dst;
940 int dptr = *ptr;
941 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
942 SDEBUG(" dst: ");
943 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
944 /* op needs to full dst value */
945 dst = saved;
946 shift = atom_get_src(ctx, attr, ptr);
947 SDEBUG(" shift: %d\n", shift);
948 dst <<= shift;
949 dst &= atom_arg_mask[dst_align];
950 dst >>= atom_arg_shift[dst_align];
951 SDEBUG(" dst: ");
952 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
953 }
954
atom_op_shr(atom_exec_context * ctx,int * ptr,int arg)955 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
956 {
957 uint8_t attr = U8((*ptr)++), shift;
958 uint32_t saved, dst;
959 int dptr = *ptr;
960 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
961 SDEBUG(" dst: ");
962 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
963 /* op needs to full dst value */
964 dst = saved;
965 shift = atom_get_src(ctx, attr, ptr);
966 SDEBUG(" shift: %d\n", shift);
967 dst >>= shift;
968 dst &= atom_arg_mask[dst_align];
969 dst >>= atom_arg_shift[dst_align];
970 SDEBUG(" dst: ");
971 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
972 }
973
atom_op_sub(atom_exec_context * ctx,int * ptr,int arg)974 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
975 {
976 uint8_t attr = U8((*ptr)++);
977 uint32_t dst, src, saved;
978 int dptr = *ptr;
979 SDEBUG(" dst: ");
980 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
981 SDEBUG(" src: ");
982 src = atom_get_src(ctx, attr, ptr);
983 dst -= src;
984 SDEBUG(" dst: ");
985 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
986 }
987
atom_op_switch(atom_exec_context * ctx,int * ptr,int arg)988 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
989 {
990 uint8_t attr = U8((*ptr)++);
991 uint32_t src, val, target;
992 SDEBUG(" switch: ");
993 src = atom_get_src(ctx, attr, ptr);
994 while (U16(*ptr) != ATOM_CASE_END)
995 if (U8(*ptr) == ATOM_CASE_MAGIC) {
996 (*ptr)++;
997 SDEBUG(" case: ");
998 val =
999 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
1000 ptr);
1001 target = U16(*ptr);
1002 if (val == src) {
1003 SDEBUG(" target: %04X\n", target);
1004 *ptr = ctx->start + target;
1005 return;
1006 }
1007 (*ptr) += 2;
1008 } else {
1009 pr_info("Bad case\n");
1010 return;
1011 }
1012 (*ptr) += 2;
1013 }
1014
atom_op_test(atom_exec_context * ctx,int * ptr,int arg)1015 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1016 {
1017 uint8_t attr = U8((*ptr)++);
1018 uint32_t dst, src;
1019 SDEBUG(" src1: ");
1020 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1021 SDEBUG(" src2: ");
1022 src = atom_get_src(ctx, attr, ptr);
1023 ctx->ctx->cs_equal = ((dst & src) == 0);
1024 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1025 }
1026
atom_op_xor(atom_exec_context * ctx,int * ptr,int arg)1027 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1028 {
1029 uint8_t attr = U8((*ptr)++);
1030 uint32_t dst, src, saved;
1031 int dptr = *ptr;
1032 SDEBUG(" dst: ");
1033 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1034 SDEBUG(" src: ");
1035 src = atom_get_src(ctx, attr, ptr);
1036 dst ^= src;
1037 SDEBUG(" dst: ");
1038 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1039 }
1040
atom_op_debug(atom_exec_context * ctx,int * ptr,int arg)1041 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1042 {
1043 pr_info("unimplemented!\n");
1044 }
1045
1046 static struct {
1047 void (*func) (atom_exec_context *, int *, int);
1048 int arg;
1049 } opcode_table[ATOM_OP_CNT] = {
1050 {
1051 NULL, 0}, {
1052 atom_op_move, ATOM_ARG_REG}, {
1053 atom_op_move, ATOM_ARG_PS}, {
1054 atom_op_move, ATOM_ARG_WS}, {
1055 atom_op_move, ATOM_ARG_FB}, {
1056 atom_op_move, ATOM_ARG_PLL}, {
1057 atom_op_move, ATOM_ARG_MC}, {
1058 atom_op_and, ATOM_ARG_REG}, {
1059 atom_op_and, ATOM_ARG_PS}, {
1060 atom_op_and, ATOM_ARG_WS}, {
1061 atom_op_and, ATOM_ARG_FB}, {
1062 atom_op_and, ATOM_ARG_PLL}, {
1063 atom_op_and, ATOM_ARG_MC}, {
1064 atom_op_or, ATOM_ARG_REG}, {
1065 atom_op_or, ATOM_ARG_PS}, {
1066 atom_op_or, ATOM_ARG_WS}, {
1067 atom_op_or, ATOM_ARG_FB}, {
1068 atom_op_or, ATOM_ARG_PLL}, {
1069 atom_op_or, ATOM_ARG_MC}, {
1070 atom_op_shift_left, ATOM_ARG_REG}, {
1071 atom_op_shift_left, ATOM_ARG_PS}, {
1072 atom_op_shift_left, ATOM_ARG_WS}, {
1073 atom_op_shift_left, ATOM_ARG_FB}, {
1074 atom_op_shift_left, ATOM_ARG_PLL}, {
1075 atom_op_shift_left, ATOM_ARG_MC}, {
1076 atom_op_shift_right, ATOM_ARG_REG}, {
1077 atom_op_shift_right, ATOM_ARG_PS}, {
1078 atom_op_shift_right, ATOM_ARG_WS}, {
1079 atom_op_shift_right, ATOM_ARG_FB}, {
1080 atom_op_shift_right, ATOM_ARG_PLL}, {
1081 atom_op_shift_right, ATOM_ARG_MC}, {
1082 atom_op_mul, ATOM_ARG_REG}, {
1083 atom_op_mul, ATOM_ARG_PS}, {
1084 atom_op_mul, ATOM_ARG_WS}, {
1085 atom_op_mul, ATOM_ARG_FB}, {
1086 atom_op_mul, ATOM_ARG_PLL}, {
1087 atom_op_mul, ATOM_ARG_MC}, {
1088 atom_op_div, ATOM_ARG_REG}, {
1089 atom_op_div, ATOM_ARG_PS}, {
1090 atom_op_div, ATOM_ARG_WS}, {
1091 atom_op_div, ATOM_ARG_FB}, {
1092 atom_op_div, ATOM_ARG_PLL}, {
1093 atom_op_div, ATOM_ARG_MC}, {
1094 atom_op_add, ATOM_ARG_REG}, {
1095 atom_op_add, ATOM_ARG_PS}, {
1096 atom_op_add, ATOM_ARG_WS}, {
1097 atom_op_add, ATOM_ARG_FB}, {
1098 atom_op_add, ATOM_ARG_PLL}, {
1099 atom_op_add, ATOM_ARG_MC}, {
1100 atom_op_sub, ATOM_ARG_REG}, {
1101 atom_op_sub, ATOM_ARG_PS}, {
1102 atom_op_sub, ATOM_ARG_WS}, {
1103 atom_op_sub, ATOM_ARG_FB}, {
1104 atom_op_sub, ATOM_ARG_PLL}, {
1105 atom_op_sub, ATOM_ARG_MC}, {
1106 atom_op_setport, ATOM_PORT_ATI}, {
1107 atom_op_setport, ATOM_PORT_PCI}, {
1108 atom_op_setport, ATOM_PORT_SYSIO}, {
1109 atom_op_setregblock, 0}, {
1110 atom_op_setfbbase, 0}, {
1111 atom_op_compare, ATOM_ARG_REG}, {
1112 atom_op_compare, ATOM_ARG_PS}, {
1113 atom_op_compare, ATOM_ARG_WS}, {
1114 atom_op_compare, ATOM_ARG_FB}, {
1115 atom_op_compare, ATOM_ARG_PLL}, {
1116 atom_op_compare, ATOM_ARG_MC}, {
1117 atom_op_switch, 0}, {
1118 atom_op_jump, ATOM_COND_ALWAYS}, {
1119 atom_op_jump, ATOM_COND_EQUAL}, {
1120 atom_op_jump, ATOM_COND_BELOW}, {
1121 atom_op_jump, ATOM_COND_ABOVE}, {
1122 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1123 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1124 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1125 atom_op_test, ATOM_ARG_REG}, {
1126 atom_op_test, ATOM_ARG_PS}, {
1127 atom_op_test, ATOM_ARG_WS}, {
1128 atom_op_test, ATOM_ARG_FB}, {
1129 atom_op_test, ATOM_ARG_PLL}, {
1130 atom_op_test, ATOM_ARG_MC}, {
1131 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1132 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1133 atom_op_calltable, 0}, {
1134 atom_op_repeat, 0}, {
1135 atom_op_clear, ATOM_ARG_REG}, {
1136 atom_op_clear, ATOM_ARG_PS}, {
1137 atom_op_clear, ATOM_ARG_WS}, {
1138 atom_op_clear, ATOM_ARG_FB}, {
1139 atom_op_clear, ATOM_ARG_PLL}, {
1140 atom_op_clear, ATOM_ARG_MC}, {
1141 atom_op_nop, 0}, {
1142 atom_op_eot, 0}, {
1143 atom_op_mask, ATOM_ARG_REG}, {
1144 atom_op_mask, ATOM_ARG_PS}, {
1145 atom_op_mask, ATOM_ARG_WS}, {
1146 atom_op_mask, ATOM_ARG_FB}, {
1147 atom_op_mask, ATOM_ARG_PLL}, {
1148 atom_op_mask, ATOM_ARG_MC}, {
1149 atom_op_postcard, 0}, {
1150 atom_op_beep, 0}, {
1151 atom_op_savereg, 0}, {
1152 atom_op_restorereg, 0}, {
1153 atom_op_setdatablock, 0}, {
1154 atom_op_xor, ATOM_ARG_REG}, {
1155 atom_op_xor, ATOM_ARG_PS}, {
1156 atom_op_xor, ATOM_ARG_WS}, {
1157 atom_op_xor, ATOM_ARG_FB}, {
1158 atom_op_xor, ATOM_ARG_PLL}, {
1159 atom_op_xor, ATOM_ARG_MC}, {
1160 atom_op_shl, ATOM_ARG_REG}, {
1161 atom_op_shl, ATOM_ARG_PS}, {
1162 atom_op_shl, ATOM_ARG_WS}, {
1163 atom_op_shl, ATOM_ARG_FB}, {
1164 atom_op_shl, ATOM_ARG_PLL}, {
1165 atom_op_shl, ATOM_ARG_MC}, {
1166 atom_op_shr, ATOM_ARG_REG}, {
1167 atom_op_shr, ATOM_ARG_PS}, {
1168 atom_op_shr, ATOM_ARG_WS}, {
1169 atom_op_shr, ATOM_ARG_FB}, {
1170 atom_op_shr, ATOM_ARG_PLL}, {
1171 atom_op_shr, ATOM_ARG_MC}, {
1172 atom_op_debug, 0},};
1173
atom_execute_table_locked(struct atom_context * ctx,int index,uint32_t * params,int params_size)1174 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params, int params_size)
1175 {
1176 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1177 int len, ws, ps, ptr;
1178 unsigned char op;
1179 atom_exec_context ectx;
1180 int ret = 0;
1181
1182 if (!base)
1183 return -EINVAL;
1184
1185 len = CU16(base + ATOM_CT_SIZE_PTR);
1186 ws = CU8(base + ATOM_CT_WS_PTR);
1187 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1188 ptr = base + ATOM_CT_CODE_PTR;
1189
1190 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1191
1192 ectx.ctx = ctx;
1193 ectx.ps_shift = ps / 4;
1194 ectx.start = base;
1195 ectx.ps = params;
1196 ectx.ps_size = params_size;
1197 ectx.abort = false;
1198 ectx.last_jump = 0;
1199 if (ws) {
1200 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1201 ectx.ws_size = ws;
1202 } else {
1203 ectx.ws = NULL;
1204 ectx.ws_size = 0;
1205 }
1206
1207 debug_depth++;
1208 while (1) {
1209 op = CU8(ptr++);
1210 if (op < ATOM_OP_NAMES_CNT)
1211 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1212 else
1213 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1214 if (ectx.abort) {
1215 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1216 base, len, ws, ps, ptr - 1);
1217 ret = -EINVAL;
1218 goto free;
1219 }
1220
1221 if (op < ATOM_OP_CNT && op > 0)
1222 opcode_table[op].func(&ectx, &ptr,
1223 opcode_table[op].arg);
1224 else
1225 break;
1226
1227 if (op == ATOM_OP_EOT)
1228 break;
1229 }
1230 debug_depth--;
1231 SDEBUG("<<\n");
1232
1233 free:
1234 kfree(ectx.ws);
1235 return ret;
1236 }
1237
atom_execute_table_scratch_unlocked(struct atom_context * ctx,int index,uint32_t * params,int params_size)1238 int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t *params, int params_size)
1239 {
1240 int r;
1241
1242 mutex_lock(&ctx->mutex);
1243 /* reset data block */
1244 ctx->data_block = 0;
1245 /* reset reg block */
1246 ctx->reg_block = 0;
1247 /* reset fb window */
1248 ctx->fb_base = 0;
1249 /* reset io mode */
1250 ctx->io_mode = ATOM_IO_MM;
1251 /* reset divmul */
1252 ctx->divmul[0] = 0;
1253 ctx->divmul[1] = 0;
1254 r = atom_execute_table_locked(ctx, index, params, params_size);
1255 mutex_unlock(&ctx->mutex);
1256 return r;
1257 }
1258
atom_execute_table(struct atom_context * ctx,int index,uint32_t * params,int params_size)1259 int atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size)
1260 {
1261 int r;
1262 mutex_lock(&ctx->scratch_mutex);
1263 r = atom_execute_table_scratch_unlocked(ctx, index, params, params_size);
1264 mutex_unlock(&ctx->scratch_mutex);
1265 return r;
1266 }
1267
1268 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1269
atom_index_iio(struct atom_context * ctx,int base)1270 static void atom_index_iio(struct atom_context *ctx, int base)
1271 {
1272 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1273 if (!ctx->iio)
1274 return;
1275 while (CU8(base) == ATOM_IIO_START) {
1276 ctx->iio[CU8(base + 1)] = base + 2;
1277 base += 2;
1278 while (CU8(base) != ATOM_IIO_END)
1279 base += atom_iio_len[CU8(base)];
1280 base += 3;
1281 }
1282 }
1283
atom_parse(struct card_info * card,void * bios)1284 struct atom_context *atom_parse(struct card_info *card, void *bios)
1285 {
1286 int base;
1287 struct atom_context *ctx =
1288 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1289 char *str;
1290 char name[512];
1291 int i;
1292
1293 if (!ctx)
1294 return NULL;
1295
1296 ctx->card = card;
1297 ctx->bios = bios;
1298
1299 if (CU16(0) != ATOM_BIOS_MAGIC) {
1300 pr_info("Invalid BIOS magic\n");
1301 kfree(ctx);
1302 return NULL;
1303 }
1304 if (strncmp
1305 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1306 strlen(ATOM_ATI_MAGIC))) {
1307 pr_info("Invalid ATI magic\n");
1308 kfree(ctx);
1309 return NULL;
1310 }
1311
1312 base = CU16(ATOM_ROM_TABLE_PTR);
1313 if (strncmp
1314 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1315 strlen(ATOM_ROM_MAGIC))) {
1316 pr_info("Invalid ATOM magic\n");
1317 kfree(ctx);
1318 return NULL;
1319 }
1320
1321 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1322 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1323 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1324 if (!ctx->iio) {
1325 atom_destroy(ctx);
1326 return NULL;
1327 }
1328
1329 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1330 while (*str && ((*str == '\n') || (*str == '\r')))
1331 str++;
1332 /* name string isn't always 0 terminated */
1333 for (i = 0; i < 511; i++) {
1334 name[i] = str[i];
1335 if (name[i] < '.' || name[i] > 'z') {
1336 name[i] = 0;
1337 break;
1338 }
1339 }
1340 pr_info("ATOM BIOS: %s\n", name);
1341
1342 return ctx;
1343 }
1344
atom_asic_init(struct atom_context * ctx)1345 int atom_asic_init(struct atom_context *ctx)
1346 {
1347 struct radeon_device *rdev = ctx->card->dev->dev_private;
1348 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1349 uint32_t ps[16];
1350 int ret;
1351
1352 memset(ps, 0, 64);
1353
1354 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1355 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1356 if (!ps[0] || !ps[1])
1357 return 1;
1358
1359 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1360 return 1;
1361 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps, 16);
1362 if (ret)
1363 return ret;
1364
1365 memset(ps, 0, 64);
1366
1367 if (rdev->family < CHIP_R600) {
1368 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1369 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps, 16);
1370 }
1371 return ret;
1372 }
1373
atom_destroy(struct atom_context * ctx)1374 void atom_destroy(struct atom_context *ctx)
1375 {
1376 kfree(ctx->iio);
1377 kfree(ctx);
1378 }
1379
atom_parse_data_header(struct atom_context * ctx,int index,uint16_t * size,uint8_t * frev,uint8_t * crev,uint16_t * data_start)1380 bool atom_parse_data_header(struct atom_context *ctx, int index,
1381 uint16_t *size, uint8_t *frev, uint8_t *crev,
1382 uint16_t *data_start)
1383 {
1384 int offset = index * 2 + 4;
1385 int idx = CU16(ctx->data_table + offset);
1386 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1387
1388 if (!mdt[index])
1389 return false;
1390
1391 if (size)
1392 *size = CU16(idx);
1393 if (frev)
1394 *frev = CU8(idx + 2);
1395 if (crev)
1396 *crev = CU8(idx + 3);
1397 *data_start = idx;
1398 return true;
1399 }
1400
atom_parse_cmd_header(struct atom_context * ctx,int index,uint8_t * frev,uint8_t * crev)1401 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t *frev,
1402 uint8_t *crev)
1403 {
1404 int offset = index * 2 + 4;
1405 int idx = CU16(ctx->cmd_table + offset);
1406 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1407
1408 if (!mct[index])
1409 return false;
1410
1411 if (frev)
1412 *frev = CU8(idx + 2);
1413 if (crev)
1414 *crev = CU8(idx + 3);
1415 return true;
1416 }
1417
atom_allocate_fb_scratch(struct atom_context * ctx)1418 int atom_allocate_fb_scratch(struct atom_context *ctx)
1419 {
1420 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1421 uint16_t data_offset;
1422 int usage_bytes = 0;
1423 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1424
1425 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1426 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1427
1428 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1429 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1430 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1431
1432 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1433 }
1434 ctx->scratch_size_bytes = 0;
1435 if (usage_bytes == 0)
1436 usage_bytes = 20 * 1024;
1437 /* allocate some scratch memory */
1438 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1439 if (!ctx->scratch)
1440 return -ENOMEM;
1441 ctx->scratch_size_bytes = usage_bytes;
1442 return 0;
1443 }
1444