1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <asm/unaligned.h>
28
29 #define ATOM_DEBUG
30
31 #include "atom.h"
32 #include "atom-names.h"
33 #include "atom-bits.h"
34 #include "radeon.h"
35 #include <linux/delay.h>
36
37 #define ATOM_COND_ABOVE 0
38 #define ATOM_COND_ABOVEOREQUAL 1
39 #define ATOM_COND_ALWAYS 2
40 #define ATOM_COND_BELOW 3
41 #define ATOM_COND_BELOWOREQUAL 4
42 #define ATOM_COND_EQUAL 5
43 #define ATOM_COND_NOTEQUAL 6
44
45 #define ATOM_PORT_ATI 0
46 #define ATOM_PORT_PCI 1
47 #define ATOM_PORT_SYSIO 2
48
49 #define ATOM_UNIT_MICROSEC 0
50 #define ATOM_UNIT_MILLISEC 1
51
52 #define PLL_INDEX 2
53 #define PLL_DATA 3
54
55 typedef struct {
56 struct atom_context *ctx;
57 uint32_t *ps, *ws;
58 int ps_shift;
59 uint16_t start;
60 unsigned last_jump;
61 unsigned long last_jump_jiffies;
62 bool abort;
63 } atom_exec_context;
64
65 int atom_debug = 0;
66 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
67
68 static uint32_t atom_arg_mask[8] = {
69 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
70 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
71 };
72 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
73
74 static int atom_dst_to_src[8][4] = {
75 /* translate destination alignment field to the source alignment encoding */
76 {0, 0, 0, 0},
77 {1, 2, 3, 0},
78 {1, 2, 3, 0},
79 {1, 2, 3, 0},
80 {4, 5, 6, 7},
81 {4, 5, 6, 7},
82 {4, 5, 6, 7},
83 {4, 5, 6, 7},
84 };
85 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
86
87 static int debug_depth = 0;
88 #ifdef ATOM_DEBUG
debug_print_spaces(int n)89 static void debug_print_spaces(int n)
90 {
91 while (n--)
92 kprintf(" ");
93 }
94
95 #define ATOM_DEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0)
96 #define ATOM_SDEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0)
97 #else
98 #define ATOM_DEBUG_PRINT(...) do { } while (0)
99 #define ATOM_SDEBUG_PRINT(...) do { } while (0)
100 #endif
101
atom_iio_execute(struct atom_context * ctx,int base,uint32_t index,uint32_t data)102 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
103 uint32_t index, uint32_t data)
104 {
105 struct radeon_device *rdev = ctx->card->dev->dev_private;
106 uint32_t temp = 0xCDCDCDCD;
107
108 while (1)
109 switch (CU8(base)) {
110 case ATOM_IIO_NOP:
111 base++;
112 break;
113 case ATOM_IIO_READ:
114 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
115 base += 3;
116 break;
117 case ATOM_IIO_WRITE:
118 if (rdev->family == CHIP_RV515)
119 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
120 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
121 base += 3;
122 break;
123 case ATOM_IIO_CLEAR:
124 temp &=
125 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
126 CU8(base + 2));
127 base += 3;
128 break;
129 case ATOM_IIO_SET:
130 temp |=
131 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
132 2);
133 base += 3;
134 break;
135 case ATOM_IIO_MOVE_INDEX:
136 temp &=
137 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
138 CU8(base + 3));
139 temp |=
140 ((index >> CU8(base + 2)) &
141 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
142 3);
143 base += 4;
144 break;
145 case ATOM_IIO_MOVE_DATA:
146 temp &=
147 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
148 CU8(base + 3));
149 temp |=
150 ((data >> CU8(base + 2)) &
151 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
152 3);
153 base += 4;
154 break;
155 case ATOM_IIO_MOVE_ATTR:
156 temp &=
157 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
158 CU8(base + 3));
159 temp |=
160 ((ctx->
161 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
162 CU8
163 (base
164 +
165 1))))
166 << CU8(base + 3);
167 base += 4;
168 break;
169 case ATOM_IIO_END:
170 return temp;
171 default:
172 DRM_INFO("Unknown IIO opcode.\n");
173 return 0;
174 }
175 }
176
atom_get_src_int(atom_exec_context * ctx,uint8_t attr,int * ptr,uint32_t * saved,int print)177 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
178 int *ptr, uint32_t *saved, int print)
179 {
180 uint32_t idx, val = 0xCDCDCDCD, align, arg;
181 struct atom_context *gctx = ctx->ctx;
182 arg = attr & 7;
183 align = (attr >> 3) & 7;
184
185 if (saved)
186 *saved = 0; /* avoid bogus gcc warning */
187
188 switch (arg) {
189 case ATOM_ARG_REG:
190 idx = U16(*ptr);
191 (*ptr) += 2;
192 if (print)
193 ATOM_DEBUG_PRINT("REG[0x%04X]", idx);
194 idx += gctx->reg_block;
195 switch (gctx->io_mode) {
196 case ATOM_IO_MM:
197 val = gctx->card->reg_read(gctx->card, idx);
198 break;
199 case ATOM_IO_PCI:
200 DRM_INFO(
201 "PCI registers are not implemented.\n");
202 return 0;
203 case ATOM_IO_SYSIO:
204 DRM_INFO(
205 "SYSIO registers are not implemented.\n");
206 return 0;
207 default:
208 if (!(gctx->io_mode & 0x80)) {
209 DRM_INFO("Bad IO mode.\n");
210 return 0;
211 }
212 if (!gctx->iio[gctx->io_mode & 0x7F]) {
213 DRM_INFO(
214 "Undefined indirect IO read method %d.\n",
215 gctx->io_mode & 0x7F);
216 return 0;
217 }
218 val =
219 atom_iio_execute(gctx,
220 gctx->iio[gctx->io_mode & 0x7F],
221 idx, 0);
222 }
223 break;
224 case ATOM_ARG_PS:
225 idx = U8(*ptr);
226 (*ptr)++;
227 /* get_unaligned_le32 avoids unaligned accesses from atombios
228 * tables, noticed on a DEC Alpha. */
229 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
230 if (print)
231 ATOM_DEBUG_PRINT("PS[0x%02X,0x%04X]", idx, val);
232 break;
233 case ATOM_ARG_WS:
234 idx = U8(*ptr);
235 (*ptr)++;
236 if (print)
237 ATOM_DEBUG_PRINT("WS[0x%02X]", idx);
238 switch (idx) {
239 case ATOM_WS_QUOTIENT:
240 val = gctx->divmul[0];
241 break;
242 case ATOM_WS_REMAINDER:
243 val = gctx->divmul[1];
244 break;
245 case ATOM_WS_DATAPTR:
246 val = gctx->data_block;
247 break;
248 case ATOM_WS_SHIFT:
249 val = gctx->shift;
250 break;
251 case ATOM_WS_OR_MASK:
252 val = 1 << gctx->shift;
253 break;
254 case ATOM_WS_AND_MASK:
255 val = ~(1 << gctx->shift);
256 break;
257 case ATOM_WS_FB_WINDOW:
258 val = gctx->fb_base;
259 break;
260 case ATOM_WS_ATTRIBUTES:
261 val = gctx->io_attr;
262 break;
263 case ATOM_WS_REGPTR:
264 val = gctx->reg_block;
265 break;
266 default:
267 val = ctx->ws[idx];
268 }
269 break;
270 case ATOM_ARG_ID:
271 idx = U16(*ptr);
272 (*ptr) += 2;
273 if (print) {
274 if (gctx->data_block)
275 ATOM_DEBUG_PRINT("ID[0x%04X+%04X]", idx, gctx->data_block);
276 else
277 ATOM_DEBUG_PRINT("ID[0x%04X]", idx);
278 }
279 val = U32(idx + gctx->data_block);
280 break;
281 case ATOM_ARG_FB:
282 idx = U8(*ptr);
283 (*ptr)++;
284 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
285 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
286 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
287 val = 0;
288 } else
289 val = gctx->scratch[(gctx->fb_base / 4) + idx];
290 if (print)
291 ATOM_DEBUG_PRINT("FB[0x%02X]", idx);
292 break;
293 case ATOM_ARG_IMM:
294 switch (align) {
295 case ATOM_SRC_DWORD:
296 val = U32(*ptr);
297 (*ptr) += 4;
298 if (print)
299 ATOM_DEBUG_PRINT("IMM 0x%08X\n", val);
300 return val;
301 case ATOM_SRC_WORD0:
302 case ATOM_SRC_WORD8:
303 case ATOM_SRC_WORD16:
304 val = U16(*ptr);
305 (*ptr) += 2;
306 if (print)
307 ATOM_DEBUG_PRINT("IMM 0x%04X\n", val);
308 return val;
309 case ATOM_SRC_BYTE0:
310 case ATOM_SRC_BYTE8:
311 case ATOM_SRC_BYTE16:
312 case ATOM_SRC_BYTE24:
313 val = U8(*ptr);
314 (*ptr)++;
315 if (print)
316 ATOM_DEBUG_PRINT("IMM 0x%02X\n", val);
317 return val;
318 }
319 return 0;
320 case ATOM_ARG_PLL:
321 idx = U8(*ptr);
322 (*ptr)++;
323 if (print)
324 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx);
325 val = gctx->card->pll_read(gctx->card, idx);
326 break;
327 case ATOM_ARG_MC:
328 idx = U8(*ptr);
329 (*ptr)++;
330 if (print)
331 ATOM_DEBUG_PRINT("MC[0x%02X]", idx);
332 val = gctx->card->mc_read(gctx->card, idx);
333 break;
334 }
335 if (saved)
336 *saved = val;
337 val &= atom_arg_mask[align];
338 val >>= atom_arg_shift[align];
339 if (print)
340 switch (align) {
341 case ATOM_SRC_DWORD:
342 ATOM_DEBUG_PRINT(".[31:0] -> 0x%08X\n", val);
343 break;
344 case ATOM_SRC_WORD0:
345 ATOM_DEBUG_PRINT(".[15:0] -> 0x%04X\n", val);
346 break;
347 case ATOM_SRC_WORD8:
348 ATOM_DEBUG_PRINT(".[23:8] -> 0x%04X\n", val);
349 break;
350 case ATOM_SRC_WORD16:
351 ATOM_DEBUG_PRINT(".[31:16] -> 0x%04X\n", val);
352 break;
353 case ATOM_SRC_BYTE0:
354 ATOM_DEBUG_PRINT(".[7:0] -> 0x%02X\n", val);
355 break;
356 case ATOM_SRC_BYTE8:
357 ATOM_DEBUG_PRINT(".[15:8] -> 0x%02X\n", val);
358 break;
359 case ATOM_SRC_BYTE16:
360 ATOM_DEBUG_PRINT(".[23:16] -> 0x%02X\n", val);
361 break;
362 case ATOM_SRC_BYTE24:
363 ATOM_DEBUG_PRINT(".[31:24] -> 0x%02X\n", val);
364 break;
365 }
366 return val;
367 }
368
atom_skip_src_int(atom_exec_context * ctx,uint8_t attr,int * ptr)369 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
370 {
371 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
372 switch (arg) {
373 case ATOM_ARG_REG:
374 case ATOM_ARG_ID:
375 (*ptr) += 2;
376 break;
377 case ATOM_ARG_PLL:
378 case ATOM_ARG_MC:
379 case ATOM_ARG_PS:
380 case ATOM_ARG_WS:
381 case ATOM_ARG_FB:
382 (*ptr)++;
383 break;
384 case ATOM_ARG_IMM:
385 switch (align) {
386 case ATOM_SRC_DWORD:
387 (*ptr) += 4;
388 return;
389 case ATOM_SRC_WORD0:
390 case ATOM_SRC_WORD8:
391 case ATOM_SRC_WORD16:
392 (*ptr) += 2;
393 return;
394 case ATOM_SRC_BYTE0:
395 case ATOM_SRC_BYTE8:
396 case ATOM_SRC_BYTE16:
397 case ATOM_SRC_BYTE24:
398 (*ptr)++;
399 return;
400 }
401 return;
402 }
403 }
404
atom_get_src(atom_exec_context * ctx,uint8_t attr,int * ptr)405 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
406 {
407 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
408 }
409
atom_get_src_direct(atom_exec_context * ctx,uint8_t align,int * ptr)410 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
411 {
412 uint32_t val = 0xCDCDCDCD;
413
414 switch (align) {
415 case ATOM_SRC_DWORD:
416 val = U32(*ptr);
417 (*ptr) += 4;
418 break;
419 case ATOM_SRC_WORD0:
420 case ATOM_SRC_WORD8:
421 case ATOM_SRC_WORD16:
422 val = U16(*ptr);
423 (*ptr) += 2;
424 break;
425 case ATOM_SRC_BYTE0:
426 case ATOM_SRC_BYTE8:
427 case ATOM_SRC_BYTE16:
428 case ATOM_SRC_BYTE24:
429 val = U8(*ptr);
430 (*ptr)++;
431 break;
432 }
433 return val;
434 }
435
atom_get_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr,uint32_t * saved,int print)436 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
437 int *ptr, uint32_t *saved, int print)
438 {
439 return atom_get_src_int(ctx,
440 arg | atom_dst_to_src[(attr >> 3) &
441 7][(attr >> 6) & 3] << 3,
442 ptr, saved, print);
443 }
444
atom_skip_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr)445 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
446 {
447 atom_skip_src_int(ctx,
448 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
449 3] << 3, ptr);
450 }
451
atom_put_dst(atom_exec_context * ctx,int arg,uint8_t attr,int * ptr,uint32_t val,uint32_t saved)452 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
453 int *ptr, uint32_t val, uint32_t saved)
454 {
455 uint32_t align =
456 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
457 val, idx;
458 struct atom_context *gctx = ctx->ctx;
459 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
460 val <<= atom_arg_shift[align];
461 val &= atom_arg_mask[align];
462 saved &= ~atom_arg_mask[align];
463 val |= saved;
464 switch (arg) {
465 case ATOM_ARG_REG:
466 idx = U16(*ptr);
467 (*ptr) += 2;
468 ATOM_DEBUG_PRINT("REG[0x%04X]", idx);
469 idx += gctx->reg_block;
470 switch (gctx->io_mode) {
471 case ATOM_IO_MM:
472 if (idx == 0)
473 gctx->card->reg_write(gctx->card, idx,
474 val << 2);
475 else
476 gctx->card->reg_write(gctx->card, idx, val);
477 break;
478 case ATOM_IO_PCI:
479 DRM_INFO(
480 "PCI registers are not implemented.\n");
481 return;
482 case ATOM_IO_SYSIO:
483 DRM_INFO(
484 "SYSIO registers are not implemented.\n");
485 return;
486 default:
487 if (!(gctx->io_mode & 0x80)) {
488 DRM_INFO("Bad IO mode.\n");
489 return;
490 }
491 if (!gctx->iio[gctx->io_mode & 0xFF]) {
492 DRM_INFO(
493 "Undefined indirect IO write method %d.\n",
494 gctx->io_mode & 0x7F);
495 return;
496 }
497 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
498 idx, val);
499 }
500 break;
501 case ATOM_ARG_PS:
502 idx = U8(*ptr);
503 (*ptr)++;
504 ATOM_DEBUG_PRINT("PS[0x%02X]", idx);
505 ctx->ps[idx] = cpu_to_le32(val);
506 break;
507 case ATOM_ARG_WS:
508 idx = U8(*ptr);
509 (*ptr)++;
510 ATOM_DEBUG_PRINT("WS[0x%02X]", idx);
511 switch (idx) {
512 case ATOM_WS_QUOTIENT:
513 gctx->divmul[0] = val;
514 break;
515 case ATOM_WS_REMAINDER:
516 gctx->divmul[1] = val;
517 break;
518 case ATOM_WS_DATAPTR:
519 gctx->data_block = val;
520 break;
521 case ATOM_WS_SHIFT:
522 gctx->shift = val;
523 break;
524 case ATOM_WS_OR_MASK:
525 case ATOM_WS_AND_MASK:
526 break;
527 case ATOM_WS_FB_WINDOW:
528 gctx->fb_base = val;
529 break;
530 case ATOM_WS_ATTRIBUTES:
531 gctx->io_attr = val;
532 break;
533 case ATOM_WS_REGPTR:
534 gctx->reg_block = val;
535 break;
536 default:
537 ctx->ws[idx] = val;
538 }
539 break;
540 case ATOM_ARG_FB:
541 idx = U8(*ptr);
542 (*ptr)++;
543 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
544 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
545 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
546 } else
547 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
548 ATOM_DEBUG_PRINT("FB[0x%02X]", idx);
549 break;
550 case ATOM_ARG_PLL:
551 idx = U8(*ptr);
552 (*ptr)++;
553 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx);
554 gctx->card->pll_write(gctx->card, idx, val);
555 break;
556 case ATOM_ARG_MC:
557 idx = U8(*ptr);
558 (*ptr)++;
559 ATOM_DEBUG_PRINT("MC[0x%02X]", idx);
560 gctx->card->mc_write(gctx->card, idx, val);
561 return;
562 }
563 switch (align) {
564 case ATOM_SRC_DWORD:
565 ATOM_DEBUG_PRINT(".[31:0] <- 0x%08X\n", old_val);
566 break;
567 case ATOM_SRC_WORD0:
568 ATOM_DEBUG_PRINT(".[15:0] <- 0x%04X\n", old_val);
569 break;
570 case ATOM_SRC_WORD8:
571 ATOM_DEBUG_PRINT(".[23:8] <- 0x%04X\n", old_val);
572 break;
573 case ATOM_SRC_WORD16:
574 ATOM_DEBUG_PRINT(".[31:16] <- 0x%04X\n", old_val);
575 break;
576 case ATOM_SRC_BYTE0:
577 ATOM_DEBUG_PRINT(".[7:0] <- 0x%02X\n", old_val);
578 break;
579 case ATOM_SRC_BYTE8:
580 ATOM_DEBUG_PRINT(".[15:8] <- 0x%02X\n", old_val);
581 break;
582 case ATOM_SRC_BYTE16:
583 ATOM_DEBUG_PRINT(".[23:16] <- 0x%02X\n", old_val);
584 break;
585 case ATOM_SRC_BYTE24:
586 ATOM_DEBUG_PRINT(".[31:24] <- 0x%02X\n", old_val);
587 break;
588 }
589 }
590
atom_op_add(atom_exec_context * ctx,int * ptr,int arg)591 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
592 {
593 uint8_t attr = U8((*ptr)++);
594 uint32_t dst, src, saved;
595 int dptr = *ptr;
596 ATOM_SDEBUG_PRINT(" dst: ");
597 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
598 ATOM_SDEBUG_PRINT(" src: ");
599 src = atom_get_src(ctx, attr, ptr);
600 dst += src;
601 ATOM_SDEBUG_PRINT(" dst: ");
602 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
603 }
604
atom_op_and(atom_exec_context * ctx,int * ptr,int arg)605 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
606 {
607 uint8_t attr = U8((*ptr)++);
608 uint32_t dst, src, saved;
609 int dptr = *ptr;
610 ATOM_SDEBUG_PRINT(" dst: ");
611 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
612 ATOM_SDEBUG_PRINT(" src: ");
613 src = atom_get_src(ctx, attr, ptr);
614 dst &= src;
615 ATOM_SDEBUG_PRINT(" dst: ");
616 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
617 }
618
atom_op_beep(atom_exec_context * ctx,int * ptr,int arg)619 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
620 {
621 DRM_INFO("ATOM BIOS beeped!\n");
622 }
623
atom_op_calltable(atom_exec_context * ctx,int * ptr,int arg)624 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
625 {
626 int idx = U8((*ptr)++);
627 int r = 0;
628
629 if (idx < ATOM_TABLE_NAMES_CNT)
630 ATOM_SDEBUG_PRINT(" table: %d (%s)\n", idx, atom_table_names[idx]);
631 else
632 ATOM_SDEBUG_PRINT(" table: %d\n", idx);
633 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
634 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
635 if (r) {
636 ctx->abort = true;
637 }
638 }
639
atom_op_clear(atom_exec_context * ctx,int * ptr,int arg)640 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
641 {
642 uint8_t attr = U8((*ptr)++);
643 uint32_t saved;
644 int dptr = *ptr;
645 attr &= 0x38;
646 attr |= atom_def_dst[attr >> 3] << 6;
647 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
648 ATOM_SDEBUG_PRINT(" dst: ");
649 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
650 }
651
atom_op_compare(atom_exec_context * ctx,int * ptr,int arg)652 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
653 {
654 uint8_t attr = U8((*ptr)++);
655 uint32_t dst, src;
656 ATOM_SDEBUG_PRINT(" src1: ");
657 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
658 ATOM_SDEBUG_PRINT(" src2: ");
659 src = atom_get_src(ctx, attr, ptr);
660 ctx->ctx->cs_equal = (dst == src);
661 ctx->ctx->cs_above = (dst > src);
662 ATOM_SDEBUG_PRINT(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
663 ctx->ctx->cs_above ? "GT" : "LE");
664 }
665
atom_op_delay(atom_exec_context * ctx,int * ptr,int arg)666 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
667 {
668 unsigned count = U8((*ptr)++);
669 ATOM_SDEBUG_PRINT(" count: %d\n", count);
670 if (arg == ATOM_UNIT_MICROSEC)
671 udelay(count);
672 else if (!drm_can_sleep())
673 mdelay(count);
674 else
675 msleep(count);
676 }
677
atom_op_div(atom_exec_context * ctx,int * ptr,int arg)678 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
679 {
680 uint8_t attr = U8((*ptr)++);
681 uint32_t dst, src;
682 ATOM_SDEBUG_PRINT(" src1: ");
683 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
684 ATOM_SDEBUG_PRINT(" src2: ");
685 src = atom_get_src(ctx, attr, ptr);
686 if (src != 0) {
687 ctx->ctx->divmul[0] = dst / src;
688 ctx->ctx->divmul[1] = dst % src;
689 } else {
690 ctx->ctx->divmul[0] = 0;
691 ctx->ctx->divmul[1] = 0;
692 }
693 }
694
atom_op_eot(atom_exec_context * ctx,int * ptr,int arg)695 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
696 {
697 /* functionally, a nop */
698 }
699
atom_op_jump(atom_exec_context * ctx,int * ptr,int arg)700 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
701 {
702 int execute = 0, target = U16(*ptr);
703 unsigned long cjiffies;
704
705 (*ptr) += 2;
706 switch (arg) {
707 case ATOM_COND_ABOVE:
708 execute = ctx->ctx->cs_above;
709 break;
710 case ATOM_COND_ABOVEOREQUAL:
711 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
712 break;
713 case ATOM_COND_ALWAYS:
714 execute = 1;
715 break;
716 case ATOM_COND_BELOW:
717 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
718 break;
719 case ATOM_COND_BELOWOREQUAL:
720 execute = !ctx->ctx->cs_above;
721 break;
722 case ATOM_COND_EQUAL:
723 execute = ctx->ctx->cs_equal;
724 break;
725 case ATOM_COND_NOTEQUAL:
726 execute = !ctx->ctx->cs_equal;
727 break;
728 }
729 if (arg != ATOM_COND_ALWAYS)
730 ATOM_SDEBUG_PRINT(" taken: %s\n", execute ? "yes" : "no");
731 ATOM_SDEBUG_PRINT(" target: 0x%04X\n", target);
732 if (execute) {
733 if (ctx->last_jump == (ctx->start + target)) {
734 cjiffies = jiffies;
735 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
736 cjiffies -= ctx->last_jump_jiffies;
737 if ((jiffies_to_msecs(cjiffies) > 5000)) {
738 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
739 ctx->abort = true;
740 }
741 } else {
742 /* jiffies wrap around we will just wait a little longer */
743 ctx->last_jump_jiffies = jiffies;
744 }
745 } else {
746 ctx->last_jump = ctx->start + target;
747 ctx->last_jump_jiffies = jiffies;
748 }
749 *ptr = ctx->start + target;
750 }
751 }
752
atom_op_mask(atom_exec_context * ctx,int * ptr,int arg)753 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
754 {
755 uint8_t attr = U8((*ptr)++);
756 uint32_t dst, mask, src, saved;
757 int dptr = *ptr;
758 ATOM_SDEBUG_PRINT(" dst: ");
759 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
760 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
761 ATOM_SDEBUG_PRINT(" mask: 0x%08x", mask);
762 ATOM_SDEBUG_PRINT(" src: ");
763 src = atom_get_src(ctx, attr, ptr);
764 dst &= mask;
765 dst |= src;
766 ATOM_SDEBUG_PRINT(" dst: ");
767 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
768 }
769
atom_op_move(atom_exec_context * ctx,int * ptr,int arg)770 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
771 {
772 uint8_t attr = U8((*ptr)++);
773 uint32_t src, saved;
774 int dptr = *ptr;
775 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
776 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
777 else {
778 atom_skip_dst(ctx, arg, attr, ptr);
779 saved = 0xCDCDCDCD;
780 }
781 ATOM_SDEBUG_PRINT(" src: ");
782 src = atom_get_src(ctx, attr, ptr);
783 ATOM_SDEBUG_PRINT(" dst: ");
784 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
785 }
786
atom_op_mul(atom_exec_context * ctx,int * ptr,int arg)787 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
788 {
789 uint8_t attr = U8((*ptr)++);
790 uint32_t dst, src;
791 ATOM_SDEBUG_PRINT(" src1: ");
792 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
793 ATOM_SDEBUG_PRINT(" src2: ");
794 src = atom_get_src(ctx, attr, ptr);
795 ctx->ctx->divmul[0] = dst * src;
796 }
797
atom_op_nop(atom_exec_context * ctx,int * ptr,int arg)798 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
799 {
800 /* nothing */
801 }
802
atom_op_or(atom_exec_context * ctx,int * ptr,int arg)803 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
804 {
805 uint8_t attr = U8((*ptr)++);
806 uint32_t dst, src, saved;
807 int dptr = *ptr;
808 ATOM_SDEBUG_PRINT(" dst: ");
809 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
810 ATOM_SDEBUG_PRINT(" src: ");
811 src = atom_get_src(ctx, attr, ptr);
812 dst |= src;
813 ATOM_SDEBUG_PRINT(" dst: ");
814 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
815 }
816
atom_op_postcard(atom_exec_context * ctx,int * ptr,int arg)817 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
818 {
819 uint8_t val = U8((*ptr)++);
820 ATOM_SDEBUG_PRINT("POST card output: 0x%02X\n", val);
821 }
822
atom_op_repeat(atom_exec_context * ctx,int * ptr,int arg)823 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
824 {
825 DRM_INFO("unimplemented!\n");
826 }
827
atom_op_restorereg(atom_exec_context * ctx,int * ptr,int arg)828 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
829 {
830 DRM_INFO("unimplemented!\n");
831 }
832
atom_op_savereg(atom_exec_context * ctx,int * ptr,int arg)833 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
834 {
835 DRM_INFO("unimplemented!\n");
836 }
837
atom_op_setdatablock(atom_exec_context * ctx,int * ptr,int arg)838 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
839 {
840 int idx = U8(*ptr);
841 (*ptr)++;
842 ATOM_SDEBUG_PRINT(" block: %d\n", idx);
843 if (!idx)
844 ctx->ctx->data_block = 0;
845 else if (idx == 255)
846 ctx->ctx->data_block = ctx->start;
847 else
848 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
849 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->data_block);
850 }
851
atom_op_setfbbase(atom_exec_context * ctx,int * ptr,int arg)852 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
853 {
854 uint8_t attr = U8((*ptr)++);
855 ATOM_SDEBUG_PRINT(" fb_base: ");
856 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
857 }
858
atom_op_setport(atom_exec_context * ctx,int * ptr,int arg)859 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
860 {
861 int port;
862 switch (arg) {
863 case ATOM_PORT_ATI:
864 port = U16(*ptr);
865 if (port < ATOM_IO_NAMES_CNT)
866 ATOM_SDEBUG_PRINT(" port: %d (%s)\n", port, atom_io_names[port]);
867 else
868 ATOM_SDEBUG_PRINT(" port: %d\n", port);
869 if (!port)
870 ctx->ctx->io_mode = ATOM_IO_MM;
871 else
872 ctx->ctx->io_mode = ATOM_IO_IIO | port;
873 (*ptr) += 2;
874 break;
875 case ATOM_PORT_PCI:
876 ctx->ctx->io_mode = ATOM_IO_PCI;
877 (*ptr)++;
878 break;
879 case ATOM_PORT_SYSIO:
880 ctx->ctx->io_mode = ATOM_IO_SYSIO;
881 (*ptr)++;
882 break;
883 }
884 }
885
atom_op_setregblock(atom_exec_context * ctx,int * ptr,int arg)886 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
887 {
888 ctx->ctx->reg_block = U16(*ptr);
889 (*ptr) += 2;
890 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->reg_block);
891 }
892
atom_op_shift_left(atom_exec_context * ctx,int * ptr,int arg)893 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
894 {
895 uint8_t attr = U8((*ptr)++), shift;
896 uint32_t saved, dst;
897 int dptr = *ptr;
898 attr &= 0x38;
899 attr |= atom_def_dst[attr >> 3] << 6;
900 ATOM_SDEBUG_PRINT(" dst: ");
901 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
902 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
903 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
904 dst <<= shift;
905 ATOM_SDEBUG_PRINT(" dst: ");
906 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
907 }
908
atom_op_shift_right(atom_exec_context * ctx,int * ptr,int arg)909 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
910 {
911 uint8_t attr = U8((*ptr)++), shift;
912 uint32_t saved, dst;
913 int dptr = *ptr;
914 attr &= 0x38;
915 attr |= atom_def_dst[attr >> 3] << 6;
916 ATOM_SDEBUG_PRINT(" dst: ");
917 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
918 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
919 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
920 dst >>= shift;
921 ATOM_SDEBUG_PRINT(" dst: ");
922 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
923 }
924
atom_op_shl(atom_exec_context * ctx,int * ptr,int arg)925 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
926 {
927 uint8_t attr = U8((*ptr)++), shift;
928 uint32_t saved, dst;
929 int dptr = *ptr;
930 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
931 ATOM_SDEBUG_PRINT(" dst: ");
932 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
933 /* op needs to full dst value */
934 dst = saved;
935 shift = atom_get_src(ctx, attr, ptr);
936 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
937 dst <<= shift;
938 dst &= atom_arg_mask[dst_align];
939 dst >>= atom_arg_shift[dst_align];
940 ATOM_SDEBUG_PRINT(" dst: ");
941 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
942 }
943
atom_op_shr(atom_exec_context * ctx,int * ptr,int arg)944 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
945 {
946 uint8_t attr = U8((*ptr)++), shift;
947 uint32_t saved, dst;
948 int dptr = *ptr;
949 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
950 ATOM_SDEBUG_PRINT(" dst: ");
951 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
952 /* op needs to full dst value */
953 dst = saved;
954 shift = atom_get_src(ctx, attr, ptr);
955 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
956 dst >>= shift;
957 dst &= atom_arg_mask[dst_align];
958 dst >>= atom_arg_shift[dst_align];
959 ATOM_SDEBUG_PRINT(" dst: ");
960 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
961 }
962
atom_op_sub(atom_exec_context * ctx,int * ptr,int arg)963 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
964 {
965 uint8_t attr = U8((*ptr)++);
966 uint32_t dst, src, saved;
967 int dptr = *ptr;
968 ATOM_SDEBUG_PRINT(" dst: ");
969 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
970 ATOM_SDEBUG_PRINT(" src: ");
971 src = atom_get_src(ctx, attr, ptr);
972 dst -= src;
973 ATOM_SDEBUG_PRINT(" dst: ");
974 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
975 }
976
atom_op_switch(atom_exec_context * ctx,int * ptr,int arg)977 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
978 {
979 uint8_t attr = U8((*ptr)++);
980 uint32_t src, val, target;
981 ATOM_SDEBUG_PRINT(" switch: ");
982 src = atom_get_src(ctx, attr, ptr);
983 while (U16(*ptr) != ATOM_CASE_END)
984 if (U8(*ptr) == ATOM_CASE_MAGIC) {
985 (*ptr)++;
986 ATOM_SDEBUG_PRINT(" case: ");
987 val =
988 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
989 ptr);
990 target = U16(*ptr);
991 if (val == src) {
992 ATOM_SDEBUG_PRINT(" target: %04X\n", target);
993 *ptr = ctx->start + target;
994 return;
995 }
996 (*ptr) += 2;
997 } else {
998 DRM_INFO("Bad case.\n");
999 return;
1000 }
1001 (*ptr) += 2;
1002 }
1003
atom_op_test(atom_exec_context * ctx,int * ptr,int arg)1004 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1005 {
1006 uint8_t attr = U8((*ptr)++);
1007 uint32_t dst, src;
1008 ATOM_SDEBUG_PRINT(" src1: ");
1009 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1010 ATOM_SDEBUG_PRINT(" src2: ");
1011 src = atom_get_src(ctx, attr, ptr);
1012 ctx->ctx->cs_equal = ((dst & src) == 0);
1013 ATOM_SDEBUG_PRINT(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1014 }
1015
atom_op_xor(atom_exec_context * ctx,int * ptr,int arg)1016 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1017 {
1018 uint8_t attr = U8((*ptr)++);
1019 uint32_t dst, src, saved;
1020 int dptr = *ptr;
1021 ATOM_SDEBUG_PRINT(" dst: ");
1022 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1023 ATOM_SDEBUG_PRINT(" src: ");
1024 src = atom_get_src(ctx, attr, ptr);
1025 dst ^= src;
1026 ATOM_SDEBUG_PRINT(" dst: ");
1027 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1028 }
1029
atom_op_debug(atom_exec_context * ctx,int * ptr,int arg)1030 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1031 {
1032 DRM_INFO("unimplemented!\n");
1033 }
1034
1035 static struct {
1036 void (*func) (atom_exec_context *, int *, int);
1037 int arg;
1038 } opcode_table[ATOM_OP_CNT] = {
1039 {
1040 NULL, 0}, {
1041 atom_op_move, ATOM_ARG_REG}, {
1042 atom_op_move, ATOM_ARG_PS}, {
1043 atom_op_move, ATOM_ARG_WS}, {
1044 atom_op_move, ATOM_ARG_FB}, {
1045 atom_op_move, ATOM_ARG_PLL}, {
1046 atom_op_move, ATOM_ARG_MC}, {
1047 atom_op_and, ATOM_ARG_REG}, {
1048 atom_op_and, ATOM_ARG_PS}, {
1049 atom_op_and, ATOM_ARG_WS}, {
1050 atom_op_and, ATOM_ARG_FB}, {
1051 atom_op_and, ATOM_ARG_PLL}, {
1052 atom_op_and, ATOM_ARG_MC}, {
1053 atom_op_or, ATOM_ARG_REG}, {
1054 atom_op_or, ATOM_ARG_PS}, {
1055 atom_op_or, ATOM_ARG_WS}, {
1056 atom_op_or, ATOM_ARG_FB}, {
1057 atom_op_or, ATOM_ARG_PLL}, {
1058 atom_op_or, ATOM_ARG_MC}, {
1059 atom_op_shift_left, ATOM_ARG_REG}, {
1060 atom_op_shift_left, ATOM_ARG_PS}, {
1061 atom_op_shift_left, ATOM_ARG_WS}, {
1062 atom_op_shift_left, ATOM_ARG_FB}, {
1063 atom_op_shift_left, ATOM_ARG_PLL}, {
1064 atom_op_shift_left, ATOM_ARG_MC}, {
1065 atom_op_shift_right, ATOM_ARG_REG}, {
1066 atom_op_shift_right, ATOM_ARG_PS}, {
1067 atom_op_shift_right, ATOM_ARG_WS}, {
1068 atom_op_shift_right, ATOM_ARG_FB}, {
1069 atom_op_shift_right, ATOM_ARG_PLL}, {
1070 atom_op_shift_right, ATOM_ARG_MC}, {
1071 atom_op_mul, ATOM_ARG_REG}, {
1072 atom_op_mul, ATOM_ARG_PS}, {
1073 atom_op_mul, ATOM_ARG_WS}, {
1074 atom_op_mul, ATOM_ARG_FB}, {
1075 atom_op_mul, ATOM_ARG_PLL}, {
1076 atom_op_mul, ATOM_ARG_MC}, {
1077 atom_op_div, ATOM_ARG_REG}, {
1078 atom_op_div, ATOM_ARG_PS}, {
1079 atom_op_div, ATOM_ARG_WS}, {
1080 atom_op_div, ATOM_ARG_FB}, {
1081 atom_op_div, ATOM_ARG_PLL}, {
1082 atom_op_div, ATOM_ARG_MC}, {
1083 atom_op_add, ATOM_ARG_REG}, {
1084 atom_op_add, ATOM_ARG_PS}, {
1085 atom_op_add, ATOM_ARG_WS}, {
1086 atom_op_add, ATOM_ARG_FB}, {
1087 atom_op_add, ATOM_ARG_PLL}, {
1088 atom_op_add, ATOM_ARG_MC}, {
1089 atom_op_sub, ATOM_ARG_REG}, {
1090 atom_op_sub, ATOM_ARG_PS}, {
1091 atom_op_sub, ATOM_ARG_WS}, {
1092 atom_op_sub, ATOM_ARG_FB}, {
1093 atom_op_sub, ATOM_ARG_PLL}, {
1094 atom_op_sub, ATOM_ARG_MC}, {
1095 atom_op_setport, ATOM_PORT_ATI}, {
1096 atom_op_setport, ATOM_PORT_PCI}, {
1097 atom_op_setport, ATOM_PORT_SYSIO}, {
1098 atom_op_setregblock, 0}, {
1099 atom_op_setfbbase, 0}, {
1100 atom_op_compare, ATOM_ARG_REG}, {
1101 atom_op_compare, ATOM_ARG_PS}, {
1102 atom_op_compare, ATOM_ARG_WS}, {
1103 atom_op_compare, ATOM_ARG_FB}, {
1104 atom_op_compare, ATOM_ARG_PLL}, {
1105 atom_op_compare, ATOM_ARG_MC}, {
1106 atom_op_switch, 0}, {
1107 atom_op_jump, ATOM_COND_ALWAYS}, {
1108 atom_op_jump, ATOM_COND_EQUAL}, {
1109 atom_op_jump, ATOM_COND_BELOW}, {
1110 atom_op_jump, ATOM_COND_ABOVE}, {
1111 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1112 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1113 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1114 atom_op_test, ATOM_ARG_REG}, {
1115 atom_op_test, ATOM_ARG_PS}, {
1116 atom_op_test, ATOM_ARG_WS}, {
1117 atom_op_test, ATOM_ARG_FB}, {
1118 atom_op_test, ATOM_ARG_PLL}, {
1119 atom_op_test, ATOM_ARG_MC}, {
1120 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1121 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1122 atom_op_calltable, 0}, {
1123 atom_op_repeat, 0}, {
1124 atom_op_clear, ATOM_ARG_REG}, {
1125 atom_op_clear, ATOM_ARG_PS}, {
1126 atom_op_clear, ATOM_ARG_WS}, {
1127 atom_op_clear, ATOM_ARG_FB}, {
1128 atom_op_clear, ATOM_ARG_PLL}, {
1129 atom_op_clear, ATOM_ARG_MC}, {
1130 atom_op_nop, 0}, {
1131 atom_op_eot, 0}, {
1132 atom_op_mask, ATOM_ARG_REG}, {
1133 atom_op_mask, ATOM_ARG_PS}, {
1134 atom_op_mask, ATOM_ARG_WS}, {
1135 atom_op_mask, ATOM_ARG_FB}, {
1136 atom_op_mask, ATOM_ARG_PLL}, {
1137 atom_op_mask, ATOM_ARG_MC}, {
1138 atom_op_postcard, 0}, {
1139 atom_op_beep, 0}, {
1140 atom_op_savereg, 0}, {
1141 atom_op_restorereg, 0}, {
1142 atom_op_setdatablock, 0}, {
1143 atom_op_xor, ATOM_ARG_REG}, {
1144 atom_op_xor, ATOM_ARG_PS}, {
1145 atom_op_xor, ATOM_ARG_WS}, {
1146 atom_op_xor, ATOM_ARG_FB}, {
1147 atom_op_xor, ATOM_ARG_PLL}, {
1148 atom_op_xor, ATOM_ARG_MC}, {
1149 atom_op_shl, ATOM_ARG_REG}, {
1150 atom_op_shl, ATOM_ARG_PS}, {
1151 atom_op_shl, ATOM_ARG_WS}, {
1152 atom_op_shl, ATOM_ARG_FB}, {
1153 atom_op_shl, ATOM_ARG_PLL}, {
1154 atom_op_shl, ATOM_ARG_MC}, {
1155 atom_op_shr, ATOM_ARG_REG}, {
1156 atom_op_shr, ATOM_ARG_PS}, {
1157 atom_op_shr, ATOM_ARG_WS}, {
1158 atom_op_shr, ATOM_ARG_FB}, {
1159 atom_op_shr, ATOM_ARG_PLL}, {
1160 atom_op_shr, ATOM_ARG_MC}, {
1161 atom_op_debug, 0},};
1162
atom_execute_table_locked(struct atom_context * ctx,int index,uint32_t * params)1163 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1164 {
1165 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1166 int len, ws, ps, ptr;
1167 unsigned char op;
1168 atom_exec_context ectx;
1169 int ret = 0;
1170
1171 if (!base)
1172 return -EINVAL;
1173
1174 len = CU16(base + ATOM_CT_SIZE_PTR);
1175 ws = CU8(base + ATOM_CT_WS_PTR);
1176 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1177 ptr = base + ATOM_CT_CODE_PTR;
1178
1179 ATOM_SDEBUG_PRINT(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1180
1181 ectx.ctx = ctx;
1182 ectx.ps_shift = ps / 4;
1183 ectx.start = base;
1184 ectx.ps = params;
1185 ectx.abort = false;
1186 ectx.last_jump = 0;
1187 if (ws)
1188 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1189 else
1190 ectx.ws = NULL;
1191
1192 debug_depth++;
1193 while (1) {
1194 op = CU8(ptr++);
1195 if (op < ATOM_OP_NAMES_CNT)
1196 ATOM_SDEBUG_PRINT("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1197 else
1198 ATOM_SDEBUG_PRINT("[%d] @ 0x%04X\n", op, ptr - 1);
1199 if (ectx.abort) {
1200 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1201 base, len, ws, ps, ptr - 1);
1202 ret = -EINVAL;
1203 goto free;
1204 }
1205
1206 if (op < ATOM_OP_CNT && op > 0)
1207 opcode_table[op].func(&ectx, &ptr,
1208 opcode_table[op].arg);
1209 else
1210 break;
1211
1212 if (op == ATOM_OP_EOT)
1213 break;
1214 }
1215 debug_depth--;
1216 ATOM_SDEBUG_PRINT("<<\n");
1217
1218 free:
1219 if (ws)
1220 kfree(ectx.ws);
1221 return ret;
1222 }
1223
atom_execute_table_scratch_unlocked(struct atom_context * ctx,int index,uint32_t * params)1224 int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1225 {
1226 int r;
1227
1228 lockmgr(&ctx->mutex, LK_EXCLUSIVE);
1229 /* reset data block */
1230 ctx->data_block = 0;
1231 /* reset reg block */
1232 ctx->reg_block = 0;
1233 /* reset fb window */
1234 ctx->fb_base = 0;
1235 /* reset io mode */
1236 ctx->io_mode = ATOM_IO_MM;
1237 /* reset divmul */
1238 ctx->divmul[0] = 0;
1239 ctx->divmul[1] = 0;
1240 r = atom_execute_table_locked(ctx, index, params);
1241 lockmgr(&ctx->mutex, LK_RELEASE);
1242 return r;
1243 }
1244
atom_execute_table(struct atom_context * ctx,int index,uint32_t * params)1245 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1246 {
1247 int r;
1248 lockmgr(&ctx->scratch_mutex, LK_EXCLUSIVE);
1249 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1250 lockmgr(&ctx->scratch_mutex, LK_RELEASE);
1251 return r;
1252 }
1253
1254 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1255
atom_index_iio(struct atom_context * ctx,int base)1256 static void atom_index_iio(struct atom_context *ctx, int base)
1257 {
1258 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1259 if (!ctx->iio)
1260 return;
1261 while (CU8(base) == ATOM_IIO_START) {
1262 ctx->iio[CU8(base + 1)] = base + 2;
1263 base += 2;
1264 while (CU8(base) != ATOM_IIO_END)
1265 base += atom_iio_len[CU8(base)];
1266 base += 3;
1267 }
1268 }
1269
atom_parse(struct card_info * card,void * bios)1270 struct atom_context *atom_parse(struct card_info *card, void *bios)
1271 {
1272 int base;
1273 struct atom_context *ctx =
1274 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1275 char *str;
1276 char name[512];
1277 int i;
1278
1279 if (!ctx)
1280 return NULL;
1281
1282 ctx->card = card;
1283 ctx->bios = bios;
1284
1285 if (CU16(0) != ATOM_BIOS_MAGIC) {
1286 DRM_INFO("Invalid BIOS magic.\n");
1287 kfree(ctx);
1288 return NULL;
1289 }
1290 if (strncmp
1291 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1292 strlen(ATOM_ATI_MAGIC))) {
1293 DRM_INFO("Invalid ATI magic.\n");
1294 kfree(ctx);
1295 return NULL;
1296 }
1297
1298 base = CU16(ATOM_ROM_TABLE_PTR);
1299 if (strncmp
1300 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1301 strlen(ATOM_ROM_MAGIC))) {
1302 DRM_INFO("Invalid ATOM magic.\n");
1303 kfree(ctx);
1304 return NULL;
1305 }
1306
1307 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1308 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1309 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1310 if (!ctx->iio) {
1311 atom_destroy(ctx);
1312 return NULL;
1313 }
1314
1315 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1316 while (*str && ((*str == '\n') || (*str == '\r')))
1317 str++;
1318 /* name string isn't always 0 terminated */
1319 for (i = 0; i < 511; i++) {
1320 name[i] = str[i];
1321 if (name[i] < '.' || name[i] > 'z') {
1322 name[i] = 0;
1323 break;
1324 }
1325 }
1326 DRM_INFO("ATOM BIOS: %s\n", name);
1327
1328 return ctx;
1329 }
1330
atom_asic_init(struct atom_context * ctx)1331 int atom_asic_init(struct atom_context *ctx)
1332 {
1333 struct radeon_device *rdev = ctx->card->dev->dev_private;
1334 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1335 uint32_t ps[16];
1336 int ret;
1337
1338 memset(ps, 0, 64);
1339
1340 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1341 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1342 if (!ps[0] || !ps[1])
1343 return 1;
1344
1345 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1346 return 1;
1347 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1348 if (ret)
1349 return ret;
1350
1351 memset(ps, 0, 64);
1352
1353 if (rdev->family < CHIP_R600) {
1354 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1355 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1356 }
1357 return ret;
1358 }
1359
atom_destroy(struct atom_context * ctx)1360 void atom_destroy(struct atom_context *ctx)
1361 {
1362 kfree(ctx->iio);
1363 kfree(ctx);
1364 }
1365
atom_parse_data_header(struct atom_context * ctx,int index,uint16_t * size,uint8_t * frev,uint8_t * crev,uint16_t * data_start)1366 bool atom_parse_data_header(struct atom_context *ctx, int index,
1367 uint16_t * size, uint8_t * frev, uint8_t * crev,
1368 uint16_t * data_start)
1369 {
1370 int offset = index * 2 + 4;
1371 int idx = CU16(ctx->data_table + offset);
1372 u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);
1373
1374 if (!mdt[index])
1375 return false;
1376
1377 if (size)
1378 *size = CU16(idx);
1379 if (frev)
1380 *frev = CU8(idx + 2);
1381 if (crev)
1382 *crev = CU8(idx + 3);
1383 *data_start = idx;
1384 return true;
1385 }
1386
atom_parse_cmd_header(struct atom_context * ctx,int index,uint8_t * frev,uint8_t * crev)1387 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1388 uint8_t * crev)
1389 {
1390 int offset = index * 2 + 4;
1391 int idx = CU16(ctx->cmd_table + offset);
1392 u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);
1393
1394 if (!mct[index])
1395 return false;
1396
1397 if (frev)
1398 *frev = CU8(idx + 2);
1399 if (crev)
1400 *crev = CU8(idx + 3);
1401 return true;
1402 }
1403
atom_allocate_fb_scratch(struct atom_context * ctx)1404 int atom_allocate_fb_scratch(struct atom_context *ctx)
1405 {
1406 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1407 uint16_t data_offset;
1408 int usage_bytes = 0;
1409 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1410
1411 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1412 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset);
1413
1414 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1415 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1416 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1417
1418 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1419 }
1420 ctx->scratch_size_bytes = 0;
1421 if (usage_bytes == 0)
1422 usage_bytes = 20 * 1024;
1423 /* allocate some scratch memory */
1424 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1425 if (!ctx->scratch)
1426 return -ENOMEM;
1427 ctx->scratch_size_bytes = usage_bytes;
1428 return 0;
1429 }
1430