xref: /freebsd-11-stable/sys/dev/ath/if_ath_tx.c (revision e6235ffbaa0a6e2ed534b7da0f88cea7e09e1b94)
1 /*-
2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer,
11  *    without modification.
12  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14  *    redistribution must be conditioned upon including a substantially
15  *    similar Disclaimer requirement for further binary redistribution.
16  *
17  * NO WARRANTY
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28  * THE POSSIBILITY OF SUCH DAMAGES.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 /*
35  * Driver for the Atheros Wireless LAN controller.
36  *
37  * This software is derived from work of Atsushi Onoe; his contribution
38  * is greatly appreciated.
39  */
40 
41 #include "opt_inet.h"
42 #include "opt_ath.h"
43 #include "opt_wlan.h"
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sysctl.h>
48 #include <sys/mbuf.h>
49 #include <sys/malloc.h>
50 #include <sys/lock.h>
51 #include <sys/mutex.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
54 #include <sys/sockio.h>
55 #include <sys/errno.h>
56 #include <sys/callout.h>
57 #include <sys/bus.h>
58 #include <sys/endian.h>
59 #include <sys/kthread.h>
60 #include <sys/taskqueue.h>
61 #include <sys/priv.h>
62 #include <sys/ktr.h>
63 
64 #include <machine/bus.h>
65 
66 #include <net/if.h>
67 #include <net/if_var.h>
68 #include <net/if_dl.h>
69 #include <net/if_media.h>
70 #include <net/if_types.h>
71 #include <net/if_arp.h>
72 #include <net/ethernet.h>
73 #include <net/if_llc.h>
74 
75 #include <net80211/ieee80211_var.h>
76 #include <net80211/ieee80211_regdomain.h>
77 #ifdef IEEE80211_SUPPORT_SUPERG
78 #include <net80211/ieee80211_superg.h>
79 #endif
80 #ifdef IEEE80211_SUPPORT_TDMA
81 #include <net80211/ieee80211_tdma.h>
82 #endif
83 #include <net80211/ieee80211_ht.h>
84 
85 #include <net/bpf.h>
86 
87 #ifdef INET
88 #include <netinet/in.h>
89 #include <netinet/if_ether.h>
90 #endif
91 
92 #include <dev/ath/if_athvar.h>
93 #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
94 #include <dev/ath/ath_hal/ah_diagcodes.h>
95 
96 #include <dev/ath/if_ath_debug.h>
97 
98 #ifdef ATH_TX99_DIAG
99 #include <dev/ath/ath_tx99/ath_tx99.h>
100 #endif
101 
102 #include <dev/ath/if_ath_misc.h>
103 #include <dev/ath/if_ath_tx.h>
104 #include <dev/ath/if_ath_tx_ht.h>
105 
106 #ifdef	ATH_DEBUG_ALQ
107 #include <dev/ath/if_ath_alq.h>
108 #endif
109 
110 /*
111  * How many retries to perform in software
112  */
113 #define	SWMAX_RETRIES		10
114 
115 /*
116  * What queue to throw the non-QoS TID traffic into
117  */
118 #define	ATH_NONQOS_TID_AC	WME_AC_VO
119 
120 #if 0
121 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
122 #endif
123 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
124     int tid);
125 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
126     int tid);
127 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
128     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
129 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
130     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
131 static struct ath_buf *
132 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
133     struct ath_tid *tid, struct ath_buf *bf);
134 
135 #ifdef	ATH_DEBUG_ALQ
136 void
ath_tx_alq_post(struct ath_softc * sc,struct ath_buf * bf_first)137 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
138 {
139 	struct ath_buf *bf;
140 	int i, n;
141 	const char *ds;
142 
143 	/* XXX we should skip out early if debugging isn't enabled! */
144 	bf = bf_first;
145 
146 	while (bf != NULL) {
147 		/* XXX should ensure bf_nseg > 0! */
148 		if (bf->bf_nseg == 0)
149 			break;
150 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
151 		for (i = 0, ds = (const char *) bf->bf_desc;
152 		    i < n;
153 		    i++, ds += sc->sc_tx_desclen) {
154 			if_ath_alq_post(&sc->sc_alq,
155 			    ATH_ALQ_EDMA_TXDESC,
156 			    sc->sc_tx_desclen,
157 			    ds);
158 		}
159 		bf = bf->bf_next;
160 	}
161 }
162 #endif /* ATH_DEBUG_ALQ */
163 
164 /*
165  * Whether to use the 11n rate scenario functions or not
166  */
167 static inline int
ath_tx_is_11n(struct ath_softc * sc)168 ath_tx_is_11n(struct ath_softc *sc)
169 {
170 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
171 		    (sc->sc_ah->ah_magic == 0x19741014));
172 }
173 
174 /*
175  * Obtain the current TID from the given frame.
176  *
177  * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
178  * This has implications for which AC/priority the packet is placed
179  * in.
180  */
181 static int
ath_tx_gettid(struct ath_softc * sc,const struct mbuf * m0)182 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
183 {
184 	const struct ieee80211_frame *wh;
185 	int pri = M_WME_GETAC(m0);
186 
187 	wh = mtod(m0, const struct ieee80211_frame *);
188 	if (! IEEE80211_QOS_HAS_SEQ(wh))
189 		return IEEE80211_NONQOS_TID;
190 	else
191 		return WME_AC_TO_TID(pri);
192 }
193 
194 static void
ath_tx_set_retry(struct ath_softc * sc,struct ath_buf * bf)195 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
196 {
197 	struct ieee80211_frame *wh;
198 
199 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
200 	/* Only update/resync if needed */
201 	if (bf->bf_state.bfs_isretried == 0) {
202 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
203 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
204 		    BUS_DMASYNC_PREWRITE);
205 	}
206 	bf->bf_state.bfs_isretried = 1;
207 	bf->bf_state.bfs_retries ++;
208 }
209 
210 /*
211  * Determine what the correct AC queue for the given frame
212  * should be.
213  *
214  * This code assumes that the TIDs map consistently to
215  * the underlying hardware (or software) ath_txq.
216  * Since the sender may try to set an AC which is
217  * arbitrary, non-QoS TIDs may end up being put on
218  * completely different ACs. There's no way to put a
219  * TID into multiple ath_txq's for scheduling, so
220  * for now we override the AC/TXQ selection and set
221  * non-QOS TID frames into the BE queue.
222  *
223  * This may be completely incorrect - specifically,
224  * some management frames may end up out of order
225  * compared to the QoS traffic they're controlling.
226  * I'll look into this later.
227  */
228 static int
ath_tx_getac(struct ath_softc * sc,const struct mbuf * m0)229 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
230 {
231 	const struct ieee80211_frame *wh;
232 	int pri = M_WME_GETAC(m0);
233 	wh = mtod(m0, const struct ieee80211_frame *);
234 	if (IEEE80211_QOS_HAS_SEQ(wh))
235 		return pri;
236 
237 	return ATH_NONQOS_TID_AC;
238 }
239 
240 void
ath_txfrag_cleanup(struct ath_softc * sc,ath_bufhead * frags,struct ieee80211_node * ni)241 ath_txfrag_cleanup(struct ath_softc *sc,
242 	ath_bufhead *frags, struct ieee80211_node *ni)
243 {
244 	struct ath_buf *bf, *next;
245 
246 	ATH_TXBUF_LOCK_ASSERT(sc);
247 
248 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
249 		/* NB: bf assumed clean */
250 		TAILQ_REMOVE(frags, bf, bf_list);
251 		ath_returnbuf_head(sc, bf);
252 		ieee80211_node_decref(ni);
253 	}
254 }
255 
256 /*
257  * Setup xmit of a fragmented frame.  Allocate a buffer
258  * for each frag and bump the node reference count to
259  * reflect the held reference to be setup by ath_tx_start.
260  */
261 int
ath_txfrag_setup(struct ath_softc * sc,ath_bufhead * frags,struct mbuf * m0,struct ieee80211_node * ni)262 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
263 	struct mbuf *m0, struct ieee80211_node *ni)
264 {
265 	struct mbuf *m;
266 	struct ath_buf *bf;
267 
268 	ATH_TXBUF_LOCK(sc);
269 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
270 		/* XXX non-management? */
271 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
272 		if (bf == NULL) {	/* out of buffers, cleanup */
273 			DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n",
274 			    __func__);
275 			ath_txfrag_cleanup(sc, frags, ni);
276 			break;
277 		}
278 		ieee80211_node_incref(ni);
279 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
280 	}
281 	ATH_TXBUF_UNLOCK(sc);
282 
283 	return !TAILQ_EMPTY(frags);
284 }
285 
286 static int
ath_tx_dmasetup(struct ath_softc * sc,struct ath_buf * bf,struct mbuf * m0)287 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
288 {
289 	struct mbuf *m;
290 	int error;
291 
292 	/*
293 	 * Load the DMA map so any coalescing is done.  This
294 	 * also calculates the number of descriptors we need.
295 	 */
296 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
297 				     bf->bf_segs, &bf->bf_nseg,
298 				     BUS_DMA_NOWAIT);
299 	if (error == EFBIG) {
300 		/* XXX packet requires too many descriptors */
301 		bf->bf_nseg = ATH_MAX_SCATTER + 1;
302 	} else if (error != 0) {
303 		sc->sc_stats.ast_tx_busdma++;
304 		ieee80211_free_mbuf(m0);
305 		return error;
306 	}
307 	/*
308 	 * Discard null packets and check for packets that
309 	 * require too many TX descriptors.  We try to convert
310 	 * the latter to a cluster.
311 	 */
312 	if (bf->bf_nseg > ATH_MAX_SCATTER) {		/* too many desc's, linearize */
313 		sc->sc_stats.ast_tx_linear++;
314 		m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
315 		if (m == NULL) {
316 			ieee80211_free_mbuf(m0);
317 			sc->sc_stats.ast_tx_nombuf++;
318 			return ENOMEM;
319 		}
320 		m0 = m;
321 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
322 					     bf->bf_segs, &bf->bf_nseg,
323 					     BUS_DMA_NOWAIT);
324 		if (error != 0) {
325 			sc->sc_stats.ast_tx_busdma++;
326 			ieee80211_free_mbuf(m0);
327 			return error;
328 		}
329 		KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
330 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
331 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
332 		sc->sc_stats.ast_tx_nodata++;
333 		ieee80211_free_mbuf(m0);
334 		return EIO;
335 	}
336 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
337 		__func__, m0, m0->m_pkthdr.len);
338 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
339 	bf->bf_m = m0;
340 
341 	return 0;
342 }
343 
344 /*
345  * Chain together segments+descriptors for a frame - 11n or otherwise.
346  *
347  * For aggregates, this is called on each frame in the aggregate.
348  */
349 static void
ath_tx_chaindesclist(struct ath_softc * sc,struct ath_desc * ds0,struct ath_buf * bf,int is_aggr,int is_first_subframe,int is_last_subframe)350 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
351     struct ath_buf *bf, int is_aggr, int is_first_subframe,
352     int is_last_subframe)
353 {
354 	struct ath_hal *ah = sc->sc_ah;
355 	char *ds;
356 	int i, bp, dsp;
357 	HAL_DMA_ADDR bufAddrList[4];
358 	uint32_t segLenList[4];
359 	int numTxMaps = 1;
360 	int isFirstDesc = 1;
361 
362 	/*
363 	 * XXX There's txdma and txdma_mgmt; the descriptor
364 	 * sizes must match.
365 	 */
366 	struct ath_descdma *dd = &sc->sc_txdma;
367 
368 	/*
369 	 * Fillin the remainder of the descriptor info.
370 	 */
371 
372 	/*
373 	 * We need the number of TX data pointers in each descriptor.
374 	 * EDMA and later chips support 4 TX buffers per descriptor;
375 	 * previous chips just support one.
376 	 */
377 	numTxMaps = sc->sc_tx_nmaps;
378 
379 	/*
380 	 * For EDMA and later chips ensure the TX map is fully populated
381 	 * before advancing to the next descriptor.
382 	 */
383 	ds = (char *) bf->bf_desc;
384 	bp = dsp = 0;
385 	bzero(bufAddrList, sizeof(bufAddrList));
386 	bzero(segLenList, sizeof(segLenList));
387 	for (i = 0; i < bf->bf_nseg; i++) {
388 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
389 		segLenList[bp] = bf->bf_segs[i].ds_len;
390 		bp++;
391 
392 		/*
393 		 * Go to the next segment if this isn't the last segment
394 		 * and there's space in the current TX map.
395 		 */
396 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
397 			continue;
398 
399 		/*
400 		 * Last segment or we're out of buffer pointers.
401 		 */
402 		bp = 0;
403 
404 		if (i == bf->bf_nseg - 1)
405 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
406 		else
407 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
408 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
409 
410 		/*
411 		 * XXX This assumes that bfs_txq is the actual destination
412 		 * hardware queue at this point.  It may not have been
413 		 * assigned, it may actually be pointing to the multicast
414 		 * software TXQ id.  These must be fixed!
415 		 */
416 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
417 			, bufAddrList
418 			, segLenList
419 			, bf->bf_descid		/* XXX desc id */
420 			, bf->bf_state.bfs_tx_queue
421 			, isFirstDesc		/* first segment */
422 			, i == bf->bf_nseg - 1	/* last segment */
423 			, (struct ath_desc *) ds0	/* first descriptor */
424 		);
425 
426 		/*
427 		 * Make sure the 11n aggregate fields are cleared.
428 		 *
429 		 * XXX TODO: this doesn't need to be called for
430 		 * aggregate frames; as it'll be called on all
431 		 * sub-frames.  Since the descriptors are in
432 		 * non-cacheable memory, this leads to some
433 		 * rather slow writes on MIPS/ARM platforms.
434 		 */
435 		if (ath_tx_is_11n(sc))
436 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
437 
438 		/*
439 		 * If 11n is enabled, set it up as if it's an aggregate
440 		 * frame.
441 		 */
442 		if (is_last_subframe) {
443 			ath_hal_set11n_aggr_last(sc->sc_ah,
444 			    (struct ath_desc *) ds);
445 		} else if (is_aggr) {
446 			/*
447 			 * This clears the aggrlen field; so
448 			 * the caller needs to call set_aggr_first()!
449 			 *
450 			 * XXX TODO: don't call this for the first
451 			 * descriptor in the first frame in an
452 			 * aggregate!
453 			 */
454 			ath_hal_set11n_aggr_middle(sc->sc_ah,
455 			    (struct ath_desc *) ds,
456 			    bf->bf_state.bfs_ndelim);
457 		}
458 		isFirstDesc = 0;
459 		bf->bf_lastds = (struct ath_desc *) ds;
460 
461 		/*
462 		 * Don't forget to skip to the next descriptor.
463 		 */
464 		ds += sc->sc_tx_desclen;
465 		dsp++;
466 
467 		/*
468 		 * .. and don't forget to blank these out!
469 		 */
470 		bzero(bufAddrList, sizeof(bufAddrList));
471 		bzero(segLenList, sizeof(segLenList));
472 	}
473 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
474 }
475 
476 /*
477  * Set the rate control fields in the given descriptor based on
478  * the bf_state fields and node state.
479  *
480  * The bfs fields should already be set with the relevant rate
481  * control information, including whether MRR is to be enabled.
482  *
483  * Since the FreeBSD HAL currently sets up the first TX rate
484  * in ath_hal_setuptxdesc(), this will setup the MRR
485  * conditionally for the pre-11n chips, and call ath_buf_set_rate
486  * unconditionally for 11n chips. These require the 11n rate
487  * scenario to be set if MCS rates are enabled, so it's easier
488  * to just always call it. The caller can then only set rates 2, 3
489  * and 4 if multi-rate retry is needed.
490  */
491 static void
ath_tx_set_ratectrl(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf)492 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
493     struct ath_buf *bf)
494 {
495 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
496 
497 	/* If mrr is disabled, blank tries 1, 2, 3 */
498 	if (! bf->bf_state.bfs_ismrr)
499 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
500 
501 #if 0
502 	/*
503 	 * If NOACK is set, just set ntries=1.
504 	 */
505 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
506 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
507 		rc[0].tries = 1;
508 	}
509 #endif
510 
511 	/*
512 	 * Always call - that way a retried descriptor will
513 	 * have the MRR fields overwritten.
514 	 *
515 	 * XXX TODO: see if this is really needed - setting up
516 	 * the first descriptor should set the MRR fields to 0
517 	 * for us anyway.
518 	 */
519 	if (ath_tx_is_11n(sc)) {
520 		ath_buf_set_rate(sc, ni, bf);
521 	} else {
522 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
523 			, rc[1].ratecode, rc[1].tries
524 			, rc[2].ratecode, rc[2].tries
525 			, rc[3].ratecode, rc[3].tries
526 		);
527 	}
528 }
529 
530 /*
531  * Setup segments+descriptors for an 11n aggregate.
532  * bf_first is the first buffer in the aggregate.
533  * The descriptor list must already been linked together using
534  * bf->bf_next.
535  */
536 static void
ath_tx_setds_11n(struct ath_softc * sc,struct ath_buf * bf_first)537 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
538 {
539 	struct ath_buf *bf, *bf_prev = NULL;
540 	struct ath_desc *ds0 = bf_first->bf_desc;
541 
542 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
543 	    __func__, bf_first->bf_state.bfs_nframes,
544 	    bf_first->bf_state.bfs_al);
545 
546 	bf = bf_first;
547 
548 	if (bf->bf_state.bfs_txrate0 == 0)
549 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n",
550 		    __func__, bf, 0);
551 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
552 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n",
553 		    __func__, bf, 0);
554 
555 	/*
556 	 * Setup all descriptors of all subframes - this will
557 	 * call ath_hal_set11naggrmiddle() on every frame.
558 	 */
559 	while (bf != NULL) {
560 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
561 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
562 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
563 		    SEQNO(bf->bf_state.bfs_seqno));
564 
565 		/*
566 		 * Setup the initial fields for the first descriptor - all
567 		 * the non-11n specific stuff.
568 		 */
569 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
570 			, bf->bf_state.bfs_pktlen	/* packet length */
571 			, bf->bf_state.bfs_hdrlen	/* header length */
572 			, bf->bf_state.bfs_atype	/* Atheros packet type */
573 			, bf->bf_state.bfs_txpower	/* txpower */
574 			, bf->bf_state.bfs_txrate0
575 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
576 			, bf->bf_state.bfs_keyix	/* key cache index */
577 			, bf->bf_state.bfs_txantenna	/* antenna mode */
578 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
579 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
580 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
581 		);
582 
583 		/*
584 		 * First descriptor? Setup the rate control and initial
585 		 * aggregate header information.
586 		 */
587 		if (bf == bf_first) {
588 			/*
589 			 * setup first desc with rate and aggr info
590 			 */
591 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
592 		}
593 
594 		/*
595 		 * Setup the descriptors for a multi-descriptor frame.
596 		 * This is both aggregate and non-aggregate aware.
597 		 */
598 		ath_tx_chaindesclist(sc, ds0, bf,
599 		    1, /* is_aggr */
600 		    !! (bf == bf_first), /* is_first_subframe */
601 		    !! (bf->bf_next == NULL) /* is_last_subframe */
602 		    );
603 
604 		if (bf == bf_first) {
605 			/*
606 			 * Initialise the first 11n aggregate with the
607 			 * aggregate length and aggregate enable bits.
608 			 */
609 			ath_hal_set11n_aggr_first(sc->sc_ah,
610 			    ds0,
611 			    bf->bf_state.bfs_al,
612 			    bf->bf_state.bfs_ndelim);
613 		}
614 
615 		/*
616 		 * Link the last descriptor of the previous frame
617 		 * to the beginning descriptor of this frame.
618 		 */
619 		if (bf_prev != NULL)
620 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
621 			    bf->bf_daddr);
622 
623 		/* Save a copy so we can link the next descriptor in */
624 		bf_prev = bf;
625 		bf = bf->bf_next;
626 	}
627 
628 	/*
629 	 * Set the first descriptor bf_lastds field to point to
630 	 * the last descriptor in the last subframe, that's where
631 	 * the status update will occur.
632 	 */
633 	bf_first->bf_lastds = bf_prev->bf_lastds;
634 
635 	/*
636 	 * And bf_last in the first descriptor points to the end of
637 	 * the aggregate list.
638 	 */
639 	bf_first->bf_last = bf_prev;
640 
641 	/*
642 	 * For non-AR9300 NICs, which require the rate control
643 	 * in the final descriptor - let's set that up now.
644 	 *
645 	 * This is because the filltxdesc() HAL call doesn't
646 	 * populate the last segment with rate control information
647 	 * if firstSeg is also true.  For non-aggregate frames
648 	 * that is fine, as the first frame already has rate control
649 	 * info.  But if the last frame in an aggregate has one
650 	 * descriptor, both firstseg and lastseg will be true and
651 	 * the rate info isn't copied.
652 	 *
653 	 * This is inefficient on MIPS/ARM platforms that have
654 	 * non-cachable memory for TX descriptors, but we'll just
655 	 * make do for now.
656 	 *
657 	 * As to why the rate table is stashed in the last descriptor
658 	 * rather than the first descriptor?  Because proctxdesc()
659 	 * is called on the final descriptor in an MPDU or A-MPDU -
660 	 * ie, the one that gets updated by the hardware upon
661 	 * completion.  That way proctxdesc() doesn't need to know
662 	 * about the first _and_ last TX descriptor.
663 	 */
664 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
665 
666 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
667 }
668 
669 /*
670  * Hand-off a frame to the multicast TX queue.
671  *
672  * This is a software TXQ which will be appended to the CAB queue
673  * during the beacon setup code.
674  *
675  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
676  * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
677  * with the actual hardware txq, or all of this will fall apart.
678  *
679  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
680  * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
681  * correctly.
682  */
683 static void
ath_tx_handoff_mcast(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)684 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
685     struct ath_buf *bf)
686 {
687 	ATH_TX_LOCK_ASSERT(sc);
688 
689 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
690 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
691 
692 	/*
693 	 * Ensure that the tx queue is the cabq, so things get
694 	 * mapped correctly.
695 	 */
696 	if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
697 		DPRINTF(sc, ATH_DEBUG_XMIT,
698 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
699 		    __func__, bf, bf->bf_state.bfs_tx_queue,
700 		    txq->axq_qnum);
701 	}
702 
703 	ATH_TXQ_LOCK(txq);
704 	if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
705 		struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
706 		struct ieee80211_frame *wh;
707 
708 		/* mark previous frame */
709 		wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
710 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
711 		bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
712 		    BUS_DMASYNC_PREWRITE);
713 
714 		/* link descriptor */
715 		ath_hal_settxdesclink(sc->sc_ah,
716 		    bf_last->bf_lastds,
717 		    bf->bf_daddr);
718 	}
719 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
720 	ATH_TXQ_UNLOCK(txq);
721 }
722 
723 /*
724  * Hand-off packet to a hardware queue.
725  */
726 static void
ath_tx_handoff_hw(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)727 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
728     struct ath_buf *bf)
729 {
730 	struct ath_hal *ah = sc->sc_ah;
731 	struct ath_buf *bf_first;
732 
733 	/*
734 	 * Insert the frame on the outbound list and pass it on
735 	 * to the hardware.  Multicast frames buffered for power
736 	 * save stations and transmit from the CAB queue are stored
737 	 * on a s/w only queue and loaded on to the CAB queue in
738 	 * the SWBA handler since frames only go out on DTIM and
739 	 * to avoid possible races.
740 	 */
741 	ATH_TX_LOCK_ASSERT(sc);
742 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
743 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
744 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
745 	     ("ath_tx_handoff_hw called for mcast queue"));
746 
747 	/*
748 	 * XXX We should instead just verify that sc_txstart_cnt
749 	 * or ath_txproc_cnt > 0.  That would mean that
750 	 * the reset is going to be waiting for us to complete.
751 	 */
752 	if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) {
753 		device_printf(sc->sc_dev,
754 		    "%s: TX dispatch without holding txcount/txstart refcnt!\n",
755 		    __func__);
756 	}
757 
758 	/*
759 	 * XXX .. this is going to cause the hardware to get upset;
760 	 * so we really should find some way to drop or queue
761 	 * things.
762 	 */
763 
764 	ATH_TXQ_LOCK(txq);
765 
766 	/*
767 	 * XXX TODO: if there's a holdingbf, then
768 	 * ATH_TXQ_PUTRUNNING should be clear.
769 	 *
770 	 * If there is a holdingbf and the list is empty,
771 	 * then axq_link should be pointing to the holdingbf.
772 	 *
773 	 * Otherwise it should point to the last descriptor
774 	 * in the last ath_buf.
775 	 *
776 	 * In any case, we should really ensure that we
777 	 * update the previous descriptor link pointer to
778 	 * this descriptor, regardless of all of the above state.
779 	 *
780 	 * For now this is captured by having axq_link point
781 	 * to either the holdingbf (if the TXQ list is empty)
782 	 * or the end of the list (if the TXQ list isn't empty.)
783 	 * I'd rather just kill axq_link here and do it as above.
784 	 */
785 
786 	/*
787 	 * Append the frame to the TX queue.
788 	 */
789 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
790 	ATH_KTR(sc, ATH_KTR_TX, 3,
791 	    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
792 	    "depth=%d",
793 	    txq->axq_qnum,
794 	    bf,
795 	    txq->axq_depth);
796 
797 	/*
798 	 * If there's a link pointer, update it.
799 	 *
800 	 * XXX we should replace this with the above logic, just
801 	 * to kill axq_link with fire.
802 	 */
803 	if (txq->axq_link != NULL) {
804 		*txq->axq_link = bf->bf_daddr;
805 		DPRINTF(sc, ATH_DEBUG_XMIT,
806 		    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
807 		    txq->axq_qnum, txq->axq_link,
808 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
809 		    txq->axq_depth);
810 		ATH_KTR(sc, ATH_KTR_TX, 5,
811 		    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
812 		    "lastds=%d",
813 		    txq->axq_qnum, txq->axq_link,
814 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
815 		    bf->bf_lastds);
816 	}
817 
818 	/*
819 	 * If we've not pushed anything into the hardware yet,
820 	 * push the head of the queue into the TxDP.
821 	 *
822 	 * Once we've started DMA, there's no guarantee that
823 	 * updating the TxDP with a new value will actually work.
824 	 * So we just don't do that - if we hit the end of the list,
825 	 * we keep that buffer around (the "holding buffer") and
826 	 * re-start DMA by updating the link pointer of _that_
827 	 * descriptor and then restart DMA.
828 	 */
829 	if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
830 		bf_first = TAILQ_FIRST(&txq->axq_q);
831 		txq->axq_flags |= ATH_TXQ_PUTRUNNING;
832 		ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
833 		DPRINTF(sc, ATH_DEBUG_XMIT,
834 		    "%s: TXDP[%u] = %p (%p) depth %d\n",
835 		    __func__, txq->axq_qnum,
836 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
837 		    txq->axq_depth);
838 		ATH_KTR(sc, ATH_KTR_TX, 5,
839 		    "ath_tx_handoff: TXDP[%u] = %p (%p) "
840 		    "lastds=%p depth %d",
841 		    txq->axq_qnum,
842 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
843 		    bf_first->bf_lastds,
844 		    txq->axq_depth);
845 	}
846 
847 	/*
848 	 * Ensure that the bf TXQ matches this TXQ, so later
849 	 * checking and holding buffer manipulation is sane.
850 	 */
851 	if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
852 		DPRINTF(sc, ATH_DEBUG_XMIT,
853 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
854 		    __func__, bf, bf->bf_state.bfs_tx_queue,
855 		    txq->axq_qnum);
856 	}
857 
858 	/*
859 	 * Track aggregate queue depth.
860 	 */
861 	if (bf->bf_state.bfs_aggr)
862 		txq->axq_aggr_depth++;
863 
864 	/*
865 	 * Update the link pointer.
866 	 */
867 	ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
868 
869 	/*
870 	 * Start DMA.
871 	 *
872 	 * If we wrote a TxDP above, DMA will start from here.
873 	 *
874 	 * If DMA is running, it'll do nothing.
875 	 *
876 	 * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
877 	 * or VEOL) then it stops at the last transmitted write.
878 	 * We then append a new frame by updating the link pointer
879 	 * in that descriptor and then kick TxE here; it will re-read
880 	 * that last descriptor and find the new descriptor to transmit.
881 	 *
882 	 * This is why we keep the holding descriptor around.
883 	 */
884 	ath_hal_txstart(ah, txq->axq_qnum);
885 	ATH_TXQ_UNLOCK(txq);
886 	ATH_KTR(sc, ATH_KTR_TX, 1,
887 	    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
888 }
889 
890 /*
891  * Restart TX DMA for the given TXQ.
892  *
893  * This must be called whether the queue is empty or not.
894  */
895 static void
ath_legacy_tx_dma_restart(struct ath_softc * sc,struct ath_txq * txq)896 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
897 {
898 	struct ath_buf *bf, *bf_last;
899 
900 	ATH_TXQ_LOCK_ASSERT(txq);
901 
902 	/* XXX make this ATH_TXQ_FIRST */
903 	bf = TAILQ_FIRST(&txq->axq_q);
904 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
905 
906 	if (bf == NULL)
907 		return;
908 
909 	DPRINTF(sc, ATH_DEBUG_RESET,
910 	    "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
911 	    __func__,
912 	    txq->axq_qnum,
913 	    bf,
914 	    bf_last,
915 	    (uint32_t) bf->bf_daddr);
916 
917 #ifdef	ATH_DEBUG
918 	if (sc->sc_debug & ATH_DEBUG_RESET)
919 		ath_tx_dump(sc, txq);
920 #endif
921 
922 	/*
923 	 * This is called from a restart, so DMA is known to be
924 	 * completely stopped.
925 	 */
926 	KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
927 	    ("%s: Q%d: called with PUTRUNNING=1\n",
928 	    __func__,
929 	    txq->axq_qnum));
930 
931 	ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
932 	txq->axq_flags |= ATH_TXQ_PUTRUNNING;
933 
934 	ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
935 	    &txq->axq_link);
936 	ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
937 }
938 
939 /*
940  * Hand off a packet to the hardware (or mcast queue.)
941  *
942  * The relevant hardware txq should be locked.
943  */
944 static void
ath_legacy_xmit_handoff(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)945 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
946     struct ath_buf *bf)
947 {
948 	ATH_TX_LOCK_ASSERT(sc);
949 
950 #ifdef	ATH_DEBUG_ALQ
951 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
952 		ath_tx_alq_post(sc, bf);
953 #endif
954 
955 	if (txq->axq_qnum == ATH_TXQ_SWQ)
956 		ath_tx_handoff_mcast(sc, txq, bf);
957 	else
958 		ath_tx_handoff_hw(sc, txq, bf);
959 }
960 
961 static int
ath_tx_tag_crypto(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int iswep,int isfrag,int * hdrlen,int * pktlen,int * keyix)962 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
963     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
964     int *keyix)
965 {
966 	DPRINTF(sc, ATH_DEBUG_XMIT,
967 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
968 	    __func__,
969 	    *hdrlen,
970 	    *pktlen,
971 	    isfrag,
972 	    iswep,
973 	    m0);
974 
975 	if (iswep) {
976 		const struct ieee80211_cipher *cip;
977 		struct ieee80211_key *k;
978 
979 		/*
980 		 * Construct the 802.11 header+trailer for an encrypted
981 		 * frame. The only reason this can fail is because of an
982 		 * unknown or unsupported cipher/key type.
983 		 */
984 		k = ieee80211_crypto_encap(ni, m0);
985 		if (k == NULL) {
986 			/*
987 			 * This can happen when the key is yanked after the
988 			 * frame was queued.  Just discard the frame; the
989 			 * 802.11 layer counts failures and provides
990 			 * debugging/diagnostics.
991 			 */
992 			return (0);
993 		}
994 		/*
995 		 * Adjust the packet + header lengths for the crypto
996 		 * additions and calculate the h/w key index.  When
997 		 * a s/w mic is done the frame will have had any mic
998 		 * added to it prior to entry so m0->m_pkthdr.len will
999 		 * account for it. Otherwise we need to add it to the
1000 		 * packet length.
1001 		 */
1002 		cip = k->wk_cipher;
1003 		(*hdrlen) += cip->ic_header;
1004 		(*pktlen) += cip->ic_header + cip->ic_trailer;
1005 		/* NB: frags always have any TKIP MIC done in s/w */
1006 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
1007 			(*pktlen) += cip->ic_miclen;
1008 		(*keyix) = k->wk_keyix;
1009 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
1010 		/*
1011 		 * Use station key cache slot, if assigned.
1012 		 */
1013 		(*keyix) = ni->ni_ucastkey.wk_keyix;
1014 		if ((*keyix) == IEEE80211_KEYIX_NONE)
1015 			(*keyix) = HAL_TXKEYIX_INVALID;
1016 	} else
1017 		(*keyix) = HAL_TXKEYIX_INVALID;
1018 
1019 	return (1);
1020 }
1021 
1022 /*
1023  * Calculate whether interoperability protection is required for
1024  * this frame.
1025  *
1026  * This requires the rate control information be filled in,
1027  * as the protection requirement depends upon the current
1028  * operating mode / PHY.
1029  */
1030 static void
ath_tx_calc_protection(struct ath_softc * sc,struct ath_buf * bf)1031 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1032 {
1033 	struct ieee80211_frame *wh;
1034 	uint8_t rix;
1035 	uint16_t flags;
1036 	int shortPreamble;
1037 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1038 	struct ieee80211com *ic = &sc->sc_ic;
1039 
1040 	flags = bf->bf_state.bfs_txflags;
1041 	rix = bf->bf_state.bfs_rc[0].rix;
1042 	shortPreamble = bf->bf_state.bfs_shpream;
1043 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1044 
1045 	/*
1046 	 * If 802.11g protection is enabled, determine whether
1047 	 * to use RTS/CTS or just CTS.  Note that this is only
1048 	 * done for OFDM unicast frames.
1049 	 */
1050 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1051 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1052 	    (flags & HAL_TXDESC_NOACK) == 0) {
1053 		bf->bf_state.bfs_doprot = 1;
1054 		/* XXX fragments must use CCK rates w/ protection */
1055 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1056 			flags |= HAL_TXDESC_RTSENA;
1057 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1058 			flags |= HAL_TXDESC_CTSENA;
1059 		}
1060 		/*
1061 		 * For frags it would be desirable to use the
1062 		 * highest CCK rate for RTS/CTS.  But stations
1063 		 * farther away may detect it at a lower CCK rate
1064 		 * so use the configured protection rate instead
1065 		 * (for now).
1066 		 */
1067 		sc->sc_stats.ast_tx_protect++;
1068 	}
1069 
1070 	/*
1071 	 * If 11n protection is enabled and it's a HT frame,
1072 	 * enable RTS.
1073 	 *
1074 	 * XXX ic_htprotmode or ic_curhtprotmode?
1075 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1076 	 * XXX indicates it's not a HT pure environment?
1077 	 */
1078 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1079 	    rt->info[rix].phy == IEEE80211_T_HT &&
1080 	    (flags & HAL_TXDESC_NOACK) == 0) {
1081 		flags |= HAL_TXDESC_RTSENA;
1082 		sc->sc_stats.ast_tx_htprotect++;
1083 	}
1084 	bf->bf_state.bfs_txflags = flags;
1085 }
1086 
1087 /*
1088  * Update the frame duration given the currently selected rate.
1089  *
1090  * This also updates the frame duration value, so it will require
1091  * a DMA flush.
1092  */
1093 static void
ath_tx_calc_duration(struct ath_softc * sc,struct ath_buf * bf)1094 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1095 {
1096 	struct ieee80211_frame *wh;
1097 	uint8_t rix;
1098 	uint16_t flags;
1099 	int shortPreamble;
1100 	struct ath_hal *ah = sc->sc_ah;
1101 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1102 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1103 
1104 	flags = bf->bf_state.bfs_txflags;
1105 	rix = bf->bf_state.bfs_rc[0].rix;
1106 	shortPreamble = bf->bf_state.bfs_shpream;
1107 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1108 
1109 	/*
1110 	 * Calculate duration.  This logically belongs in the 802.11
1111 	 * layer but it lacks sufficient information to calculate it.
1112 	 */
1113 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1114 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1115 		u_int16_t dur;
1116 		if (shortPreamble)
1117 			dur = rt->info[rix].spAckDuration;
1118 		else
1119 			dur = rt->info[rix].lpAckDuration;
1120 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1121 			dur += dur;		/* additional SIFS+ACK */
1122 			/*
1123 			 * Include the size of next fragment so NAV is
1124 			 * updated properly.  The last fragment uses only
1125 			 * the ACK duration
1126 			 *
1127 			 * XXX TODO: ensure that the rate lookup for each
1128 			 * fragment is the same as the rate used by the
1129 			 * first fragment!
1130 			 */
1131 			dur += ath_hal_computetxtime(ah,
1132 			    rt,
1133 			    bf->bf_nextfraglen,
1134 			    rix, shortPreamble);
1135 		}
1136 		if (isfrag) {
1137 			/*
1138 			 * Force hardware to use computed duration for next
1139 			 * fragment by disabling multi-rate retry which updates
1140 			 * duration based on the multi-rate duration table.
1141 			 */
1142 			bf->bf_state.bfs_ismrr = 0;
1143 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1144 			/* XXX update bfs_rc[0].try? */
1145 		}
1146 
1147 		/* Update the duration field itself */
1148 		*(u_int16_t *)wh->i_dur = htole16(dur);
1149 	}
1150 }
1151 
1152 static uint8_t
ath_tx_get_rtscts_rate(struct ath_hal * ah,const HAL_RATE_TABLE * rt,int cix,int shortPreamble)1153 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1154     int cix, int shortPreamble)
1155 {
1156 	uint8_t ctsrate;
1157 
1158 	/*
1159 	 * CTS transmit rate is derived from the transmit rate
1160 	 * by looking in the h/w rate table.  We must also factor
1161 	 * in whether or not a short preamble is to be used.
1162 	 */
1163 	/* NB: cix is set above where RTS/CTS is enabled */
1164 	KASSERT(cix != 0xff, ("cix not setup"));
1165 	ctsrate = rt->info[cix].rateCode;
1166 
1167 	/* XXX this should only matter for legacy rates */
1168 	if (shortPreamble)
1169 		ctsrate |= rt->info[cix].shortPreamble;
1170 
1171 	return (ctsrate);
1172 }
1173 
1174 /*
1175  * Calculate the RTS/CTS duration for legacy frames.
1176  */
1177 static int
ath_tx_calc_ctsduration(struct ath_hal * ah,int rix,int cix,int shortPreamble,int pktlen,const HAL_RATE_TABLE * rt,int flags)1178 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1179     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1180     int flags)
1181 {
1182 	int ctsduration = 0;
1183 
1184 	/* This mustn't be called for HT modes */
1185 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1186 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1187 		    __func__, rt->info[cix].rateCode);
1188 		return (-1);
1189 	}
1190 
1191 	/*
1192 	 * Compute the transmit duration based on the frame
1193 	 * size and the size of an ACK frame.  We call into the
1194 	 * HAL to do the computation since it depends on the
1195 	 * characteristics of the actual PHY being used.
1196 	 *
1197 	 * NB: CTS is assumed the same size as an ACK so we can
1198 	 *     use the precalculated ACK durations.
1199 	 */
1200 	if (shortPreamble) {
1201 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1202 			ctsduration += rt->info[cix].spAckDuration;
1203 		ctsduration += ath_hal_computetxtime(ah,
1204 			rt, pktlen, rix, AH_TRUE);
1205 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1206 			ctsduration += rt->info[rix].spAckDuration;
1207 	} else {
1208 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1209 			ctsduration += rt->info[cix].lpAckDuration;
1210 		ctsduration += ath_hal_computetxtime(ah,
1211 			rt, pktlen, rix, AH_FALSE);
1212 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1213 			ctsduration += rt->info[rix].lpAckDuration;
1214 	}
1215 
1216 	return (ctsduration);
1217 }
1218 
1219 /*
1220  * Update the given ath_buf with updated rts/cts setup and duration
1221  * values.
1222  *
1223  * To support rate lookups for each software retry, the rts/cts rate
1224  * and cts duration must be re-calculated.
1225  *
1226  * This function assumes the RTS/CTS flags have been set as needed;
1227  * mrr has been disabled; and the rate control lookup has been done.
1228  *
1229  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1230  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1231  */
1232 static void
ath_tx_set_rtscts(struct ath_softc * sc,struct ath_buf * bf)1233 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1234 {
1235 	uint16_t ctsduration = 0;
1236 	uint8_t ctsrate = 0;
1237 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1238 	uint8_t cix = 0;
1239 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1240 
1241 	/*
1242 	 * No RTS/CTS enabled? Don't bother.
1243 	 */
1244 	if ((bf->bf_state.bfs_txflags &
1245 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1246 		/* XXX is this really needed? */
1247 		bf->bf_state.bfs_ctsrate = 0;
1248 		bf->bf_state.bfs_ctsduration = 0;
1249 		return;
1250 	}
1251 
1252 	/*
1253 	 * If protection is enabled, use the protection rix control
1254 	 * rate. Otherwise use the rate0 control rate.
1255 	 */
1256 	if (bf->bf_state.bfs_doprot)
1257 		rix = sc->sc_protrix;
1258 	else
1259 		rix = bf->bf_state.bfs_rc[0].rix;
1260 
1261 	/*
1262 	 * If the raw path has hard-coded ctsrate0 to something,
1263 	 * use it.
1264 	 */
1265 	if (bf->bf_state.bfs_ctsrate0 != 0)
1266 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1267 	else
1268 		/* Control rate from above */
1269 		cix = rt->info[rix].controlRate;
1270 
1271 	/* Calculate the rtscts rate for the given cix */
1272 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1273 	    bf->bf_state.bfs_shpream);
1274 
1275 	/* The 11n chipsets do ctsduration calculations for you */
1276 	if (! ath_tx_is_11n(sc))
1277 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1278 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1279 		    rt, bf->bf_state.bfs_txflags);
1280 
1281 	/* Squirrel away in ath_buf */
1282 	bf->bf_state.bfs_ctsrate = ctsrate;
1283 	bf->bf_state.bfs_ctsduration = ctsduration;
1284 
1285 	/*
1286 	 * Must disable multi-rate retry when using RTS/CTS.
1287 	 */
1288 	if (!sc->sc_mrrprot) {
1289 		bf->bf_state.bfs_ismrr = 0;
1290 		bf->bf_state.bfs_try0 =
1291 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1292 	}
1293 }
1294 
1295 /*
1296  * Setup the descriptor chain for a normal or fast-frame
1297  * frame.
1298  *
1299  * XXX TODO: extend to include the destination hardware QCU ID.
1300  * Make sure that is correct.  Make sure that when being added
1301  * to the mcastq, the CABQ QCUID is set or things will get a bit
1302  * odd.
1303  */
1304 static void
ath_tx_setds(struct ath_softc * sc,struct ath_buf * bf)1305 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1306 {
1307 	struct ath_desc *ds = bf->bf_desc;
1308 	struct ath_hal *ah = sc->sc_ah;
1309 
1310 	if (bf->bf_state.bfs_txrate0 == 0)
1311 		DPRINTF(sc, ATH_DEBUG_XMIT,
1312 		    "%s: bf=%p, txrate0=%d\n", __func__, bf, 0);
1313 
1314 	ath_hal_setuptxdesc(ah, ds
1315 		, bf->bf_state.bfs_pktlen	/* packet length */
1316 		, bf->bf_state.bfs_hdrlen	/* header length */
1317 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1318 		, bf->bf_state.bfs_txpower	/* txpower */
1319 		, bf->bf_state.bfs_txrate0
1320 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1321 		, bf->bf_state.bfs_keyix	/* key cache index */
1322 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1323 		, bf->bf_state.bfs_txflags	/* flags */
1324 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1325 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1326 	);
1327 
1328 	/*
1329 	 * This will be overriden when the descriptor chain is written.
1330 	 */
1331 	bf->bf_lastds = ds;
1332 	bf->bf_last = bf;
1333 
1334 	/* Set rate control and descriptor chain for this frame */
1335 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1336 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1337 }
1338 
1339 /*
1340  * Do a rate lookup.
1341  *
1342  * This performs a rate lookup for the given ath_buf only if it's required.
1343  * Non-data frames and raw frames don't require it.
1344  *
1345  * This populates the primary and MRR entries; MRR values are
1346  * then disabled later on if something requires it (eg RTS/CTS on
1347  * pre-11n chipsets.
1348  *
1349  * This needs to be done before the RTS/CTS fields are calculated
1350  * as they may depend upon the rate chosen.
1351  */
1352 static void
ath_tx_do_ratelookup(struct ath_softc * sc,struct ath_buf * bf)1353 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1354 {
1355 	uint8_t rate, rix;
1356 	int try0;
1357 
1358 	if (! bf->bf_state.bfs_doratelookup)
1359 		return;
1360 
1361 	/* Get rid of any previous state */
1362 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1363 
1364 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1365 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1366 	    bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1367 
1368 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1369 	bf->bf_state.bfs_rc[0].rix = rix;
1370 	bf->bf_state.bfs_rc[0].ratecode = rate;
1371 	bf->bf_state.bfs_rc[0].tries = try0;
1372 
1373 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1374 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1375 		    bf->bf_state.bfs_rc);
1376 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1377 
1378 	sc->sc_txrix = rix;	/* for LED blinking */
1379 	sc->sc_lastdatarix = rix;	/* for fast frames */
1380 	bf->bf_state.bfs_try0 = try0;
1381 	bf->bf_state.bfs_txrate0 = rate;
1382 }
1383 
1384 /*
1385  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
1386  */
1387 static void
ath_tx_update_clrdmask(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)1388 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
1389     struct ath_buf *bf)
1390 {
1391 	struct ath_node *an = ATH_NODE(bf->bf_node);
1392 
1393 	ATH_TX_LOCK_ASSERT(sc);
1394 
1395 	if (an->clrdmask == 1) {
1396 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1397 		an->clrdmask = 0;
1398 	}
1399 }
1400 
1401 /*
1402  * Return whether this frame should be software queued or
1403  * direct dispatched.
1404  *
1405  * When doing powersave, BAR frames should be queued but other management
1406  * frames should be directly sent.
1407  *
1408  * When not doing powersave, stick BAR frames into the hardware queue
1409  * so it goes out even though the queue is paused.
1410  *
1411  * For now, management frames are also software queued by default.
1412  */
1413 static int
ath_tx_should_swq_frame(struct ath_softc * sc,struct ath_node * an,struct mbuf * m0,int * queue_to_head)1414 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
1415     struct mbuf *m0, int *queue_to_head)
1416 {
1417 	struct ieee80211_node *ni = &an->an_node;
1418 	struct ieee80211_frame *wh;
1419 	uint8_t type, subtype;
1420 
1421 	wh = mtod(m0, struct ieee80211_frame *);
1422 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1423 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1424 
1425 	(*queue_to_head) = 0;
1426 
1427 	/* If it's not in powersave - direct-dispatch BAR */
1428 	if ((ATH_NODE(ni)->an_is_powersave == 0)
1429 	    && type == IEEE80211_FC0_TYPE_CTL &&
1430 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1431 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1432 		    "%s: BAR: TX'ing direct\n", __func__);
1433 		return (0);
1434 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1435 	    && type == IEEE80211_FC0_TYPE_CTL &&
1436 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1437 		/* BAR TX whilst asleep; queue */
1438 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1439 		    "%s: swq: TX'ing\n", __func__);
1440 		(*queue_to_head) = 1;
1441 		return (1);
1442 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1443 	    && (type == IEEE80211_FC0_TYPE_MGT ||
1444 	        type == IEEE80211_FC0_TYPE_CTL)) {
1445 		/*
1446 		 * Other control/mgmt frame; bypass software queuing
1447 		 * for now!
1448 		 */
1449 		DPRINTF(sc, ATH_DEBUG_XMIT,
1450 		    "%s: %6D: Node is asleep; sending mgmt "
1451 		    "(type=%d, subtype=%d)\n",
1452 		    __func__, ni->ni_macaddr, ":", type, subtype);
1453 		return (0);
1454 	} else {
1455 		return (1);
1456 	}
1457 }
1458 
1459 
1460 /*
1461  * Transmit the given frame to the hardware.
1462  *
1463  * The frame must already be setup; rate control must already have
1464  * been done.
1465  *
1466  * XXX since the TXQ lock is being held here (and I dislike holding
1467  * it for this long when not doing software aggregation), later on
1468  * break this function into "setup_normal" and "xmit_normal". The
1469  * lock only needs to be held for the ath_tx_handoff call.
1470  *
1471  * XXX we don't update the leak count here - if we're doing
1472  * direct frame dispatch, we need to be able to do it without
1473  * decrementing the leak count (eg multicast queue frames.)
1474  */
1475 static void
ath_tx_xmit_normal(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)1476 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1477     struct ath_buf *bf)
1478 {
1479 	struct ath_node *an = ATH_NODE(bf->bf_node);
1480 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1481 
1482 	ATH_TX_LOCK_ASSERT(sc);
1483 
1484 	/*
1485 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
1486 	 * set a completion handler however it doesn't (yet) properly
1487 	 * handle the strict ordering requirements needed for normal,
1488 	 * non-aggregate session frames.
1489 	 *
1490 	 * Once this is implemented, only set CLRDMASK like this for
1491 	 * frames that must go out - eg management/raw frames.
1492 	 */
1493 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1494 
1495 	/* Setup the descriptor before handoff */
1496 	ath_tx_do_ratelookup(sc, bf);
1497 	ath_tx_calc_duration(sc, bf);
1498 	ath_tx_calc_protection(sc, bf);
1499 	ath_tx_set_rtscts(sc, bf);
1500 	ath_tx_rate_fill_rcflags(sc, bf);
1501 	ath_tx_setds(sc, bf);
1502 
1503 	/* Track per-TID hardware queue depth correctly */
1504 	tid->hwq_depth++;
1505 
1506 	/* Assign the completion handler */
1507 	bf->bf_comp = ath_tx_normal_comp;
1508 
1509 	/* Hand off to hardware */
1510 	ath_tx_handoff(sc, txq, bf);
1511 }
1512 
1513 /*
1514  * Do the basic frame setup stuff that's required before the frame
1515  * is added to a software queue.
1516  *
1517  * All frames get mostly the same treatment and it's done once.
1518  * Retransmits fiddle with things like the rate control setup,
1519  * setting the retransmit bit in the packet; doing relevant DMA/bus
1520  * syncing and relinking it (back) into the hardware TX queue.
1521  *
1522  * Note that this may cause the mbuf to be reallocated, so
1523  * m0 may not be valid.
1524  */
1525 static int
ath_tx_normal_setup(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,struct ath_txq * txq)1526 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1527     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1528 {
1529 	struct ieee80211vap *vap = ni->ni_vap;
1530 	struct ieee80211com *ic = &sc->sc_ic;
1531 	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1532 	int error, iswep, ismcast, isfrag, ismrr;
1533 	int keyix, hdrlen, pktlen, try0 = 0;
1534 	u_int8_t rix = 0, txrate = 0;
1535 	struct ath_desc *ds;
1536 	struct ieee80211_frame *wh;
1537 	u_int subtype, flags;
1538 	HAL_PKT_TYPE atype;
1539 	const HAL_RATE_TABLE *rt;
1540 	HAL_BOOL shortPreamble;
1541 	struct ath_node *an;
1542 	u_int pri;
1543 
1544 	/*
1545 	 * To ensure that both sequence numbers and the CCMP PN handling
1546 	 * is "correct", make sure that the relevant TID queue is locked.
1547 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
1548 	 * re-ordered frames to have out of order CCMP PN's, resulting
1549 	 * in many, many frame drops.
1550 	 */
1551 	ATH_TX_LOCK_ASSERT(sc);
1552 
1553 	wh = mtod(m0, struct ieee80211_frame *);
1554 	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1555 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1556 	isfrag = m0->m_flags & M_FRAG;
1557 	hdrlen = ieee80211_anyhdrsize(wh);
1558 	/*
1559 	 * Packet length must not include any
1560 	 * pad bytes; deduct them here.
1561 	 */
1562 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1563 
1564 	/* Handle encryption twiddling if needed */
1565 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1566 	    &pktlen, &keyix)) {
1567 		ieee80211_free_mbuf(m0);
1568 		return EIO;
1569 	}
1570 
1571 	/* packet header may have moved, reset our local pointer */
1572 	wh = mtod(m0, struct ieee80211_frame *);
1573 
1574 	pktlen += IEEE80211_CRC_LEN;
1575 
1576 	/*
1577 	 * Load the DMA map so any coalescing is done.  This
1578 	 * also calculates the number of descriptors we need.
1579 	 */
1580 	error = ath_tx_dmasetup(sc, bf, m0);
1581 	if (error != 0)
1582 		return error;
1583 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
1584 	bf->bf_node = ni;			/* NB: held reference */
1585 	m0 = bf->bf_m;				/* NB: may have changed */
1586 	wh = mtod(m0, struct ieee80211_frame *);
1587 
1588 	/* setup descriptors */
1589 	ds = bf->bf_desc;
1590 	rt = sc->sc_currates;
1591 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1592 
1593 	/*
1594 	 * NB: the 802.11 layer marks whether or not we should
1595 	 * use short preamble based on the current mode and
1596 	 * negotiated parameters.
1597 	 */
1598 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1599 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1600 		shortPreamble = AH_TRUE;
1601 		sc->sc_stats.ast_tx_shortpre++;
1602 	} else {
1603 		shortPreamble = AH_FALSE;
1604 	}
1605 
1606 	an = ATH_NODE(ni);
1607 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1608 	flags = 0;
1609 	ismrr = 0;				/* default no multi-rate retry*/
1610 	pri = M_WME_GETAC(m0);			/* honor classification */
1611 	/* XXX use txparams instead of fixed values */
1612 	/*
1613 	 * Calculate Atheros packet type from IEEE80211 packet header,
1614 	 * setup for rate calculations, and select h/w transmit queue.
1615 	 */
1616 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1617 	case IEEE80211_FC0_TYPE_MGT:
1618 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1619 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1620 			atype = HAL_PKT_TYPE_BEACON;
1621 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1622 			atype = HAL_PKT_TYPE_PROBE_RESP;
1623 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1624 			atype = HAL_PKT_TYPE_ATIM;
1625 		else
1626 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1627 		rix = an->an_mgmtrix;
1628 		txrate = rt->info[rix].rateCode;
1629 		if (shortPreamble)
1630 			txrate |= rt->info[rix].shortPreamble;
1631 		try0 = ATH_TXMGTTRY;
1632 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1633 		break;
1634 	case IEEE80211_FC0_TYPE_CTL:
1635 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1636 		rix = an->an_mgmtrix;
1637 		txrate = rt->info[rix].rateCode;
1638 		if (shortPreamble)
1639 			txrate |= rt->info[rix].shortPreamble;
1640 		try0 = ATH_TXMGTTRY;
1641 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1642 		break;
1643 	case IEEE80211_FC0_TYPE_DATA:
1644 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1645 		/*
1646 		 * Data frames: multicast frames go out at a fixed rate,
1647 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1648 		 * the rate control module for the rate to use.
1649 		 */
1650 		if (ismcast) {
1651 			rix = an->an_mcastrix;
1652 			txrate = rt->info[rix].rateCode;
1653 			if (shortPreamble)
1654 				txrate |= rt->info[rix].shortPreamble;
1655 			try0 = 1;
1656 		} else if (m0->m_flags & M_EAPOL) {
1657 			/* XXX? maybe always use long preamble? */
1658 			rix = an->an_mgmtrix;
1659 			txrate = rt->info[rix].rateCode;
1660 			if (shortPreamble)
1661 				txrate |= rt->info[rix].shortPreamble;
1662 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1663 		} else {
1664 			/*
1665 			 * Do rate lookup on each TX, rather than using
1666 			 * the hard-coded TX information decided here.
1667 			 */
1668 			ismrr = 1;
1669 			bf->bf_state.bfs_doratelookup = 1;
1670 		}
1671 		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1672 			flags |= HAL_TXDESC_NOACK;
1673 		break;
1674 	default:
1675 		device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1676 		    wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1677 		/* XXX statistic */
1678 		/* XXX free tx dmamap */
1679 		ieee80211_free_mbuf(m0);
1680 		return EIO;
1681 	}
1682 
1683 	/*
1684 	 * There are two known scenarios where the frame AC doesn't match
1685 	 * what the destination TXQ is.
1686 	 *
1687 	 * + non-QoS frames (eg management?) that the net80211 stack has
1688 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1689 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1690 	 *   It's quite possible that management frames should just be
1691 	 *   direct dispatched to hardware rather than go via the software
1692 	 *   queue; that should be investigated in the future.  There are
1693 	 *   some specific scenarios where this doesn't make sense, mostly
1694 	 *   surrounding ADDBA request/response - hence why that is special
1695 	 *   cased.
1696 	 *
1697 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1698 	 *   as "TXQ 11".
1699 	 *
1700 	 * This driver should eventually support separate TID and TXQ locking,
1701 	 * allowing for arbitrary AC frames to appear on arbitrary software
1702 	 * queues, being queued to the "correct" hardware queue when needed.
1703 	 */
1704 #if 0
1705 	if (txq != sc->sc_ac2q[pri]) {
1706 		DPRINTF(sc, ATH_DEBUG_XMIT,
1707 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1708 		    __func__,
1709 		    txq,
1710 		    txq->axq_qnum,
1711 		    pri,
1712 		    sc->sc_ac2q[pri],
1713 		    sc->sc_ac2q[pri]->axq_qnum);
1714 	}
1715 #endif
1716 
1717 	/*
1718 	 * Calculate miscellaneous flags.
1719 	 */
1720 	if (ismcast) {
1721 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1722 	} else if (pktlen > vap->iv_rtsthreshold &&
1723 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1724 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1725 		sc->sc_stats.ast_tx_rts++;
1726 	}
1727 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1728 		sc->sc_stats.ast_tx_noack++;
1729 #ifdef IEEE80211_SUPPORT_TDMA
1730 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1731 		DPRINTF(sc, ATH_DEBUG_TDMA,
1732 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1733 		sc->sc_stats.ast_tdma_ack++;
1734 		/* XXX free tx dmamap */
1735 		ieee80211_free_mbuf(m0);
1736 		return EIO;
1737 	}
1738 #endif
1739 
1740 #if 0
1741 	/*
1742 	 * Placeholder: if you want to transmit with the azimuth
1743 	 * timestamp in the end of the payload, here's where you
1744 	 * should set the TXDESC field.
1745 	 */
1746 	flags |= HAL_TXDESC_HWTS;
1747 #endif
1748 
1749 	/*
1750 	 * Determine if a tx interrupt should be generated for
1751 	 * this descriptor.  We take a tx interrupt to reap
1752 	 * descriptors when the h/w hits an EOL condition or
1753 	 * when the descriptor is specifically marked to generate
1754 	 * an interrupt.  We periodically mark descriptors in this
1755 	 * way to insure timely replenishing of the supply needed
1756 	 * for sending frames.  Defering interrupts reduces system
1757 	 * load and potentially allows more concurrent work to be
1758 	 * done but if done to aggressively can cause senders to
1759 	 * backup.
1760 	 *
1761 	 * NB: use >= to deal with sc_txintrperiod changing
1762 	 *     dynamically through sysctl.
1763 	 */
1764 	if (flags & HAL_TXDESC_INTREQ) {
1765 		txq->axq_intrcnt = 0;
1766 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1767 		flags |= HAL_TXDESC_INTREQ;
1768 		txq->axq_intrcnt = 0;
1769 	}
1770 
1771 	/* This point forward is actual TX bits */
1772 
1773 	/*
1774 	 * At this point we are committed to sending the frame
1775 	 * and we don't need to look at m_nextpkt; clear it in
1776 	 * case this frame is part of frag chain.
1777 	 */
1778 	m0->m_nextpkt = NULL;
1779 
1780 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1781 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1782 		    sc->sc_hwmap[rix].ieeerate, -1);
1783 
1784 	if (ieee80211_radiotap_active_vap(vap)) {
1785 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1786 		if (iswep)
1787 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1788 		if (isfrag)
1789 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1790 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1791 		sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1792 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1793 
1794 		ieee80211_radiotap_tx(vap, m0);
1795 	}
1796 
1797 	/* Blank the legacy rate array */
1798 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1799 
1800 	/*
1801 	 * ath_buf_set_rate needs at least one rate/try to setup
1802 	 * the rate scenario.
1803 	 */
1804 	bf->bf_state.bfs_rc[0].rix = rix;
1805 	bf->bf_state.bfs_rc[0].tries = try0;
1806 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1807 
1808 	/* Store the decided rate index values away */
1809 	bf->bf_state.bfs_pktlen = pktlen;
1810 	bf->bf_state.bfs_hdrlen = hdrlen;
1811 	bf->bf_state.bfs_atype = atype;
1812 	bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1813 	bf->bf_state.bfs_txrate0 = txrate;
1814 	bf->bf_state.bfs_try0 = try0;
1815 	bf->bf_state.bfs_keyix = keyix;
1816 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1817 	bf->bf_state.bfs_txflags = flags;
1818 	bf->bf_state.bfs_shpream = shortPreamble;
1819 
1820 	/* XXX this should be done in ath_tx_setrate() */
1821 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1822 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1823 	bf->bf_state.bfs_ctsduration = 0;
1824 	bf->bf_state.bfs_ismrr = ismrr;
1825 
1826 	return 0;
1827 }
1828 
1829 /*
1830  * Queue a frame to the hardware or software queue.
1831  *
1832  * This can be called by the net80211 code.
1833  *
1834  * XXX what about locking? Or, push the seqno assign into the
1835  * XXX aggregate scheduler so its serialised?
1836  *
1837  * XXX When sending management frames via ath_raw_xmit(),
1838  *     should CLRDMASK be set unconditionally?
1839  */
1840 int
ath_tx_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)1841 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1842     struct ath_buf *bf, struct mbuf *m0)
1843 {
1844 	struct ieee80211vap *vap = ni->ni_vap;
1845 	struct ath_vap *avp = ATH_VAP(vap);
1846 	int r = 0;
1847 	u_int pri;
1848 	int tid;
1849 	struct ath_txq *txq;
1850 	int ismcast;
1851 	const struct ieee80211_frame *wh;
1852 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1853 	ieee80211_seq seqno;
1854 	uint8_t type, subtype;
1855 	int queue_to_head;
1856 
1857 	ATH_TX_LOCK_ASSERT(sc);
1858 
1859 	/*
1860 	 * Determine the target hardware queue.
1861 	 *
1862 	 * For multicast frames, the txq gets overridden appropriately
1863 	 * depending upon the state of PS.
1864 	 *
1865 	 * For any other frame, we do a TID/QoS lookup inside the frame
1866 	 * to see what the TID should be. If it's a non-QoS frame, the
1867 	 * AC and TID are overridden. The TID/TXQ code assumes the
1868 	 * TID is on a predictable hardware TXQ, so we don't support
1869 	 * having a node TID queued to multiple hardware TXQs.
1870 	 * This may change in the future but would require some locking
1871 	 * fudgery.
1872 	 */
1873 	pri = ath_tx_getac(sc, m0);
1874 	tid = ath_tx_gettid(sc, m0);
1875 
1876 	txq = sc->sc_ac2q[pri];
1877 	wh = mtod(m0, struct ieee80211_frame *);
1878 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1879 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1880 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1881 
1882 	/*
1883 	 * Enforce how deep the multicast queue can grow.
1884 	 *
1885 	 * XXX duplicated in ath_raw_xmit().
1886 	 */
1887 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1888 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
1889 		    > sc->sc_txq_mcastq_maxdepth) {
1890 			sc->sc_stats.ast_tx_mcastq_overflow++;
1891 			m_freem(m0);
1892 			return (ENOBUFS);
1893 		}
1894 	}
1895 
1896 	/*
1897 	 * Enforce how deep the unicast queue can grow.
1898 	 *
1899 	 * If the node is in power save then we don't want
1900 	 * the software queue to grow too deep, or a node may
1901 	 * end up consuming all of the ath_buf entries.
1902 	 *
1903 	 * For now, only do this for DATA frames.
1904 	 *
1905 	 * We will want to cap how many management/control
1906 	 * frames get punted to the software queue so it doesn't
1907 	 * fill up.  But the correct solution isn't yet obvious.
1908 	 * In any case, this check should at least let frames pass
1909 	 * that we are direct-dispatching.
1910 	 *
1911 	 * XXX TODO: duplicate this to the raw xmit path!
1912 	 */
1913 	if (type == IEEE80211_FC0_TYPE_DATA &&
1914 	    ATH_NODE(ni)->an_is_powersave &&
1915 	    ATH_NODE(ni)->an_swq_depth >
1916 	     sc->sc_txq_node_psq_maxdepth) {
1917 		sc->sc_stats.ast_tx_node_psq_overflow++;
1918 		m_freem(m0);
1919 		return (ENOBUFS);
1920 	}
1921 
1922 	/* A-MPDU TX */
1923 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1924 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1925 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
1926 
1927 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1928 	    __func__, tid, pri, is_ampdu);
1929 
1930 	/* Set local packet state, used to queue packets to hardware */
1931 	bf->bf_state.bfs_tid = tid;
1932 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
1933 	bf->bf_state.bfs_pri = pri;
1934 
1935 #if 1
1936 	/*
1937 	 * When servicing one or more stations in power-save mode
1938 	 * (or) if there is some mcast data waiting on the mcast
1939 	 * queue (to prevent out of order delivery) multicast frames
1940 	 * must be bufferd until after the beacon.
1941 	 *
1942 	 * TODO: we should lock the mcastq before we check the length.
1943 	 */
1944 	if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
1945 		txq = &avp->av_mcastq;
1946 		/*
1947 		 * Mark the frame as eventually belonging on the CAB
1948 		 * queue, so the descriptor setup functions will
1949 		 * correctly initialise the descriptor 'qcuId' field.
1950 		 */
1951 		bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
1952 	}
1953 #endif
1954 
1955 	/* Do the generic frame setup */
1956 	/* XXX should just bzero the bf_state? */
1957 	bf->bf_state.bfs_dobaw = 0;
1958 
1959 	/* A-MPDU TX? Manually set sequence number */
1960 	/*
1961 	 * Don't do it whilst pending; the net80211 layer still
1962 	 * assigns them.
1963 	 */
1964 	if (is_ampdu_tx) {
1965 		/*
1966 		 * Always call; this function will
1967 		 * handle making sure that null data frames
1968 		 * don't get a sequence number from the current
1969 		 * TID and thus mess with the BAW.
1970 		 */
1971 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
1972 
1973 		/*
1974 		 * Don't add QoS NULL frames to the BAW.
1975 		 */
1976 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
1977 		    subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1978 			bf->bf_state.bfs_dobaw = 1;
1979 		}
1980 	}
1981 
1982 	/*
1983 	 * If needed, the sequence number has been assigned.
1984 	 * Squirrel it away somewhere easy to get to.
1985 	 */
1986 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1987 
1988 	/* Is ampdu pending? fetch the seqno and print it out */
1989 	if (is_ampdu_pending)
1990 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1991 		    "%s: tid %d: ampdu pending, seqno %d\n",
1992 		    __func__, tid, M_SEQNO_GET(m0));
1993 
1994 	/* This also sets up the DMA map */
1995 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
1996 
1997 	if (r != 0)
1998 		goto done;
1999 
2000 	/* At this point m0 could have changed! */
2001 	m0 = bf->bf_m;
2002 
2003 #if 1
2004 	/*
2005 	 * If it's a multicast frame, do a direct-dispatch to the
2006 	 * destination hardware queue. Don't bother software
2007 	 * queuing it.
2008 	 */
2009 	/*
2010 	 * If it's a BAR frame, do a direct dispatch to the
2011 	 * destination hardware queue. Don't bother software
2012 	 * queuing it, as the TID will now be paused.
2013 	 * Sending a BAR frame can occur from the net80211 txa timer
2014 	 * (ie, retries) or from the ath txtask (completion call.)
2015 	 * It queues directly to hardware because the TID is paused
2016 	 * at this point (and won't be unpaused until the BAR has
2017 	 * either been TXed successfully or max retries has been
2018 	 * reached.)
2019 	 */
2020 	/*
2021 	 * Until things are better debugged - if this node is asleep
2022 	 * and we're sending it a non-BAR frame, direct dispatch it.
2023 	 * Why? Because we need to figure out what's actually being
2024 	 * sent - eg, during reassociation/reauthentication after
2025 	 * the node (last) disappeared whilst asleep, the driver should
2026 	 * have unpaused/unsleep'ed the node.  So until that is
2027 	 * sorted out, use this workaround.
2028 	 */
2029 	if (txq == &avp->av_mcastq) {
2030 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2031 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
2032 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2033 		ath_tx_xmit_normal(sc, txq, bf);
2034 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2035 	    &queue_to_head)) {
2036 		ath_tx_swq(sc, ni, txq, queue_to_head, bf);
2037 	} else {
2038 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2039 		ath_tx_xmit_normal(sc, txq, bf);
2040 	}
2041 #else
2042 	/*
2043 	 * For now, since there's no software queue,
2044 	 * direct-dispatch to the hardware.
2045 	 */
2046 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2047 	/*
2048 	 * Update the current leak count if
2049 	 * we're leaking frames; and set the
2050 	 * MORE flag as appropriate.
2051 	 */
2052 	ath_tx_leak_count_update(sc, tid, bf);
2053 	ath_tx_xmit_normal(sc, txq, bf);
2054 #endif
2055 done:
2056 	return 0;
2057 }
2058 
2059 static int
ath_tx_raw_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,const struct ieee80211_bpf_params * params)2060 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2061 	struct ath_buf *bf, struct mbuf *m0,
2062 	const struct ieee80211_bpf_params *params)
2063 {
2064 	struct ieee80211com *ic = &sc->sc_ic;
2065 	struct ieee80211vap *vap = ni->ni_vap;
2066 	int error, ismcast, ismrr;
2067 	int keyix, hdrlen, pktlen, try0, txantenna;
2068 	u_int8_t rix, txrate;
2069 	struct ieee80211_frame *wh;
2070 	u_int flags;
2071 	HAL_PKT_TYPE atype;
2072 	const HAL_RATE_TABLE *rt;
2073 	struct ath_desc *ds;
2074 	u_int pri;
2075 	int o_tid = -1;
2076 	int do_override;
2077 	uint8_t type, subtype;
2078 	int queue_to_head;
2079 	struct ath_node *an = ATH_NODE(ni);
2080 
2081 	ATH_TX_LOCK_ASSERT(sc);
2082 
2083 	wh = mtod(m0, struct ieee80211_frame *);
2084 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2085 	hdrlen = ieee80211_anyhdrsize(wh);
2086 	/*
2087 	 * Packet length must not include any
2088 	 * pad bytes; deduct them here.
2089 	 */
2090 	/* XXX honor IEEE80211_BPF_DATAPAD */
2091 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2092 
2093 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2094 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2095 
2096 	ATH_KTR(sc, ATH_KTR_TX, 2,
2097 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
2098 
2099 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2100 	    __func__, ismcast);
2101 
2102 	pri = params->ibp_pri & 3;
2103 	/* Override pri if the frame isn't a QoS one */
2104 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2105 		pri = ath_tx_getac(sc, m0);
2106 
2107 	/* XXX If it's an ADDBA, override the correct queue */
2108 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
2109 
2110 	/* Map ADDBA to the correct priority */
2111 	if (do_override) {
2112 #if 0
2113 		DPRINTF(sc, ATH_DEBUG_XMIT,
2114 		    "%s: overriding tid %d pri %d -> %d\n",
2115 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
2116 #endif
2117 		pri = TID_TO_WME_AC(o_tid);
2118 	}
2119 
2120 	/* Handle encryption twiddling if needed */
2121 	if (! ath_tx_tag_crypto(sc, ni,
2122 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2123 	    &hdrlen, &pktlen, &keyix)) {
2124 		ieee80211_free_mbuf(m0);
2125 		return EIO;
2126 	}
2127 	/* packet header may have moved, reset our local pointer */
2128 	wh = mtod(m0, struct ieee80211_frame *);
2129 
2130 	/* Do the generic frame setup */
2131 	/* XXX should just bzero the bf_state? */
2132 	bf->bf_state.bfs_dobaw = 0;
2133 
2134 	error = ath_tx_dmasetup(sc, bf, m0);
2135 	if (error != 0)
2136 		return error;
2137 	m0 = bf->bf_m;				/* NB: may have changed */
2138 	wh = mtod(m0, struct ieee80211_frame *);
2139 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
2140 	bf->bf_node = ni;			/* NB: held reference */
2141 
2142 	/* Always enable CLRDMASK for raw frames for now.. */
2143 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2144 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2145 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2146 		flags |= HAL_TXDESC_RTSENA;
2147 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2148 		/* XXX assume 11g/11n protection? */
2149 		bf->bf_state.bfs_doprot = 1;
2150 		flags |= HAL_TXDESC_CTSENA;
2151 	}
2152 	/* XXX leave ismcast to injector? */
2153 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2154 		flags |= HAL_TXDESC_NOACK;
2155 
2156 	rt = sc->sc_currates;
2157 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2158 
2159 	/* Fetch first rate information */
2160 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2161 	try0 = params->ibp_try0;
2162 
2163 	/*
2164 	 * Override EAPOL rate as appropriate.
2165 	 */
2166 	if (m0->m_flags & M_EAPOL) {
2167 		/* XXX? maybe always use long preamble? */
2168 		rix = an->an_mgmtrix;
2169 		try0 = ATH_TXMAXTRY;	/* XXX?too many? */
2170 	}
2171 
2172 	txrate = rt->info[rix].rateCode;
2173 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2174 		txrate |= rt->info[rix].shortPreamble;
2175 	sc->sc_txrix = rix;
2176 	ismrr = (params->ibp_try1 != 0);
2177 	txantenna = params->ibp_pri >> 2;
2178 	if (txantenna == 0)			/* XXX? */
2179 		txantenna = sc->sc_txantenna;
2180 
2181 	/*
2182 	 * Since ctsrate is fixed, store it away for later
2183 	 * use when the descriptor fields are being set.
2184 	 */
2185 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2186 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
2187 
2188 	/*
2189 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2190 	 * set the sequence number, duration, etc.
2191 	 */
2192 	atype = HAL_PKT_TYPE_PSPOLL;
2193 
2194 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2195 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2196 		    sc->sc_hwmap[rix].ieeerate, -1);
2197 
2198 	if (ieee80211_radiotap_active_vap(vap)) {
2199 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2200 		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2201 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2202 		if (m0->m_flags & M_FRAG)
2203 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2204 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2205 		sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
2206 		    ieee80211_get_node_txpower(ni));
2207 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2208 
2209 		ieee80211_radiotap_tx(vap, m0);
2210 	}
2211 
2212 	/*
2213 	 * Formulate first tx descriptor with tx controls.
2214 	 */
2215 	ds = bf->bf_desc;
2216 	/* XXX check return value? */
2217 
2218 	/* Store the decided rate index values away */
2219 	bf->bf_state.bfs_pktlen = pktlen;
2220 	bf->bf_state.bfs_hdrlen = hdrlen;
2221 	bf->bf_state.bfs_atype = atype;
2222 	bf->bf_state.bfs_txpower = MIN(params->ibp_power,
2223 	    ieee80211_get_node_txpower(ni));
2224 	bf->bf_state.bfs_txrate0 = txrate;
2225 	bf->bf_state.bfs_try0 = try0;
2226 	bf->bf_state.bfs_keyix = keyix;
2227 	bf->bf_state.bfs_txantenna = txantenna;
2228 	bf->bf_state.bfs_txflags = flags;
2229 	bf->bf_state.bfs_shpream =
2230 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2231 
2232 	/* Set local packet state, used to queue packets to hardware */
2233 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2234 	bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
2235 	bf->bf_state.bfs_pri = pri;
2236 
2237 	/* XXX this should be done in ath_tx_setrate() */
2238 	bf->bf_state.bfs_ctsrate = 0;
2239 	bf->bf_state.bfs_ctsduration = 0;
2240 	bf->bf_state.bfs_ismrr = ismrr;
2241 
2242 	/* Blank the legacy rate array */
2243 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2244 
2245 	bf->bf_state.bfs_rc[0].rix = rix;
2246 	bf->bf_state.bfs_rc[0].tries = try0;
2247 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2248 
2249 	if (ismrr) {
2250 		int rix;
2251 
2252 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2253 		bf->bf_state.bfs_rc[1].rix = rix;
2254 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2255 
2256 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2257 		bf->bf_state.bfs_rc[2].rix = rix;
2258 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2259 
2260 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2261 		bf->bf_state.bfs_rc[3].rix = rix;
2262 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2263 	}
2264 	/*
2265 	 * All the required rate control decisions have been made;
2266 	 * fill in the rc flags.
2267 	 */
2268 	ath_tx_rate_fill_rcflags(sc, bf);
2269 
2270 	/* NB: no buffered multicast in power save support */
2271 
2272 	/*
2273 	 * If we're overiding the ADDBA destination, dump directly
2274 	 * into the hardware queue, right after any pending
2275 	 * frames to that node are.
2276 	 */
2277 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2278 	    __func__, do_override);
2279 
2280 #if 1
2281 	/*
2282 	 * Put addba frames in the right place in the right TID/HWQ.
2283 	 */
2284 	if (do_override) {
2285 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2286 		/*
2287 		 * XXX if it's addba frames, should we be leaking
2288 		 * them out via the frame leak method?
2289 		 * XXX for now let's not risk it; but we may wish
2290 		 * to investigate this later.
2291 		 */
2292 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2293 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2294 	    &queue_to_head)) {
2295 		/* Queue to software queue */
2296 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
2297 	} else {
2298 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2299 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2300 	}
2301 #else
2302 	/* Direct-dispatch to the hardware */
2303 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2304 	/*
2305 	 * Update the current leak count if
2306 	 * we're leaking frames; and set the
2307 	 * MORE flag as appropriate.
2308 	 */
2309 	ath_tx_leak_count_update(sc, tid, bf);
2310 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2311 #endif
2312 	return 0;
2313 }
2314 
2315 /*
2316  * Send a raw frame.
2317  *
2318  * This can be called by net80211.
2319  */
2320 int
ath_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)2321 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2322 	const struct ieee80211_bpf_params *params)
2323 {
2324 	struct ieee80211com *ic = ni->ni_ic;
2325 	struct ath_softc *sc = ic->ic_softc;
2326 	struct ath_buf *bf;
2327 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2328 	int error = 0;
2329 
2330 	ATH_PCU_LOCK(sc);
2331 	if (sc->sc_inreset_cnt > 0) {
2332 		DPRINTF(sc, ATH_DEBUG_XMIT,
2333 		    "%s: sc_inreset_cnt > 0; bailing\n", __func__);
2334 		error = EIO;
2335 		ATH_PCU_UNLOCK(sc);
2336 		goto badbad;
2337 	}
2338 	sc->sc_txstart_cnt++;
2339 	ATH_PCU_UNLOCK(sc);
2340 
2341 	/* Wake the hardware up already */
2342 	ATH_LOCK(sc);
2343 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
2344 	ATH_UNLOCK(sc);
2345 
2346 	ATH_TX_LOCK(sc);
2347 
2348 	if (!sc->sc_running || sc->sc_invalid) {
2349 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d",
2350 		    __func__, sc->sc_running, sc->sc_invalid);
2351 		m_freem(m);
2352 		error = ENETDOWN;
2353 		goto bad;
2354 	}
2355 
2356 	/*
2357 	 * Enforce how deep the multicast queue can grow.
2358 	 *
2359 	 * XXX duplicated in ath_tx_start().
2360 	 */
2361 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2362 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
2363 		    > sc->sc_txq_mcastq_maxdepth) {
2364 			sc->sc_stats.ast_tx_mcastq_overflow++;
2365 			error = ENOBUFS;
2366 		}
2367 
2368 		if (error != 0) {
2369 			m_freem(m);
2370 			goto bad;
2371 		}
2372 	}
2373 
2374 	/*
2375 	 * Grab a TX buffer and associated resources.
2376 	 */
2377 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2378 	if (bf == NULL) {
2379 		sc->sc_stats.ast_tx_nobuf++;
2380 		m_freem(m);
2381 		error = ENOBUFS;
2382 		goto bad;
2383 	}
2384 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
2385 	    m, params,  bf);
2386 
2387 	if (params == NULL) {
2388 		/*
2389 		 * Legacy path; interpret frame contents to decide
2390 		 * precisely how to send the frame.
2391 		 */
2392 		if (ath_tx_start(sc, ni, bf, m)) {
2393 			error = EIO;		/* XXX */
2394 			goto bad2;
2395 		}
2396 	} else {
2397 		/*
2398 		 * Caller supplied explicit parameters to use in
2399 		 * sending the frame.
2400 		 */
2401 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2402 			error = EIO;		/* XXX */
2403 			goto bad2;
2404 		}
2405 	}
2406 	sc->sc_wd_timer = 5;
2407 	sc->sc_stats.ast_tx_raw++;
2408 
2409 	/*
2410 	 * Update the TIM - if there's anything queued to the
2411 	 * software queue and power save is enabled, we should
2412 	 * set the TIM.
2413 	 */
2414 	ath_tx_update_tim(sc, ni, 1);
2415 
2416 	ATH_TX_UNLOCK(sc);
2417 
2418 	ATH_PCU_LOCK(sc);
2419 	sc->sc_txstart_cnt--;
2420 	ATH_PCU_UNLOCK(sc);
2421 
2422 
2423 	/* Put the hardware back to sleep if required */
2424 	ATH_LOCK(sc);
2425 	ath_power_restore_power_state(sc);
2426 	ATH_UNLOCK(sc);
2427 
2428 	return 0;
2429 
2430 bad2:
2431 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
2432 	    "bf=%p",
2433 	    m,
2434 	    params,
2435 	    bf);
2436 	ATH_TXBUF_LOCK(sc);
2437 	ath_returnbuf_head(sc, bf);
2438 	ATH_TXBUF_UNLOCK(sc);
2439 
2440 bad:
2441 	ATH_TX_UNLOCK(sc);
2442 
2443 	ATH_PCU_LOCK(sc);
2444 	sc->sc_txstart_cnt--;
2445 	ATH_PCU_UNLOCK(sc);
2446 
2447 	/* Put the hardware back to sleep if required */
2448 	ATH_LOCK(sc);
2449 	ath_power_restore_power_state(sc);
2450 	ATH_UNLOCK(sc);
2451 
2452 badbad:
2453 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
2454 	    m, params);
2455 	sc->sc_stats.ast_tx_raw_fail++;
2456 
2457 	return error;
2458 }
2459 
2460 /* Some helper functions */
2461 
2462 /*
2463  * ADDBA (and potentially others) need to be placed in the same
2464  * hardware queue as the TID/node it's relating to. This is so
2465  * it goes out after any pending non-aggregate frames to the
2466  * same node/TID.
2467  *
2468  * If this isn't done, the ADDBA can go out before the frames
2469  * queued in hardware. Even though these frames have a sequence
2470  * number -earlier- than the ADDBA can be transmitted (but
2471  * no frames whose sequence numbers are after the ADDBA should
2472  * be!) they'll arrive after the ADDBA - and the receiving end
2473  * will simply drop them as being out of the BAW.
2474  *
2475  * The frames can't be appended to the TID software queue - it'll
2476  * never be sent out. So these frames have to be directly
2477  * dispatched to the hardware, rather than queued in software.
2478  * So if this function returns true, the TXQ has to be
2479  * overridden and it has to be directly dispatched.
2480  *
2481  * It's a dirty hack, but someone's gotta do it.
2482  */
2483 
2484 /*
2485  * XXX doesn't belong here!
2486  */
2487 static int
ieee80211_is_action(struct ieee80211_frame * wh)2488 ieee80211_is_action(struct ieee80211_frame *wh)
2489 {
2490 	/* Type: Management frame? */
2491 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2492 	    IEEE80211_FC0_TYPE_MGT)
2493 		return 0;
2494 
2495 	/* Subtype: Action frame? */
2496 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2497 	    IEEE80211_FC0_SUBTYPE_ACTION)
2498 		return 0;
2499 
2500 	return 1;
2501 }
2502 
2503 #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
2504 /*
2505  * Return an alternate TID for ADDBA request frames.
2506  *
2507  * Yes, this likely should be done in the net80211 layer.
2508  */
2509 static int
ath_tx_action_frame_override_queue(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int * tid)2510 ath_tx_action_frame_override_queue(struct ath_softc *sc,
2511     struct ieee80211_node *ni,
2512     struct mbuf *m0, int *tid)
2513 {
2514 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2515 	struct ieee80211_action_ba_addbarequest *ia;
2516 	uint8_t *frm;
2517 	uint16_t baparamset;
2518 
2519 	/* Not action frame? Bail */
2520 	if (! ieee80211_is_action(wh))
2521 		return 0;
2522 
2523 	/* XXX Not needed for frames we send? */
2524 #if 0
2525 	/* Correct length? */
2526 	if (! ieee80211_parse_action(ni, m))
2527 		return 0;
2528 #endif
2529 
2530 	/* Extract out action frame */
2531 	frm = (u_int8_t *)&wh[1];
2532 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2533 
2534 	/* Not ADDBA? Bail */
2535 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2536 		return 0;
2537 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2538 		return 0;
2539 
2540 	/* Extract TID, return it */
2541 	baparamset = le16toh(ia->rq_baparamset);
2542 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2543 
2544 	return 1;
2545 }
2546 #undef	MS
2547 
2548 /* Per-node software queue operations */
2549 
2550 /*
2551  * Add the current packet to the given BAW.
2552  * It is assumed that the current packet
2553  *
2554  * + fits inside the BAW;
2555  * + already has had a sequence number allocated.
2556  *
2557  * Since the BAW status may be modified by both the ath task and
2558  * the net80211/ifnet contexts, the TID must be locked.
2559  */
2560 void
ath_tx_addto_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)2561 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2562     struct ath_tid *tid, struct ath_buf *bf)
2563 {
2564 	int index, cindex;
2565 	struct ieee80211_tx_ampdu *tap;
2566 
2567 	ATH_TX_LOCK_ASSERT(sc);
2568 
2569 	if (bf->bf_state.bfs_isretried)
2570 		return;
2571 
2572 	tap = ath_tx_get_tx_tid(an, tid->tid);
2573 
2574 	if (! bf->bf_state.bfs_dobaw) {
2575 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2576 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
2577 		    __func__, SEQNO(bf->bf_state.bfs_seqno),
2578 		    tap->txa_start, tap->txa_wnd);
2579 	}
2580 
2581 	if (bf->bf_state.bfs_addedbaw)
2582 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2583 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2584 		    "baw head=%d tail=%d\n",
2585 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2586 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2587 		    tid->baw_tail);
2588 
2589 	/*
2590 	 * Verify that the given sequence number is not outside of the
2591 	 * BAW.  Complain loudly if that's the case.
2592 	 */
2593 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2594 	    SEQNO(bf->bf_state.bfs_seqno))) {
2595 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2596 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2597 		    "baw head=%d tail=%d\n",
2598 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2599 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2600 		    tid->baw_tail);
2601 	}
2602 
2603 	/*
2604 	 * ni->ni_txseqs[] is the currently allocated seqno.
2605 	 * the txa state contains the current baw start.
2606 	 */
2607 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2608 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2609 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2610 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2611 	    "baw head=%d tail=%d\n",
2612 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2613 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2614 	    tid->baw_tail);
2615 
2616 
2617 #if 0
2618 	assert(tid->tx_buf[cindex] == NULL);
2619 #endif
2620 	if (tid->tx_buf[cindex] != NULL) {
2621 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2622 		    "%s: ba packet dup (index=%d, cindex=%d, "
2623 		    "head=%d, tail=%d)\n",
2624 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2625 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2626 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2627 		    __func__,
2628 		    tid->tx_buf[cindex],
2629 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2630 		    bf,
2631 		    SEQNO(bf->bf_state.bfs_seqno)
2632 		);
2633 	}
2634 	tid->tx_buf[cindex] = bf;
2635 
2636 	if (index >= ((tid->baw_tail - tid->baw_head) &
2637 	    (ATH_TID_MAX_BUFS - 1))) {
2638 		tid->baw_tail = cindex;
2639 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2640 	}
2641 }
2642 
2643 /*
2644  * Flip the BAW buffer entry over from the existing one to the new one.
2645  *
2646  * When software retransmitting a (sub-)frame, it is entirely possible that
2647  * the frame ath_buf is marked as BUSY and can't be immediately reused.
2648  * In that instance the buffer is cloned and the new buffer is used for
2649  * retransmit. We thus need to update the ath_buf slot in the BAW buf
2650  * tracking array to maintain consistency.
2651  */
2652 static void
ath_tx_switch_baw_buf(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * old_bf,struct ath_buf * new_bf)2653 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2654     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2655 {
2656 	int index, cindex;
2657 	struct ieee80211_tx_ampdu *tap;
2658 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2659 
2660 	ATH_TX_LOCK_ASSERT(sc);
2661 
2662 	tap = ath_tx_get_tx_tid(an, tid->tid);
2663 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2664 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2665 
2666 	/*
2667 	 * Just warn for now; if it happens then we should find out
2668 	 * about it. It's highly likely the aggregation session will
2669 	 * soon hang.
2670 	 */
2671 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2672 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2673 		    "%s: retransmitted buffer"
2674 		    " has mismatching seqno's, BA session may hang.\n",
2675 		    __func__);
2676 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2677 		    "%s: old seqno=%d, new_seqno=%d\n", __func__,
2678 		    old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno);
2679 	}
2680 
2681 	if (tid->tx_buf[cindex] != old_bf) {
2682 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2683 		    "%s: ath_buf pointer incorrect; "
2684 		    " has m BA session may hang.\n", __func__);
2685 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2686 		    "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf);
2687 	}
2688 
2689 	tid->tx_buf[cindex] = new_bf;
2690 }
2691 
2692 /*
2693  * seq_start - left edge of BAW
2694  * seq_next - current/next sequence number to allocate
2695  *
2696  * Since the BAW status may be modified by both the ath task and
2697  * the net80211/ifnet contexts, the TID must be locked.
2698  */
2699 static void
ath_tx_update_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,const struct ath_buf * bf)2700 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2701     struct ath_tid *tid, const struct ath_buf *bf)
2702 {
2703 	int index, cindex;
2704 	struct ieee80211_tx_ampdu *tap;
2705 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2706 
2707 	ATH_TX_LOCK_ASSERT(sc);
2708 
2709 	tap = ath_tx_get_tx_tid(an, tid->tid);
2710 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2711 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2712 
2713 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2714 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2715 	    "baw head=%d, tail=%d\n",
2716 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2717 	    cindex, tid->baw_head, tid->baw_tail);
2718 
2719 	/*
2720 	 * If this occurs then we have a big problem - something else
2721 	 * has slid tap->txa_start along without updating the BAW
2722 	 * tracking start/end pointers. Thus the TX BAW state is now
2723 	 * completely busted.
2724 	 *
2725 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2726 	 * it's quite possible that a cloned buffer is making its way
2727 	 * here and causing it to fire off. Disable TDMA for now.
2728 	 */
2729 	if (tid->tx_buf[cindex] != bf) {
2730 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2731 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2732 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
2733 		    tid->tx_buf[cindex],
2734 		    (tid->tx_buf[cindex] != NULL) ?
2735 		      SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2736 	}
2737 
2738 	tid->tx_buf[cindex] = NULL;
2739 
2740 	while (tid->baw_head != tid->baw_tail &&
2741 	    !tid->tx_buf[tid->baw_head]) {
2742 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2743 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2744 	}
2745 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2746 	    "%s: tid=%d: baw is now %d:%d, baw head=%d\n",
2747 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head);
2748 }
2749 
2750 static void
ath_tx_leak_count_update(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)2751 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
2752     struct ath_buf *bf)
2753 {
2754 	struct ieee80211_frame *wh;
2755 
2756 	ATH_TX_LOCK_ASSERT(sc);
2757 
2758 	if (tid->an->an_leak_count > 0) {
2759 		wh = mtod(bf->bf_m, struct ieee80211_frame *);
2760 
2761 		/*
2762 		 * Update MORE based on the software/net80211 queue states.
2763 		 */
2764 		if ((tid->an->an_stack_psq > 0)
2765 		    || (tid->an->an_swq_depth > 0))
2766 			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
2767 		else
2768 			wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
2769 
2770 		DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
2771 		    "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
2772 		    __func__,
2773 		    tid->an->an_node.ni_macaddr,
2774 		    ":",
2775 		    tid->an->an_leak_count,
2776 		    tid->an->an_stack_psq,
2777 		    tid->an->an_swq_depth,
2778 		    !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
2779 
2780 		/*
2781 		 * Re-sync the underlying buffer.
2782 		 */
2783 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2784 		    BUS_DMASYNC_PREWRITE);
2785 
2786 		tid->an->an_leak_count --;
2787 	}
2788 }
2789 
2790 static int
ath_tx_tid_can_tx_or_sched(struct ath_softc * sc,struct ath_tid * tid)2791 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
2792 {
2793 
2794 	ATH_TX_LOCK_ASSERT(sc);
2795 
2796 	if (tid->an->an_leak_count > 0) {
2797 		return (1);
2798 	}
2799 	if (tid->paused)
2800 		return (0);
2801 	return (1);
2802 }
2803 
2804 /*
2805  * Mark the current node/TID as ready to TX.
2806  *
2807  * This is done to make it easy for the software scheduler to
2808  * find which nodes have data to send.
2809  *
2810  * The TXQ lock must be held.
2811  */
2812 void
ath_tx_tid_sched(struct ath_softc * sc,struct ath_tid * tid)2813 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2814 {
2815 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2816 
2817 	ATH_TX_LOCK_ASSERT(sc);
2818 
2819 	/*
2820 	 * If we are leaking out a frame to this destination
2821 	 * for PS-POLL, ensure that we allow scheduling to
2822 	 * occur.
2823 	 */
2824 	if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2825 		return;		/* paused, can't schedule yet */
2826 
2827 	if (tid->sched)
2828 		return;		/* already scheduled */
2829 
2830 	tid->sched = 1;
2831 
2832 #if 0
2833 	/*
2834 	 * If this is a sleeping node we're leaking to, given
2835 	 * it a higher priority.  This is so bad for QoS it hurts.
2836 	 */
2837 	if (tid->an->an_leak_count) {
2838 		TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
2839 	} else {
2840 		TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2841 	}
2842 #endif
2843 
2844 	/*
2845 	 * We can't do the above - it'll confuse the TXQ software
2846 	 * scheduler which will keep checking the _head_ TID
2847 	 * in the list to see if it has traffic.  If we queue
2848 	 * a TID to the head of the list and it doesn't transmit,
2849 	 * we'll check it again.
2850 	 *
2851 	 * So, get the rest of this leaking frames support working
2852 	 * and reliable first and _then_ optimise it so they're
2853 	 * pushed out in front of any other pending software
2854 	 * queued nodes.
2855 	 */
2856 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2857 }
2858 
2859 /*
2860  * Mark the current node as no longer needing to be polled for
2861  * TX packets.
2862  *
2863  * The TXQ lock must be held.
2864  */
2865 static void
ath_tx_tid_unsched(struct ath_softc * sc,struct ath_tid * tid)2866 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2867 {
2868 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2869 
2870 	ATH_TX_LOCK_ASSERT(sc);
2871 
2872 	if (tid->sched == 0)
2873 		return;
2874 
2875 	tid->sched = 0;
2876 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2877 }
2878 
2879 /*
2880  * Assign a sequence number manually to the given frame.
2881  *
2882  * This should only be called for A-MPDU TX frames.
2883  */
2884 static ieee80211_seq
ath_tx_tid_seqno_assign(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)2885 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2886     struct ath_buf *bf, struct mbuf *m0)
2887 {
2888 	struct ieee80211_frame *wh;
2889 	int tid, pri;
2890 	ieee80211_seq seqno;
2891 	uint8_t subtype;
2892 
2893 	/* TID lookup */
2894 	wh = mtod(m0, struct ieee80211_frame *);
2895 	pri = M_WME_GETAC(m0);			/* honor classification */
2896 	tid = WME_AC_TO_TID(pri);
2897 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2898 	    __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2899 
2900 	/* XXX Is it a control frame? Ignore */
2901 
2902 	/* Does the packet require a sequence number? */
2903 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2904 		return -1;
2905 
2906 	ATH_TX_LOCK_ASSERT(sc);
2907 
2908 	/*
2909 	 * Is it a QOS NULL Data frame? Give it a sequence number from
2910 	 * the default TID (IEEE80211_NONQOS_TID.)
2911 	 *
2912 	 * The RX path of everything I've looked at doesn't include the NULL
2913 	 * data frame sequence number in the aggregation state updates, so
2914 	 * assigning it a sequence number there will cause a BAW hole on the
2915 	 * RX side.
2916 	 */
2917 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2918 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2919 		/* XXX no locking for this TID? This is a bit of a problem. */
2920 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2921 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2922 	} else {
2923 		/* Manually assign sequence number */
2924 		seqno = ni->ni_txseqs[tid];
2925 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2926 	}
2927 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2928 	M_SEQNO_SET(m0, seqno);
2929 
2930 	/* Return so caller can do something with it if needed */
2931 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s:  -> seqno=%d\n", __func__, seqno);
2932 	return seqno;
2933 }
2934 
2935 /*
2936  * Attempt to direct dispatch an aggregate frame to hardware.
2937  * If the frame is out of BAW, queue.
2938  * Otherwise, schedule it as a single frame.
2939  */
2940 static void
ath_tx_xmit_aggr(struct ath_softc * sc,struct ath_node * an,struct ath_txq * txq,struct ath_buf * bf)2941 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
2942     struct ath_txq *txq, struct ath_buf *bf)
2943 {
2944 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2945 	struct ieee80211_tx_ampdu *tap;
2946 
2947 	ATH_TX_LOCK_ASSERT(sc);
2948 
2949 	tap = ath_tx_get_tx_tid(an, tid->tid);
2950 
2951 	/* paused? queue */
2952 	if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
2953 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2954 		/* XXX don't sched - we're paused! */
2955 		return;
2956 	}
2957 
2958 	/* outside baw? queue */
2959 	if (bf->bf_state.bfs_dobaw &&
2960 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2961 	    SEQNO(bf->bf_state.bfs_seqno)))) {
2962 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2963 		ath_tx_tid_sched(sc, tid);
2964 		return;
2965 	}
2966 
2967 	/*
2968 	 * This is a temporary check and should be removed once
2969 	 * all the relevant code paths have been fixed.
2970 	 *
2971 	 * During aggregate retries, it's possible that the head
2972 	 * frame will fail (which has the bfs_aggr and bfs_nframes
2973 	 * fields set for said aggregate) and will be retried as
2974 	 * a single frame.  In this instance, the values should
2975 	 * be reset or the completion code will get upset with you.
2976 	 */
2977 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
2978 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
2979 		    "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__,
2980 		    bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes);
2981 		bf->bf_state.bfs_aggr = 0;
2982 		bf->bf_state.bfs_nframes = 1;
2983 	}
2984 
2985 	/* Update CLRDMASK just before this frame is queued */
2986 	ath_tx_update_clrdmask(sc, tid, bf);
2987 
2988 	/* Direct dispatch to hardware */
2989 	ath_tx_do_ratelookup(sc, bf);
2990 	ath_tx_calc_duration(sc, bf);
2991 	ath_tx_calc_protection(sc, bf);
2992 	ath_tx_set_rtscts(sc, bf);
2993 	ath_tx_rate_fill_rcflags(sc, bf);
2994 	ath_tx_setds(sc, bf);
2995 
2996 	/* Statistics */
2997 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2998 
2999 	/* Track per-TID hardware queue depth correctly */
3000 	tid->hwq_depth++;
3001 
3002 	/* Add to BAW */
3003 	if (bf->bf_state.bfs_dobaw) {
3004 		ath_tx_addto_baw(sc, an, tid, bf);
3005 		bf->bf_state.bfs_addedbaw = 1;
3006 	}
3007 
3008 	/* Set completion handler, multi-frame aggregate or not */
3009 	bf->bf_comp = ath_tx_aggr_comp;
3010 
3011 	/*
3012 	 * Update the current leak count if
3013 	 * we're leaking frames; and set the
3014 	 * MORE flag as appropriate.
3015 	 */
3016 	ath_tx_leak_count_update(sc, tid, bf);
3017 
3018 	/* Hand off to hardware */
3019 	ath_tx_handoff(sc, txq, bf);
3020 }
3021 
3022 /*
3023  * Attempt to send the packet.
3024  * If the queue isn't busy, direct-dispatch.
3025  * If the queue is busy enough, queue the given packet on the
3026  *  relevant software queue.
3027  */
3028 void
ath_tx_swq(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_txq * txq,int queue_to_head,struct ath_buf * bf)3029 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
3030     struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3031 {
3032 	struct ath_node *an = ATH_NODE(ni);
3033 	struct ieee80211_frame *wh;
3034 	struct ath_tid *atid;
3035 	int pri, tid;
3036 	struct mbuf *m0 = bf->bf_m;
3037 
3038 	ATH_TX_LOCK_ASSERT(sc);
3039 
3040 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
3041 	wh = mtod(m0, struct ieee80211_frame *);
3042 	pri = ath_tx_getac(sc, m0);
3043 	tid = ath_tx_gettid(sc, m0);
3044 	atid = &an->an_tid[tid];
3045 
3046 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3047 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3048 
3049 	/* Set local packet state, used to queue packets to hardware */
3050 	/* XXX potentially duplicate info, re-check */
3051 	bf->bf_state.bfs_tid = tid;
3052 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3053 	bf->bf_state.bfs_pri = pri;
3054 
3055 	/*
3056 	 * If the hardware queue isn't busy, queue it directly.
3057 	 * If the hardware queue is busy, queue it.
3058 	 * If the TID is paused or the traffic it outside BAW, software
3059 	 * queue it.
3060 	 *
3061 	 * If the node is in power-save and we're leaking a frame,
3062 	 * leak a single frame.
3063 	 */
3064 	if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3065 		/* TID is paused, queue */
3066 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
3067 		/*
3068 		 * If the caller requested that it be sent at a high
3069 		 * priority, queue it at the head of the list.
3070 		 */
3071 		if (queue_to_head)
3072 			ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3073 		else
3074 			ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3075 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
3076 		/* AMPDU pending; queue */
3077 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
3078 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3079 		/* XXX sched? */
3080 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
3081 		/* AMPDU running, attempt direct dispatch if possible */
3082 
3083 		/*
3084 		 * Always queue the frame to the tail of the list.
3085 		 */
3086 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3087 
3088 		/*
3089 		 * If the hardware queue isn't busy, direct dispatch
3090 		 * the head frame in the list.  Don't schedule the
3091 		 * TID - let it build some more frames first?
3092 		 *
3093 		 * When running A-MPDU, always just check the hardware
3094 		 * queue depth against the aggregate frame limit.
3095 		 * We don't want to burst a large number of single frames
3096 		 * out to the hardware; we want to aggressively hold back.
3097 		 *
3098 		 * Otherwise, schedule the TID.
3099 		 */
3100 		/* XXX TXQ locking */
3101 		if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_aggr) {
3102 			bf = ATH_TID_FIRST(atid);
3103 			ATH_TID_REMOVE(atid, bf, bf_list);
3104 
3105 			/*
3106 			 * Ensure it's definitely treated as a non-AMPDU
3107 			 * frame - this information may have been left
3108 			 * over from a previous attempt.
3109 			 */
3110 			bf->bf_state.bfs_aggr = 0;
3111 			bf->bf_state.bfs_nframes = 1;
3112 
3113 			/* Queue to the hardware */
3114 			ath_tx_xmit_aggr(sc, an, txq, bf);
3115 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3116 			    "%s: xmit_aggr\n",
3117 			    __func__);
3118 		} else {
3119 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3120 			    "%s: ampdu; swq'ing\n",
3121 			    __func__);
3122 
3123 			ath_tx_tid_sched(sc, atid);
3124 		}
3125 	/*
3126 	 * If we're not doing A-MPDU, be prepared to direct dispatch
3127 	 * up to both limits if possible.  This particular corner
3128 	 * case may end up with packet starvation between aggregate
3129 	 * traffic and non-aggregate traffic: we want to ensure
3130 	 * that non-aggregate stations get a few frames queued to the
3131 	 * hardware before the aggregate station(s) get their chance.
3132 	 *
3133 	 * So if you only ever see a couple of frames direct dispatched
3134 	 * to the hardware from a non-AMPDU client, check both here
3135 	 * and in the software queue dispatcher to ensure that those
3136 	 * non-AMPDU stations get a fair chance to transmit.
3137 	 */
3138 	/* XXX TXQ locking */
3139 	} else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) &&
3140 		    (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) {
3141 		/* AMPDU not running, attempt direct dispatch */
3142 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
3143 		/* See if clrdmask needs to be set */
3144 		ath_tx_update_clrdmask(sc, atid, bf);
3145 
3146 		/*
3147 		 * Update the current leak count if
3148 		 * we're leaking frames; and set the
3149 		 * MORE flag as appropriate.
3150 		 */
3151 		ath_tx_leak_count_update(sc, atid, bf);
3152 
3153 		/*
3154 		 * Dispatch the frame.
3155 		 */
3156 		ath_tx_xmit_normal(sc, txq, bf);
3157 	} else {
3158 		/* Busy; queue */
3159 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
3160 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3161 		ath_tx_tid_sched(sc, atid);
3162 	}
3163 }
3164 
3165 /*
3166  * Only set the clrdmask bit if none of the nodes are currently
3167  * filtered.
3168  *
3169  * XXX TODO: go through all the callers and check to see
3170  * which are being called in the context of looping over all
3171  * TIDs (eg, if all tids are being paused, resumed, etc.)
3172  * That'll avoid O(n^2) complexity here.
3173  */
3174 static void
ath_tx_set_clrdmask(struct ath_softc * sc,struct ath_node * an)3175 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
3176 {
3177 	int i;
3178 
3179 	ATH_TX_LOCK_ASSERT(sc);
3180 
3181 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3182 		if (an->an_tid[i].isfiltered == 1)
3183 			return;
3184 	}
3185 	an->clrdmask = 1;
3186 }
3187 
3188 /*
3189  * Configure the per-TID node state.
3190  *
3191  * This likely belongs in if_ath_node.c but I can't think of anywhere
3192  * else to put it just yet.
3193  *
3194  * This sets up the SLISTs and the mutex as appropriate.
3195  */
3196 void
ath_tx_tid_init(struct ath_softc * sc,struct ath_node * an)3197 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3198 {
3199 	int i, j;
3200 	struct ath_tid *atid;
3201 
3202 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3203 		atid = &an->an_tid[i];
3204 
3205 		/* XXX now with this bzer(), is the field 0'ing needed? */
3206 		bzero(atid, sizeof(*atid));
3207 
3208 		TAILQ_INIT(&atid->tid_q);
3209 		TAILQ_INIT(&atid->filtq.tid_q);
3210 		atid->tid = i;
3211 		atid->an = an;
3212 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3213 			atid->tx_buf[j] = NULL;
3214 		atid->baw_head = atid->baw_tail = 0;
3215 		atid->paused = 0;
3216 		atid->sched = 0;
3217 		atid->hwq_depth = 0;
3218 		atid->cleanup_inprogress = 0;
3219 		if (i == IEEE80211_NONQOS_TID)
3220 			atid->ac = ATH_NONQOS_TID_AC;
3221 		else
3222 			atid->ac = TID_TO_WME_AC(i);
3223 	}
3224 	an->clrdmask = 1;	/* Always start by setting this bit */
3225 }
3226 
3227 /*
3228  * Pause the current TID. This stops packets from being transmitted
3229  * on it.
3230  *
3231  * Since this is also called from upper layers as well as the driver,
3232  * it will get the TID lock.
3233  */
3234 static void
ath_tx_tid_pause(struct ath_softc * sc,struct ath_tid * tid)3235 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3236 {
3237 
3238 	ATH_TX_LOCK_ASSERT(sc);
3239 	tid->paused++;
3240 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n",
3241 	    __func__,
3242 	    tid->an->an_node.ni_macaddr, ":",
3243 	    tid->tid,
3244 	    tid->paused);
3245 }
3246 
3247 /*
3248  * Unpause the current TID, and schedule it if needed.
3249  */
3250 static void
ath_tx_tid_resume(struct ath_softc * sc,struct ath_tid * tid)3251 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3252 {
3253 	ATH_TX_LOCK_ASSERT(sc);
3254 
3255 	/*
3256 	 * There's some odd places where ath_tx_tid_resume() is called
3257 	 * when it shouldn't be; this works around that particular issue
3258 	 * until it's actually resolved.
3259 	 */
3260 	if (tid->paused == 0) {
3261 		device_printf(sc->sc_dev,
3262 		    "%s: [%6D]: tid=%d, paused=0?\n",
3263 		    __func__,
3264 		    tid->an->an_node.ni_macaddr, ":",
3265 		    tid->tid);
3266 	} else {
3267 		tid->paused--;
3268 	}
3269 
3270 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3271 	    "%s: [%6D]: tid=%d, unpaused = %d\n",
3272 	    __func__,
3273 	    tid->an->an_node.ni_macaddr, ":",
3274 	    tid->tid,
3275 	    tid->paused);
3276 
3277 	if (tid->paused)
3278 		return;
3279 
3280 	/*
3281 	 * Override the clrdmask configuration for the next frame
3282 	 * from this TID, just to get the ball rolling.
3283 	 */
3284 	ath_tx_set_clrdmask(sc, tid->an);
3285 
3286 	if (tid->axq_depth == 0)
3287 		return;
3288 
3289 	/* XXX isfiltered shouldn't ever be 0 at this point */
3290 	if (tid->isfiltered == 1) {
3291 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n",
3292 		    __func__);
3293 		return;
3294 	}
3295 
3296 	ath_tx_tid_sched(sc, tid);
3297 
3298 	/*
3299 	 * Queue the software TX scheduler.
3300 	 */
3301 	ath_tx_swq_kick(sc);
3302 }
3303 
3304 /*
3305  * Add the given ath_buf to the TID filtered frame list.
3306  * This requires the TID be filtered.
3307  */
3308 static void
ath_tx_tid_filt_addbuf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3309 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3310     struct ath_buf *bf)
3311 {
3312 
3313 	ATH_TX_LOCK_ASSERT(sc);
3314 
3315 	if (!tid->isfiltered)
3316 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n",
3317 		    __func__);
3318 
3319 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3320 
3321 	/* Set the retry bit and bump the retry counter */
3322 	ath_tx_set_retry(sc, bf);
3323 	sc->sc_stats.ast_tx_swfiltered++;
3324 
3325 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3326 }
3327 
3328 /*
3329  * Handle a completed filtered frame from the given TID.
3330  * This just enables/pauses the filtered frame state if required
3331  * and appends the filtered frame to the filtered queue.
3332  */
3333 static void
ath_tx_tid_filt_comp_buf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3334 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3335     struct ath_buf *bf)
3336 {
3337 
3338 	ATH_TX_LOCK_ASSERT(sc);
3339 
3340 	if (! tid->isfiltered) {
3341 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n",
3342 		    __func__, tid->tid);
3343 		tid->isfiltered = 1;
3344 		ath_tx_tid_pause(sc, tid);
3345 	}
3346 
3347 	/* Add the frame to the filter queue */
3348 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3349 }
3350 
3351 /*
3352  * Complete the filtered frame TX completion.
3353  *
3354  * If there are no more frames in the hardware queue, unpause/unfilter
3355  * the TID if applicable.  Otherwise we will wait for a node PS transition
3356  * to unfilter.
3357  */
3358 static void
ath_tx_tid_filt_comp_complete(struct ath_softc * sc,struct ath_tid * tid)3359 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3360 {
3361 	struct ath_buf *bf;
3362 	int do_resume = 0;
3363 
3364 	ATH_TX_LOCK_ASSERT(sc);
3365 
3366 	if (tid->hwq_depth != 0)
3367 		return;
3368 
3369 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n",
3370 	    __func__, tid->tid);
3371 	if (tid->isfiltered == 1) {
3372 		tid->isfiltered = 0;
3373 		do_resume = 1;
3374 	}
3375 
3376 	/* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
3377 	ath_tx_set_clrdmask(sc, tid->an);
3378 
3379 	/* XXX this is really quite inefficient */
3380 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
3381 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3382 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3383 	}
3384 
3385 	/* And only resume if we had paused before */
3386 	if (do_resume)
3387 		ath_tx_tid_resume(sc, tid);
3388 }
3389 
3390 /*
3391  * Called when a single (aggregate or otherwise) frame is completed.
3392  *
3393  * Returns 0 if the buffer could be added to the filtered list
3394  * (cloned or otherwise), 1 if the buffer couldn't be added to the
3395  * filtered list (failed clone; expired retry) and the caller should
3396  * free it and handle it like a failure (eg by sending a BAR.)
3397  *
3398  * since the buffer may be cloned, bf must be not touched after this
3399  * if the return value is 0.
3400  */
3401 static int
ath_tx_tid_filt_comp_single(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3402 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3403     struct ath_buf *bf)
3404 {
3405 	struct ath_buf *nbf;
3406 	int retval;
3407 
3408 	ATH_TX_LOCK_ASSERT(sc);
3409 
3410 	/*
3411 	 * Don't allow a filtered frame to live forever.
3412 	 */
3413 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3414 		sc->sc_stats.ast_tx_swretrymax++;
3415 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3416 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3417 		    __func__,
3418 		    bf,
3419 		    SEQNO(bf->bf_state.bfs_seqno));
3420 		retval = 1; /* error */
3421 		goto finish;
3422 	}
3423 
3424 	/*
3425 	 * A busy buffer can't be added to the retry list.
3426 	 * It needs to be cloned.
3427 	 */
3428 	if (bf->bf_flags & ATH_BUF_BUSY) {
3429 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3430 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3431 		    "%s: busy buffer clone: %p -> %p\n",
3432 		    __func__, bf, nbf);
3433 	} else {
3434 		nbf = bf;
3435 	}
3436 
3437 	if (nbf == NULL) {
3438 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3439 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3440 		    __func__, bf);
3441 		retval = 1; /* error */
3442 	} else {
3443 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3444 		retval = 0; /* ok */
3445 	}
3446 finish:
3447 	ath_tx_tid_filt_comp_complete(sc, tid);
3448 
3449 	return (retval);
3450 }
3451 
3452 static void
ath_tx_tid_filt_comp_aggr(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf_first,ath_bufhead * bf_q)3453 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3454     struct ath_buf *bf_first, ath_bufhead *bf_q)
3455 {
3456 	struct ath_buf *bf, *bf_next, *nbf;
3457 
3458 	ATH_TX_LOCK_ASSERT(sc);
3459 
3460 	bf = bf_first;
3461 	while (bf) {
3462 		bf_next = bf->bf_next;
3463 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3464 
3465 		/*
3466 		 * Don't allow a filtered frame to live forever.
3467 		 */
3468 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3469 			sc->sc_stats.ast_tx_swretrymax++;
3470 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3471 			    "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n",
3472 			    __func__,
3473 			    tid->tid,
3474 			    bf,
3475 			    SEQNO(bf->bf_state.bfs_seqno));
3476 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3477 			goto next;
3478 		}
3479 
3480 		if (bf->bf_flags & ATH_BUF_BUSY) {
3481 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3482 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3483 			    "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n",
3484 			    __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno));
3485 		} else {
3486 			nbf = bf;
3487 		}
3488 
3489 		/*
3490 		 * If the buffer couldn't be cloned, add it to bf_q;
3491 		 * the caller will free the buffer(s) as required.
3492 		 */
3493 		if (nbf == NULL) {
3494 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3495 			    "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n",
3496 			    __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno));
3497 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3498 		} else {
3499 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3500 		}
3501 next:
3502 		bf = bf_next;
3503 	}
3504 
3505 	ath_tx_tid_filt_comp_complete(sc, tid);
3506 }
3507 
3508 /*
3509  * Suspend the queue because we need to TX a BAR.
3510  */
3511 static void
ath_tx_tid_bar_suspend(struct ath_softc * sc,struct ath_tid * tid)3512 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
3513 {
3514 
3515 	ATH_TX_LOCK_ASSERT(sc);
3516 
3517 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3518 	    "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
3519 	    __func__,
3520 	    tid->tid,
3521 	    tid->bar_wait,
3522 	    tid->bar_tx);
3523 
3524 	/* We shouldn't be called when bar_tx is 1 */
3525 	if (tid->bar_tx) {
3526 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3527 		    "%s: bar_tx is 1?!\n", __func__);
3528 	}
3529 
3530 	/* If we've already been called, just be patient. */
3531 	if (tid->bar_wait)
3532 		return;
3533 
3534 	/* Wait! */
3535 	tid->bar_wait = 1;
3536 
3537 	/* Only one pause, no matter how many frames fail */
3538 	ath_tx_tid_pause(sc, tid);
3539 }
3540 
3541 /*
3542  * We've finished with BAR handling - either we succeeded or
3543  * failed. Either way, unsuspend TX.
3544  */
3545 static void
ath_tx_tid_bar_unsuspend(struct ath_softc * sc,struct ath_tid * tid)3546 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3547 {
3548 
3549 	ATH_TX_LOCK_ASSERT(sc);
3550 
3551 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3552 	    "%s: %6D: TID=%d, called\n",
3553 	    __func__,
3554 	    tid->an->an_node.ni_macaddr,
3555 	    ":",
3556 	    tid->tid);
3557 
3558 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3559 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3560 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3561 		    __func__, tid->an->an_node.ni_macaddr, ":",
3562 		    tid->tid, tid->bar_tx, tid->bar_wait);
3563 	}
3564 
3565 	tid->bar_tx = tid->bar_wait = 0;
3566 	ath_tx_tid_resume(sc, tid);
3567 }
3568 
3569 /*
3570  * Return whether we're ready to TX a BAR frame.
3571  *
3572  * Requires the TID lock be held.
3573  */
3574 static int
ath_tx_tid_bar_tx_ready(struct ath_softc * sc,struct ath_tid * tid)3575 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3576 {
3577 
3578 	ATH_TX_LOCK_ASSERT(sc);
3579 
3580 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3581 		return (0);
3582 
3583 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3584 	    "%s: %6D: TID=%d, bar ready\n",
3585 	    __func__,
3586 	    tid->an->an_node.ni_macaddr,
3587 	    ":",
3588 	    tid->tid);
3589 
3590 	return (1);
3591 }
3592 
3593 /*
3594  * Check whether the current TID is ready to have a BAR
3595  * TXed and if so, do the TX.
3596  *
3597  * Since the TID/TXQ lock can't be held during a call to
3598  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3599  * sending the BAR and locking it again.
3600  *
3601  * Eventually, the code to send the BAR should be broken out
3602  * from this routine so the lock doesn't have to be reacquired
3603  * just to be immediately dropped by the caller.
3604  */
3605 static void
ath_tx_tid_bar_tx(struct ath_softc * sc,struct ath_tid * tid)3606 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3607 {
3608 	struct ieee80211_tx_ampdu *tap;
3609 
3610 	ATH_TX_LOCK_ASSERT(sc);
3611 
3612 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3613 	    "%s: %6D: TID=%d, called\n",
3614 	    __func__,
3615 	    tid->an->an_node.ni_macaddr,
3616 	    ":",
3617 	    tid->tid);
3618 
3619 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3620 
3621 	/*
3622 	 * This is an error condition!
3623 	 */
3624 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3625 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3626 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3627 		    __func__, tid->an->an_node.ni_macaddr, ":",
3628 		    tid->tid, tid->bar_tx, tid->bar_wait);
3629 		return;
3630 	}
3631 
3632 	/* Don't do anything if we still have pending frames */
3633 	if (tid->hwq_depth > 0) {
3634 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3635 		    "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
3636 		    __func__,
3637 		    tid->an->an_node.ni_macaddr,
3638 		    ":",
3639 		    tid->tid,
3640 		    tid->hwq_depth);
3641 		return;
3642 	}
3643 
3644 	/* We're now about to TX */
3645 	tid->bar_tx = 1;
3646 
3647 	/*
3648 	 * Override the clrdmask configuration for the next frame,
3649 	 * just to get the ball rolling.
3650 	 */
3651 	ath_tx_set_clrdmask(sc, tid->an);
3652 
3653 	/*
3654 	 * Calculate new BAW left edge, now that all frames have either
3655 	 * succeeded or failed.
3656 	 *
3657 	 * XXX verify this is _actually_ the valid value to begin at!
3658 	 */
3659 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3660 	    "%s: %6D: TID=%d, new BAW left edge=%d\n",
3661 	    __func__,
3662 	    tid->an->an_node.ni_macaddr,
3663 	    ":",
3664 	    tid->tid,
3665 	    tap->txa_start);
3666 
3667 	/* Try sending the BAR frame */
3668 	/* We can't hold the lock here! */
3669 
3670 	ATH_TX_UNLOCK(sc);
3671 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3672 		/* Success? Now we wait for notification that it's done */
3673 		ATH_TX_LOCK(sc);
3674 		return;
3675 	}
3676 
3677 	/* Failure? For now, warn loudly and continue */
3678 	ATH_TX_LOCK(sc);
3679 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3680 	    "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
3681 	    __func__, tid->an->an_node.ni_macaddr, ":",
3682 	    tid->tid);
3683 	ath_tx_tid_bar_unsuspend(sc, tid);
3684 }
3685 
3686 static void
ath_tx_tid_drain_pkt(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq,struct ath_buf * bf)3687 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3688     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3689 {
3690 
3691 	ATH_TX_LOCK_ASSERT(sc);
3692 
3693 	/*
3694 	 * If the current TID is running AMPDU, update
3695 	 * the BAW.
3696 	 */
3697 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3698 	    bf->bf_state.bfs_dobaw) {
3699 		/*
3700 		 * Only remove the frame from the BAW if it's
3701 		 * been transmitted at least once; this means
3702 		 * the frame was in the BAW to begin with.
3703 		 */
3704 		if (bf->bf_state.bfs_retries > 0) {
3705 			ath_tx_update_baw(sc, an, tid, bf);
3706 			bf->bf_state.bfs_dobaw = 0;
3707 		}
3708 #if 0
3709 		/*
3710 		 * This has become a non-fatal error now
3711 		 */
3712 		if (! bf->bf_state.bfs_addedbaw)
3713 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW
3714 			    "%s: wasn't added: seqno %d\n",
3715 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3716 #endif
3717 	}
3718 
3719 	/* Strip it out of an aggregate list if it was in one */
3720 	bf->bf_next = NULL;
3721 
3722 	/* Insert on the free queue to be freed by the caller */
3723 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3724 }
3725 
3726 static void
ath_tx_tid_drain_print(struct ath_softc * sc,struct ath_node * an,const char * pfx,struct ath_tid * tid,struct ath_buf * bf)3727 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3728     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3729 {
3730 	struct ieee80211_node *ni = &an->an_node;
3731 	struct ath_txq *txq;
3732 	struct ieee80211_tx_ampdu *tap;
3733 
3734 	txq = sc->sc_ac2q[tid->ac];
3735 	tap = ath_tx_get_tx_tid(an, tid->tid);
3736 
3737 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3738 	    "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, "
3739 	    "seqno=%d, retry=%d\n",
3740 	    __func__,
3741 	    pfx,
3742 	    ni->ni_macaddr,
3743 	    ":",
3744 	    bf,
3745 	    bf->bf_state.bfs_addedbaw,
3746 	    bf->bf_state.bfs_dobaw,
3747 	    SEQNO(bf->bf_state.bfs_seqno),
3748 	    bf->bf_state.bfs_retries);
3749 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3750 	    "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3751 	    __func__,
3752 	    pfx,
3753 	    ni->ni_macaddr,
3754 	    ":",
3755 	    bf,
3756 	    txq->axq_qnum,
3757 	    txq->axq_depth,
3758 	    txq->axq_aggr_depth);
3759 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3760 	    "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, "
3761 	      "isfiltered=%d\n",
3762 	    __func__,
3763 	    pfx,
3764 	    ni->ni_macaddr,
3765 	    ":",
3766 	    bf,
3767 	    tid->axq_depth,
3768 	    tid->hwq_depth,
3769 	    tid->bar_wait,
3770 	    tid->isfiltered);
3771 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3772 	    "%s: %s: %6D: tid %d: "
3773 	    "sched=%d, paused=%d, "
3774 	    "incomp=%d, baw_head=%d, "
3775 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3776 	     __func__,
3777 	     pfx,
3778 	     ni->ni_macaddr,
3779 	     ":",
3780 	     tid->tid,
3781 	     tid->sched, tid->paused,
3782 	     tid->incomp, tid->baw_head,
3783 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3784 	     ni->ni_txseqs[tid->tid]);
3785 
3786 	/* XXX Dump the frame, see what it is? */
3787 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3788 		ieee80211_dump_pkt(ni->ni_ic,
3789 		    mtod(bf->bf_m, const uint8_t *),
3790 		    bf->bf_m->m_len, 0, -1);
3791 }
3792 
3793 /*
3794  * Free any packets currently pending in the software TX queue.
3795  *
3796  * This will be called when a node is being deleted.
3797  *
3798  * It can also be called on an active node during an interface
3799  * reset or state transition.
3800  *
3801  * (From Linux/reference):
3802  *
3803  * TODO: For frame(s) that are in the retry state, we will reuse the
3804  * sequence number(s) without setting the retry bit. The
3805  * alternative is to give up on these and BAR the receiver's window
3806  * forward.
3807  */
3808 static void
ath_tx_tid_drain(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq)3809 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3810     struct ath_tid *tid, ath_bufhead *bf_cq)
3811 {
3812 	struct ath_buf *bf;
3813 	struct ieee80211_tx_ampdu *tap;
3814 	struct ieee80211_node *ni = &an->an_node;
3815 	int t;
3816 
3817 	tap = ath_tx_get_tx_tid(an, tid->tid);
3818 
3819 	ATH_TX_LOCK_ASSERT(sc);
3820 
3821 	/* Walk the queue, free frames */
3822 	t = 0;
3823 	for (;;) {
3824 		bf = ATH_TID_FIRST(tid);
3825 		if (bf == NULL) {
3826 			break;
3827 		}
3828 
3829 		if (t == 0) {
3830 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3831 //			t = 1;
3832 		}
3833 
3834 		ATH_TID_REMOVE(tid, bf, bf_list);
3835 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3836 	}
3837 
3838 	/* And now, drain the filtered frame queue */
3839 	t = 0;
3840 	for (;;) {
3841 		bf = ATH_TID_FILT_FIRST(tid);
3842 		if (bf == NULL)
3843 			break;
3844 
3845 		if (t == 0) {
3846 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3847 //			t = 1;
3848 		}
3849 
3850 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3851 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3852 	}
3853 
3854 	/*
3855 	 * Override the clrdmask configuration for the next frame
3856 	 * in case there is some future transmission, just to get
3857 	 * the ball rolling.
3858 	 *
3859 	 * This won't hurt things if the TID is about to be freed.
3860 	 */
3861 	ath_tx_set_clrdmask(sc, tid->an);
3862 
3863 	/*
3864 	 * Now that it's completed, grab the TID lock and update
3865 	 * the sequence number and BAW window.
3866 	 * Because sequence numbers have been assigned to frames
3867 	 * that haven't been sent yet, it's entirely possible
3868 	 * we'll be called with some pending frames that have not
3869 	 * been transmitted.
3870 	 *
3871 	 * The cleaner solution is to do the sequence number allocation
3872 	 * when the packet is first transmitted - and thus the "retries"
3873 	 * check above would be enough to update the BAW/seqno.
3874 	 */
3875 
3876 	/* But don't do it for non-QoS TIDs */
3877 	if (tap) {
3878 #if 1
3879 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3880 		    "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
3881 		    __func__,
3882 		    ni->ni_macaddr,
3883 		    ":",
3884 		    an,
3885 		    tid->tid,
3886 		    tap->txa_start);
3887 #endif
3888 		ni->ni_txseqs[tid->tid] = tap->txa_start;
3889 		tid->baw_tail = tid->baw_head;
3890 	}
3891 }
3892 
3893 /*
3894  * Reset the TID state.  This must be only called once the node has
3895  * had its frames flushed from this TID, to ensure that no other
3896  * pause / unpause logic can kick in.
3897  */
3898 static void
ath_tx_tid_reset(struct ath_softc * sc,struct ath_tid * tid)3899 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
3900 {
3901 
3902 #if 0
3903 	tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
3904 	tid->paused = tid->sched = tid->addba_tx_pending = 0;
3905 	tid->incomp = tid->cleanup_inprogress = 0;
3906 #endif
3907 
3908 	/*
3909 	 * If we have a bar_wait set, we need to unpause the TID
3910 	 * here.  Otherwise once cleanup has finished, the TID won't
3911 	 * have the right paused counter.
3912 	 *
3913 	 * XXX I'm not going through resume here - I don't want the
3914 	 * node to be rescheuled just yet.  This however should be
3915 	 * methodized!
3916 	 */
3917 	if (tid->bar_wait) {
3918 		if (tid->paused > 0) {
3919 			tid->paused --;
3920 		}
3921 	}
3922 
3923 	/*
3924 	 * XXX same with a currently filtered TID.
3925 	 *
3926 	 * Since this is being called during a flush, we assume that
3927 	 * the filtered frame list is actually empty.
3928 	 *
3929 	 * XXX TODO: add in a check to ensure that the filtered queue
3930 	 * depth is actually 0!
3931 	 */
3932 	if (tid->isfiltered) {
3933 		if (tid->paused > 0) {
3934 			tid->paused --;
3935 		}
3936 	}
3937 
3938 	/*
3939 	 * Clear BAR, filtered frames, scheduled and ADDBA pending.
3940 	 * The TID may be going through cleanup from the last association
3941 	 * where things in the BAW are still in the hardware queue.
3942 	 */
3943 	tid->bar_wait = 0;
3944 	tid->bar_tx = 0;
3945 	tid->isfiltered = 0;
3946 	tid->sched = 0;
3947 	tid->addba_tx_pending = 0;
3948 
3949 	/*
3950 	 * XXX TODO: it may just be enough to walk the HWQs and mark
3951 	 * frames for that node as non-aggregate; or mark the ath_node
3952 	 * with something that indicates that aggregation is no longer
3953 	 * occurring.  Then we can just toss the BAW complaints and
3954 	 * do a complete hard reset of state here - no pause, no
3955 	 * complete counter, etc.
3956 	 */
3957 
3958 }
3959 
3960 /*
3961  * Flush all software queued packets for the given node.
3962  *
3963  * This occurs when a completion handler frees the last buffer
3964  * for a node, and the node is thus freed. This causes the node
3965  * to be cleaned up, which ends up calling ath_tx_node_flush.
3966  */
3967 void
ath_tx_node_flush(struct ath_softc * sc,struct ath_node * an)3968 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
3969 {
3970 	int tid;
3971 	ath_bufhead bf_cq;
3972 	struct ath_buf *bf;
3973 
3974 	TAILQ_INIT(&bf_cq);
3975 
3976 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
3977 	    &an->an_node);
3978 
3979 	ATH_TX_LOCK(sc);
3980 	DPRINTF(sc, ATH_DEBUG_NODE,
3981 	    "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
3982 	    "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
3983 	    __func__,
3984 	    an->an_node.ni_macaddr,
3985 	    ":",
3986 	    an->an_is_powersave,
3987 	    an->an_stack_psq,
3988 	    an->an_tim_set,
3989 	    an->an_swq_depth,
3990 	    an->clrdmask,
3991 	    an->an_leak_count);
3992 
3993 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
3994 		struct ath_tid *atid = &an->an_tid[tid];
3995 
3996 		/* Free packets */
3997 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
3998 
3999 		/* Remove this tid from the list of active tids */
4000 		ath_tx_tid_unsched(sc, atid);
4001 
4002 		/* Reset the per-TID pause, BAR, etc state */
4003 		ath_tx_tid_reset(sc, atid);
4004 	}
4005 
4006 	/*
4007 	 * Clear global leak count
4008 	 */
4009 	an->an_leak_count = 0;
4010 	ATH_TX_UNLOCK(sc);
4011 
4012 	/* Handle completed frames */
4013 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4014 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4015 		ath_tx_default_comp(sc, bf, 0);
4016 	}
4017 }
4018 
4019 /*
4020  * Drain all the software TXQs currently with traffic queued.
4021  */
4022 void
ath_tx_txq_drain(struct ath_softc * sc,struct ath_txq * txq)4023 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
4024 {
4025 	struct ath_tid *tid;
4026 	ath_bufhead bf_cq;
4027 	struct ath_buf *bf;
4028 
4029 	TAILQ_INIT(&bf_cq);
4030 	ATH_TX_LOCK(sc);
4031 
4032 	/*
4033 	 * Iterate over all active tids for the given txq,
4034 	 * flushing and unsched'ing them
4035 	 */
4036 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4037 		tid = TAILQ_FIRST(&txq->axq_tidq);
4038 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4039 		ath_tx_tid_unsched(sc, tid);
4040 	}
4041 
4042 	ATH_TX_UNLOCK(sc);
4043 
4044 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4045 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4046 		ath_tx_default_comp(sc, bf, 0);
4047 	}
4048 }
4049 
4050 /*
4051  * Handle completion of non-aggregate session frames.
4052  *
4053  * This (currently) doesn't implement software retransmission of
4054  * non-aggregate frames!
4055  *
4056  * Software retransmission of non-aggregate frames needs to obey
4057  * the strict sequence number ordering, and drop any frames that
4058  * will fail this.
4059  *
4060  * For now, filtered frames and frame transmission will cause
4061  * all kinds of issues.  So we don't support them.
4062  *
4063  * So anyone queuing frames via ath_tx_normal_xmit() or
4064  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4065  */
4066 void
ath_tx_normal_comp(struct ath_softc * sc,struct ath_buf * bf,int fail)4067 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4068 {
4069 	struct ieee80211_node *ni = bf->bf_node;
4070 	struct ath_node *an = ATH_NODE(ni);
4071 	int tid = bf->bf_state.bfs_tid;
4072 	struct ath_tid *atid = &an->an_tid[tid];
4073 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4074 
4075 	/* The TID state is protected behind the TXQ lock */
4076 	ATH_TX_LOCK(sc);
4077 
4078 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4079 	    __func__, bf, fail, atid->hwq_depth - 1);
4080 
4081 	atid->hwq_depth--;
4082 
4083 #if 0
4084 	/*
4085 	 * If the frame was filtered, stick it on the filter frame
4086 	 * queue and complain about it.  It shouldn't happen!
4087 	 */
4088 	if ((ts->ts_status & HAL_TXERR_FILT) ||
4089 	    (ts->ts_status != 0 && atid->isfiltered)) {
4090 		DPRINTF(sc, ATH_DEBUG_SW_TX,
4091 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
4092 		    __func__,
4093 		    atid->isfiltered,
4094 		    ts->ts_status);
4095 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
4096 	}
4097 #endif
4098 	if (atid->isfiltered)
4099 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__);
4100 	if (atid->hwq_depth < 0)
4101 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
4102 		    __func__, atid->hwq_depth);
4103 
4104 	/* If the TID is being cleaned up, track things */
4105 	/* XXX refactor! */
4106 	if (atid->cleanup_inprogress) {
4107 		atid->incomp--;
4108 		if (atid->incomp == 0) {
4109 			DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4110 			    "%s: TID %d: cleaned up! resume!\n",
4111 			    __func__, tid);
4112 			atid->cleanup_inprogress = 0;
4113 			ath_tx_tid_resume(sc, atid);
4114 		}
4115 	}
4116 
4117 	/*
4118 	 * If the queue is filtered, potentially mark it as complete
4119 	 * and reschedule it as needed.
4120 	 *
4121 	 * This is required as there may be a subsequent TX descriptor
4122 	 * for this end-node that has CLRDMASK set, so it's quite possible
4123 	 * that a filtered frame will be followed by a non-filtered
4124 	 * (complete or otherwise) frame.
4125 	 *
4126 	 * XXX should we do this before we complete the frame?
4127 	 */
4128 	if (atid->isfiltered)
4129 		ath_tx_tid_filt_comp_complete(sc, atid);
4130 	ATH_TX_UNLOCK(sc);
4131 
4132 	/*
4133 	 * punt to rate control if we're not being cleaned up
4134 	 * during a hw queue drain and the frame wanted an ACK.
4135 	 */
4136 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4137 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4138 		    ts, bf->bf_state.bfs_pktlen,
4139 		    1, (ts->ts_status == 0) ? 0 : 1);
4140 
4141 	ath_tx_default_comp(sc, bf, fail);
4142 }
4143 
4144 /*
4145  * Handle cleanup of aggregate session packets that aren't
4146  * an A-MPDU.
4147  *
4148  * There's no need to update the BAW here - the session is being
4149  * torn down.
4150  */
4151 static void
ath_tx_comp_cleanup_unaggr(struct ath_softc * sc,struct ath_buf * bf)4152 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4153 {
4154 	struct ieee80211_node *ni = bf->bf_node;
4155 	struct ath_node *an = ATH_NODE(ni);
4156 	int tid = bf->bf_state.bfs_tid;
4157 	struct ath_tid *atid = &an->an_tid[tid];
4158 
4159 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4160 	    __func__, tid, atid->incomp);
4161 
4162 	ATH_TX_LOCK(sc);
4163 	atid->incomp--;
4164 
4165 	/* XXX refactor! */
4166 	if (bf->bf_state.bfs_dobaw) {
4167 		ath_tx_update_baw(sc, an, atid, bf);
4168 		if (!bf->bf_state.bfs_addedbaw)
4169 			DPRINTF(sc, ATH_DEBUG_SW_TX,
4170 			    "%s: wasn't added: seqno %d\n",
4171 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4172 	}
4173 
4174 	if (atid->incomp == 0) {
4175 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4176 		    "%s: TID %d: cleaned up! resume!\n",
4177 		    __func__, tid);
4178 		atid->cleanup_inprogress = 0;
4179 		ath_tx_tid_resume(sc, atid);
4180 	}
4181 	ATH_TX_UNLOCK(sc);
4182 
4183 	ath_tx_default_comp(sc, bf, 0);
4184 }
4185 
4186 
4187 /*
4188  * This as it currently stands is a bit dumb.  Ideally we'd just
4189  * fail the frame the normal way and have it permanently fail
4190  * via the normal aggregate completion path.
4191  */
4192 static void
ath_tx_tid_cleanup_frame(struct ath_softc * sc,struct ath_node * an,int tid,struct ath_buf * bf_head,ath_bufhead * bf_cq)4193 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an,
4194     int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq)
4195 {
4196 	struct ath_tid *atid = &an->an_tid[tid];
4197 	struct ath_buf *bf, *bf_next;
4198 
4199 	ATH_TX_LOCK_ASSERT(sc);
4200 
4201 	/*
4202 	 * Remove this frame from the queue.
4203 	 */
4204 	ATH_TID_REMOVE(atid, bf_head, bf_list);
4205 
4206 	/*
4207 	 * Loop over all the frames in the aggregate.
4208 	 */
4209 	bf = bf_head;
4210 	while (bf != NULL) {
4211 		bf_next = bf->bf_next;	/* next aggregate frame, or NULL */
4212 
4213 		/*
4214 		 * If it's been added to the BAW we need to kick
4215 		 * it out of the BAW before we continue.
4216 		 *
4217 		 * XXX if it's an aggregate, assert that it's in the
4218 		 * BAW - we shouldn't have it be in an aggregate
4219 		 * otherwise!
4220 		 */
4221 		if (bf->bf_state.bfs_addedbaw) {
4222 			ath_tx_update_baw(sc, an, atid, bf);
4223 			bf->bf_state.bfs_dobaw = 0;
4224 		}
4225 
4226 		/*
4227 		 * Give it the default completion handler.
4228 		 */
4229 		bf->bf_comp = ath_tx_normal_comp;
4230 		bf->bf_next = NULL;
4231 
4232 		/*
4233 		 * Add it to the list to free.
4234 		 */
4235 		TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4236 
4237 		/*
4238 		 * Now advance to the next frame in the aggregate.
4239 		 */
4240 		bf = bf_next;
4241 	}
4242 }
4243 
4244 /*
4245  * Performs transmit side cleanup when TID changes from aggregated to
4246  * unaggregated and during reassociation.
4247  *
4248  * For now, this just tosses everything from the TID software queue
4249  * whether or not it has been retried and marks the TID as
4250  * pending completion if there's anything for this TID queued to
4251  * the hardware.
4252  *
4253  * The caller is responsible for pausing the TID and unpausing the
4254  * TID if no cleanup was required. Otherwise the cleanup path will
4255  * unpause the TID once the last hardware queued frame is completed.
4256  */
4257 static void
ath_tx_tid_cleanup(struct ath_softc * sc,struct ath_node * an,int tid,ath_bufhead * bf_cq)4258 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
4259     ath_bufhead *bf_cq)
4260 {
4261 	struct ath_tid *atid = &an->an_tid[tid];
4262 	struct ath_buf *bf, *bf_next;
4263 
4264 	ATH_TX_LOCK_ASSERT(sc);
4265 
4266 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4267 	    "%s: TID %d: called; inprogress=%d\n", __func__, tid,
4268 	    atid->cleanup_inprogress);
4269 
4270 	/*
4271 	 * Move the filtered frames to the TX queue, before
4272 	 * we run off and discard/process things.
4273 	 */
4274 
4275 	/* XXX this is really quite inefficient */
4276 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
4277 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
4278 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4279 	}
4280 
4281 	/*
4282 	 * Update the frames in the software TX queue:
4283 	 *
4284 	 * + Discard retry frames in the queue
4285 	 * + Fix the completion function to be non-aggregate
4286 	 */
4287 	bf = ATH_TID_FIRST(atid);
4288 	while (bf) {
4289 		/*
4290 		 * Grab the next frame in the list, we may
4291 		 * be fiddling with the list.
4292 		 */
4293 		bf_next = TAILQ_NEXT(bf, bf_list);
4294 
4295 		/*
4296 		 * Free the frame and all subframes.
4297 		 */
4298 		ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq);
4299 
4300 		/*
4301 		 * Next frame!
4302 		 */
4303 		bf = bf_next;
4304 	}
4305 
4306 	/*
4307 	 * If there's anything in the hardware queue we wait
4308 	 * for the TID HWQ to empty.
4309 	 */
4310 	if (atid->hwq_depth > 0) {
4311 		/*
4312 		 * XXX how about we kill atid->incomp, and instead
4313 		 * replace it with a macro that checks that atid->hwq_depth
4314 		 * is 0?
4315 		 */
4316 		atid->incomp = atid->hwq_depth;
4317 		atid->cleanup_inprogress = 1;
4318 	}
4319 
4320 	if (atid->cleanup_inprogress)
4321 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4322 		    "%s: TID %d: cleanup needed: %d packets\n",
4323 		    __func__, tid, atid->incomp);
4324 
4325 	/* Owner now must free completed frames */
4326 }
4327 
4328 static struct ath_buf *
ath_tx_retry_clone(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)4329 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
4330     struct ath_tid *tid, struct ath_buf *bf)
4331 {
4332 	struct ath_buf *nbf;
4333 	int error;
4334 
4335 	/*
4336 	 * Clone the buffer.  This will handle the dma unmap and
4337 	 * copy the node reference to the new buffer.  If this
4338 	 * works out, 'bf' will have no DMA mapping, no mbuf
4339 	 * pointer and no node reference.
4340 	 */
4341 	nbf = ath_buf_clone(sc, bf);
4342 
4343 #if 0
4344 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n",
4345 	    __func__);
4346 #endif
4347 
4348 	if (nbf == NULL) {
4349 		/* Failed to clone */
4350 		DPRINTF(sc, ATH_DEBUG_XMIT,
4351 		    "%s: failed to clone a busy buffer\n",
4352 		    __func__);
4353 		return NULL;
4354 	}
4355 
4356 	/* Setup the dma for the new buffer */
4357 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4358 	if (error != 0) {
4359 		DPRINTF(sc, ATH_DEBUG_XMIT,
4360 		    "%s: failed to setup dma for clone\n",
4361 		    __func__);
4362 		/*
4363 		 * Put this at the head of the list, not tail;
4364 		 * that way it doesn't interfere with the
4365 		 * busy buffer logic (which uses the tail of
4366 		 * the list.)
4367 		 */
4368 		ATH_TXBUF_LOCK(sc);
4369 		ath_returnbuf_head(sc, nbf);
4370 		ATH_TXBUF_UNLOCK(sc);
4371 		return NULL;
4372 	}
4373 
4374 	/* Update BAW if required, before we free the original buf */
4375 	if (bf->bf_state.bfs_dobaw)
4376 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
4377 
4378 	/* Free original buffer; return new buffer */
4379 	ath_freebuf(sc, bf);
4380 
4381 	return nbf;
4382 }
4383 
4384 /*
4385  * Handle retrying an unaggregate frame in an aggregate
4386  * session.
4387  *
4388  * If too many retries occur, pause the TID, wait for
4389  * any further retransmits (as there's no reason why
4390  * non-aggregate frames in an aggregate session are
4391  * transmitted in-order; they just have to be in-BAW)
4392  * and then queue a BAR.
4393  */
4394 static void
ath_tx_aggr_retry_unaggr(struct ath_softc * sc,struct ath_buf * bf)4395 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4396 {
4397 	struct ieee80211_node *ni = bf->bf_node;
4398 	struct ath_node *an = ATH_NODE(ni);
4399 	int tid = bf->bf_state.bfs_tid;
4400 	struct ath_tid *atid = &an->an_tid[tid];
4401 	struct ieee80211_tx_ampdu *tap;
4402 
4403 	ATH_TX_LOCK(sc);
4404 
4405 	tap = ath_tx_get_tx_tid(an, tid);
4406 
4407 	/*
4408 	 * If the buffer is marked as busy, we can't directly
4409 	 * reuse it. Instead, try to clone the buffer.
4410 	 * If the clone is successful, recycle the old buffer.
4411 	 * If the clone is unsuccessful, set bfs_retries to max
4412 	 * to force the next bit of code to free the buffer
4413 	 * for us.
4414 	 */
4415 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4416 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4417 		struct ath_buf *nbf;
4418 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4419 		if (nbf)
4420 			/* bf has been freed at this point */
4421 			bf = nbf;
4422 		else
4423 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4424 	}
4425 
4426 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4427 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4428 		    "%s: exceeded retries; seqno %d\n",
4429 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4430 		sc->sc_stats.ast_tx_swretrymax++;
4431 
4432 		/* Update BAW anyway */
4433 		if (bf->bf_state.bfs_dobaw) {
4434 			ath_tx_update_baw(sc, an, atid, bf);
4435 			if (! bf->bf_state.bfs_addedbaw)
4436 				DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4437 				    "%s: wasn't added: seqno %d\n",
4438 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4439 		}
4440 		bf->bf_state.bfs_dobaw = 0;
4441 
4442 		/* Suspend the TX queue and get ready to send the BAR */
4443 		ath_tx_tid_bar_suspend(sc, atid);
4444 
4445 		/* Send the BAR if there are no other frames waiting */
4446 		if (ath_tx_tid_bar_tx_ready(sc, atid))
4447 			ath_tx_tid_bar_tx(sc, atid);
4448 
4449 		ATH_TX_UNLOCK(sc);
4450 
4451 		/* Free buffer, bf is free after this call */
4452 		ath_tx_default_comp(sc, bf, 0);
4453 		return;
4454 	}
4455 
4456 	/*
4457 	 * This increments the retry counter as well as
4458 	 * sets the retry flag in the ath_buf and packet
4459 	 * body.
4460 	 */
4461 	ath_tx_set_retry(sc, bf);
4462 	sc->sc_stats.ast_tx_swretries++;
4463 
4464 	/*
4465 	 * Insert this at the head of the queue, so it's
4466 	 * retried before any current/subsequent frames.
4467 	 */
4468 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4469 	ath_tx_tid_sched(sc, atid);
4470 	/* Send the BAR if there are no other frames waiting */
4471 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4472 		ath_tx_tid_bar_tx(sc, atid);
4473 
4474 	ATH_TX_UNLOCK(sc);
4475 }
4476 
4477 /*
4478  * Common code for aggregate excessive retry/subframe retry.
4479  * If retrying, queues buffers to bf_q. If not, frees the
4480  * buffers.
4481  *
4482  * XXX should unify this with ath_tx_aggr_retry_unaggr()
4483  */
4484 static int
ath_tx_retry_subframe(struct ath_softc * sc,struct ath_buf * bf,ath_bufhead * bf_q)4485 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4486     ath_bufhead *bf_q)
4487 {
4488 	struct ieee80211_node *ni = bf->bf_node;
4489 	struct ath_node *an = ATH_NODE(ni);
4490 	int tid = bf->bf_state.bfs_tid;
4491 	struct ath_tid *atid = &an->an_tid[tid];
4492 
4493 	ATH_TX_LOCK_ASSERT(sc);
4494 
4495 	/* XXX clr11naggr should be done for all subframes */
4496 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4497 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4498 
4499 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4500 
4501 	/*
4502 	 * If the buffer is marked as busy, we can't directly
4503 	 * reuse it. Instead, try to clone the buffer.
4504 	 * If the clone is successful, recycle the old buffer.
4505 	 * If the clone is unsuccessful, set bfs_retries to max
4506 	 * to force the next bit of code to free the buffer
4507 	 * for us.
4508 	 */
4509 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4510 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4511 		struct ath_buf *nbf;
4512 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4513 		if (nbf)
4514 			/* bf has been freed at this point */
4515 			bf = nbf;
4516 		else
4517 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4518 	}
4519 
4520 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4521 		sc->sc_stats.ast_tx_swretrymax++;
4522 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4523 		    "%s: max retries: seqno %d\n",
4524 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4525 		ath_tx_update_baw(sc, an, atid, bf);
4526 		if (!bf->bf_state.bfs_addedbaw)
4527 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4528 			    "%s: wasn't added: seqno %d\n",
4529 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4530 		bf->bf_state.bfs_dobaw = 0;
4531 		return 1;
4532 	}
4533 
4534 	ath_tx_set_retry(sc, bf);
4535 	sc->sc_stats.ast_tx_swretries++;
4536 	bf->bf_next = NULL;		/* Just to make sure */
4537 
4538 	/* Clear the aggregate state */
4539 	bf->bf_state.bfs_aggr = 0;
4540 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
4541 	bf->bf_state.bfs_nframes = 1;
4542 
4543 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4544 	return 0;
4545 }
4546 
4547 /*
4548  * error pkt completion for an aggregate destination
4549  */
4550 static void
ath_tx_comp_aggr_error(struct ath_softc * sc,struct ath_buf * bf_first,struct ath_tid * tid)4551 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4552     struct ath_tid *tid)
4553 {
4554 	struct ieee80211_node *ni = bf_first->bf_node;
4555 	struct ath_node *an = ATH_NODE(ni);
4556 	struct ath_buf *bf_next, *bf;
4557 	ath_bufhead bf_q;
4558 	int drops = 0;
4559 	struct ieee80211_tx_ampdu *tap;
4560 	ath_bufhead bf_cq;
4561 
4562 	TAILQ_INIT(&bf_q);
4563 	TAILQ_INIT(&bf_cq);
4564 
4565 	/*
4566 	 * Update rate control - all frames have failed.
4567 	 *
4568 	 * XXX use the length in the first frame in the series;
4569 	 * XXX just so things are consistent for now.
4570 	 */
4571 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4572 	    &bf_first->bf_status.ds_txstat,
4573 	    bf_first->bf_state.bfs_pktlen,
4574 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4575 
4576 	ATH_TX_LOCK(sc);
4577 	tap = ath_tx_get_tx_tid(an, tid->tid);
4578 	sc->sc_stats.ast_tx_aggr_failall++;
4579 
4580 	/* Retry all subframes */
4581 	bf = bf_first;
4582 	while (bf) {
4583 		bf_next = bf->bf_next;
4584 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4585 		sc->sc_stats.ast_tx_aggr_fail++;
4586 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4587 			drops++;
4588 			bf->bf_next = NULL;
4589 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4590 		}
4591 		bf = bf_next;
4592 	}
4593 
4594 	/* Prepend all frames to the beginning of the queue */
4595 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4596 		TAILQ_REMOVE(&bf_q, bf, bf_list);
4597 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4598 	}
4599 
4600 	/*
4601 	 * Schedule the TID to be re-tried.
4602 	 */
4603 	ath_tx_tid_sched(sc, tid);
4604 
4605 	/*
4606 	 * send bar if we dropped any frames
4607 	 *
4608 	 * Keep the txq lock held for now, as we need to ensure
4609 	 * that ni_txseqs[] is consistent (as it's being updated
4610 	 * in the ifnet TX context or raw TX context.)
4611 	 */
4612 	if (drops) {
4613 		/* Suspend the TX queue and get ready to send the BAR */
4614 		ath_tx_tid_bar_suspend(sc, tid);
4615 	}
4616 
4617 	/*
4618 	 * Send BAR if required
4619 	 */
4620 	if (ath_tx_tid_bar_tx_ready(sc, tid))
4621 		ath_tx_tid_bar_tx(sc, tid);
4622 
4623 	ATH_TX_UNLOCK(sc);
4624 
4625 	/* Complete frames which errored out */
4626 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4627 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4628 		ath_tx_default_comp(sc, bf, 0);
4629 	}
4630 }
4631 
4632 /*
4633  * Handle clean-up of packets from an aggregate list.
4634  *
4635  * There's no need to update the BAW here - the session is being
4636  * torn down.
4637  */
4638 static void
ath_tx_comp_cleanup_aggr(struct ath_softc * sc,struct ath_buf * bf_first)4639 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4640 {
4641 	struct ath_buf *bf, *bf_next;
4642 	struct ieee80211_node *ni = bf_first->bf_node;
4643 	struct ath_node *an = ATH_NODE(ni);
4644 	int tid = bf_first->bf_state.bfs_tid;
4645 	struct ath_tid *atid = &an->an_tid[tid];
4646 
4647 	ATH_TX_LOCK(sc);
4648 
4649 	/* update incomp */
4650 	atid->incomp--;
4651 
4652 	/* Update the BAW */
4653 	bf = bf_first;
4654 	while (bf) {
4655 		/* XXX refactor! */
4656 		if (bf->bf_state.bfs_dobaw) {
4657 			ath_tx_update_baw(sc, an, atid, bf);
4658 			if (!bf->bf_state.bfs_addedbaw)
4659 				DPRINTF(sc, ATH_DEBUG_SW_TX,
4660 				    "%s: wasn't added: seqno %d\n",
4661 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4662 		}
4663 		bf = bf->bf_next;
4664 	}
4665 
4666 	if (atid->incomp == 0) {
4667 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4668 		    "%s: TID %d: cleaned up! resume!\n",
4669 		    __func__, tid);
4670 		atid->cleanup_inprogress = 0;
4671 		ath_tx_tid_resume(sc, atid);
4672 	}
4673 
4674 	/* Send BAR if required */
4675 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
4676 	/*
4677 	 * XXX TODO: we should likely just tear down the BAR state here,
4678 	 * rather than sending a BAR.
4679 	 */
4680 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4681 		ath_tx_tid_bar_tx(sc, atid);
4682 
4683 	ATH_TX_UNLOCK(sc);
4684 
4685 	/* Handle frame completion as individual frames */
4686 	bf = bf_first;
4687 	while (bf) {
4688 		bf_next = bf->bf_next;
4689 		bf->bf_next = NULL;
4690 		ath_tx_default_comp(sc, bf, 1);
4691 		bf = bf_next;
4692 	}
4693 }
4694 
4695 /*
4696  * Handle completion of an set of aggregate frames.
4697  *
4698  * Note: the completion handler is the last descriptor in the aggregate,
4699  * not the last descriptor in the first frame.
4700  */
4701 static void
ath_tx_aggr_comp_aggr(struct ath_softc * sc,struct ath_buf * bf_first,int fail)4702 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4703     int fail)
4704 {
4705 	//struct ath_desc *ds = bf->bf_lastds;
4706 	struct ieee80211_node *ni = bf_first->bf_node;
4707 	struct ath_node *an = ATH_NODE(ni);
4708 	int tid = bf_first->bf_state.bfs_tid;
4709 	struct ath_tid *atid = &an->an_tid[tid];
4710 	struct ath_tx_status ts;
4711 	struct ieee80211_tx_ampdu *tap;
4712 	ath_bufhead bf_q;
4713 	ath_bufhead bf_cq;
4714 	int seq_st, tx_ok;
4715 	int hasba, isaggr;
4716 	uint32_t ba[2];
4717 	struct ath_buf *bf, *bf_next;
4718 	int ba_index;
4719 	int drops = 0;
4720 	int nframes = 0, nbad = 0, nf;
4721 	int pktlen;
4722 	/* XXX there's too much on the stack? */
4723 	struct ath_rc_series rc[ATH_RC_NUM];
4724 	int txseq;
4725 
4726 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4727 	    __func__, atid->hwq_depth);
4728 
4729 	/*
4730 	 * Take a copy; this may be needed -after- bf_first
4731 	 * has been completed and freed.
4732 	 */
4733 	ts = bf_first->bf_status.ds_txstat;
4734 
4735 	TAILQ_INIT(&bf_q);
4736 	TAILQ_INIT(&bf_cq);
4737 
4738 	/* The TID state is kept behind the TXQ lock */
4739 	ATH_TX_LOCK(sc);
4740 
4741 	atid->hwq_depth--;
4742 	if (atid->hwq_depth < 0)
4743 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n",
4744 		    __func__, atid->hwq_depth);
4745 
4746 	/*
4747 	 * If the TID is filtered, handle completing the filter
4748 	 * transition before potentially kicking it to the cleanup
4749 	 * function.
4750 	 *
4751 	 * XXX this is duplicate work, ew.
4752 	 */
4753 	if (atid->isfiltered)
4754 		ath_tx_tid_filt_comp_complete(sc, atid);
4755 
4756 	/*
4757 	 * Punt cleanup to the relevant function, not our problem now
4758 	 */
4759 	if (atid->cleanup_inprogress) {
4760 		if (atid->isfiltered)
4761 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4762 			    "%s: isfiltered=1, normal_comp?\n",
4763 			    __func__);
4764 		ATH_TX_UNLOCK(sc);
4765 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4766 		return;
4767 	}
4768 
4769 	/*
4770 	 * If the frame is filtered, transition to filtered frame
4771 	 * mode and add this to the filtered frame list.
4772 	 *
4773 	 * XXX TODO: figure out how this interoperates with
4774 	 * BAR, pause and cleanup states.
4775 	 */
4776 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4777 	    (ts.ts_status != 0 && atid->isfiltered)) {
4778 		if (fail != 0)
4779 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4780 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4781 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4782 
4783 		/* Remove from BAW */
4784 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4785 			if (bf->bf_state.bfs_addedbaw)
4786 				drops++;
4787 			if (bf->bf_state.bfs_dobaw) {
4788 				ath_tx_update_baw(sc, an, atid, bf);
4789 				if (!bf->bf_state.bfs_addedbaw)
4790 					DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4791 					    "%s: wasn't added: seqno %d\n",
4792 					    __func__,
4793 					    SEQNO(bf->bf_state.bfs_seqno));
4794 			}
4795 			bf->bf_state.bfs_dobaw = 0;
4796 		}
4797 		/*
4798 		 * If any intermediate frames in the BAW were dropped when
4799 		 * handling filtering things, send a BAR.
4800 		 */
4801 		if (drops)
4802 			ath_tx_tid_bar_suspend(sc, atid);
4803 
4804 		/*
4805 		 * Finish up by sending a BAR if required and freeing
4806 		 * the frames outside of the TX lock.
4807 		 */
4808 		goto finish_send_bar;
4809 	}
4810 
4811 	/*
4812 	 * XXX for now, use the first frame in the aggregate for
4813 	 * XXX rate control completion; it's at least consistent.
4814 	 */
4815 	pktlen = bf_first->bf_state.bfs_pktlen;
4816 
4817 	/*
4818 	 * Handle errors first!
4819 	 *
4820 	 * Here, handle _any_ error as a "exceeded retries" error.
4821 	 * Later on (when filtered frames are to be specially handled)
4822 	 * it'll have to be expanded.
4823 	 */
4824 #if 0
4825 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4826 #endif
4827 	if (ts.ts_status != 0) {
4828 		ATH_TX_UNLOCK(sc);
4829 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4830 		return;
4831 	}
4832 
4833 	tap = ath_tx_get_tx_tid(an, tid);
4834 
4835 	/*
4836 	 * extract starting sequence and block-ack bitmap
4837 	 */
4838 	/* XXX endian-ness of seq_st, ba? */
4839 	seq_st = ts.ts_seqnum;
4840 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4841 	tx_ok = (ts.ts_status == 0);
4842 	isaggr = bf_first->bf_state.bfs_aggr;
4843 	ba[0] = ts.ts_ba_low;
4844 	ba[1] = ts.ts_ba_high;
4845 
4846 	/*
4847 	 * Copy the TX completion status and the rate control
4848 	 * series from the first descriptor, as it may be freed
4849 	 * before the rate control code can get its grubby fingers
4850 	 * into things.
4851 	 */
4852 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4853 
4854 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4855 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4856 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4857 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4858 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4859 
4860 	/*
4861 	 * The reference driver doesn't do this; it simply ignores
4862 	 * this check in its entirety.
4863 	 *
4864 	 * I've seen this occur when using iperf to send traffic
4865 	 * out tid 1 - the aggregate frames are all marked as TID 1,
4866 	 * but the TXSTATUS has TID=0.  So, let's just ignore this
4867 	 * check.
4868 	 */
4869 #if 0
4870 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4871 	if (tid != ts.ts_tid) {
4872 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n",
4873 		    __func__, tid, ts.ts_tid);
4874 		tx_ok = 0;
4875 	}
4876 #endif
4877 
4878 	/* AR5416 BA bug; this requires an interface reset */
4879 	if (isaggr && tx_ok && (! hasba)) {
4880 		device_printf(sc->sc_dev,
4881 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4882 		    "seq_st=%d\n",
4883 		    __func__, hasba, tx_ok, isaggr, seq_st);
4884 		/* XXX TODO: schedule an interface reset */
4885 #ifdef ATH_DEBUG
4886 		ath_printtxbuf(sc, bf_first,
4887 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
4888 #endif
4889 	}
4890 
4891 	/*
4892 	 * Walk the list of frames, figure out which ones were correctly
4893 	 * sent and which weren't.
4894 	 */
4895 	bf = bf_first;
4896 	nf = bf_first->bf_state.bfs_nframes;
4897 
4898 	/* bf_first is going to be invalid once this list is walked */
4899 	bf_first = NULL;
4900 
4901 	/*
4902 	 * Walk the list of completed frames and determine
4903 	 * which need to be completed and which need to be
4904 	 * retransmitted.
4905 	 *
4906 	 * For completed frames, the completion functions need
4907 	 * to be called at the end of this function as the last
4908 	 * node reference may free the node.
4909 	 *
4910 	 * Finally, since the TXQ lock can't be held during the
4911 	 * completion callback (to avoid lock recursion),
4912 	 * the completion calls have to be done outside of the
4913 	 * lock.
4914 	 */
4915 	while (bf) {
4916 		nframes++;
4917 		ba_index = ATH_BA_INDEX(seq_st,
4918 		    SEQNO(bf->bf_state.bfs_seqno));
4919 		bf_next = bf->bf_next;
4920 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4921 
4922 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4923 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
4924 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
4925 		    ATH_BA_ISSET(ba, ba_index));
4926 
4927 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
4928 			sc->sc_stats.ast_tx_aggr_ok++;
4929 			ath_tx_update_baw(sc, an, atid, bf);
4930 			bf->bf_state.bfs_dobaw = 0;
4931 			if (!bf->bf_state.bfs_addedbaw)
4932 				DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4933 				    "%s: wasn't added: seqno %d\n",
4934 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4935 			bf->bf_next = NULL;
4936 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4937 		} else {
4938 			sc->sc_stats.ast_tx_aggr_fail++;
4939 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4940 				drops++;
4941 				bf->bf_next = NULL;
4942 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4943 			}
4944 			nbad++;
4945 		}
4946 		bf = bf_next;
4947 	}
4948 
4949 	/*
4950 	 * Now that the BAW updates have been done, unlock
4951 	 *
4952 	 * txseq is grabbed before the lock is released so we
4953 	 * have a consistent view of what -was- in the BAW.
4954 	 * Anything after this point will not yet have been
4955 	 * TXed.
4956 	 */
4957 	txseq = tap->txa_start;
4958 	ATH_TX_UNLOCK(sc);
4959 
4960 	if (nframes != nf)
4961 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4962 		    "%s: num frames seen=%d; bf nframes=%d\n",
4963 		    __func__, nframes, nf);
4964 
4965 	/*
4966 	 * Now we know how many frames were bad, call the rate
4967 	 * control code.
4968 	 */
4969 	if (fail == 0)
4970 		ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
4971 		    nbad);
4972 
4973 	/*
4974 	 * send bar if we dropped any frames
4975 	 */
4976 	if (drops) {
4977 		/* Suspend the TX queue and get ready to send the BAR */
4978 		ATH_TX_LOCK(sc);
4979 		ath_tx_tid_bar_suspend(sc, atid);
4980 		ATH_TX_UNLOCK(sc);
4981 	}
4982 
4983 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4984 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
4985 
4986 	ATH_TX_LOCK(sc);
4987 
4988 	/* Prepend all frames to the beginning of the queue */
4989 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4990 		TAILQ_REMOVE(&bf_q, bf, bf_list);
4991 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4992 	}
4993 
4994 	/*
4995 	 * Reschedule to grab some further frames.
4996 	 */
4997 	ath_tx_tid_sched(sc, atid);
4998 
4999 	/*
5000 	 * If the queue is filtered, re-schedule as required.
5001 	 *
5002 	 * This is required as there may be a subsequent TX descriptor
5003 	 * for this end-node that has CLRDMASK set, so it's quite possible
5004 	 * that a filtered frame will be followed by a non-filtered
5005 	 * (complete or otherwise) frame.
5006 	 *
5007 	 * XXX should we do this before we complete the frame?
5008 	 */
5009 	if (atid->isfiltered)
5010 		ath_tx_tid_filt_comp_complete(sc, atid);
5011 
5012 finish_send_bar:
5013 
5014 	/*
5015 	 * Send BAR if required
5016 	 */
5017 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5018 		ath_tx_tid_bar_tx(sc, atid);
5019 
5020 	ATH_TX_UNLOCK(sc);
5021 
5022 	/* Do deferred completion */
5023 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5024 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5025 		ath_tx_default_comp(sc, bf, 0);
5026 	}
5027 }
5028 
5029 /*
5030  * Handle completion of unaggregated frames in an ADDBA
5031  * session.
5032  *
5033  * Fail is set to 1 if the entry is being freed via a call to
5034  * ath_tx_draintxq().
5035  */
5036 static void
5037 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
5038 {
5039 	struct ieee80211_node *ni = bf->bf_node;
5040 	struct ath_node *an = ATH_NODE(ni);
5041 	int tid = bf->bf_state.bfs_tid;
5042 	struct ath_tid *atid = &an->an_tid[tid];
5043 	struct ath_tx_status ts;
5044 	int drops = 0;
5045 
5046 	/*
5047 	 * Take a copy of this; filtering/cloning the frame may free the
5048 	 * bf pointer.
5049 	 */
5050 	ts = bf->bf_status.ds_txstat;
5051 
5052 	/*
5053 	 * Update rate control status here, before we possibly
5054 	 * punt to retry or cleanup.
5055 	 *
5056 	 * Do it outside of the TXQ lock.
5057 	 */
5058 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
5059 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
5060 		    &bf->bf_status.ds_txstat,
5061 		    bf->bf_state.bfs_pktlen,
5062 		    1, (ts.ts_status == 0) ? 0 : 1);
5063 
5064 	/*
5065 	 * This is called early so atid->hwq_depth can be tracked.
5066 	 * This unfortunately means that it's released and regrabbed
5067 	 * during retry and cleanup. That's rather inefficient.
5068 	 */
5069 	ATH_TX_LOCK(sc);
5070 
5071 	if (tid == IEEE80211_NONQOS_TID)
5072 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__);
5073 
5074 	DPRINTF(sc, ATH_DEBUG_SW_TX,
5075 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
5076 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
5077 	    SEQNO(bf->bf_state.bfs_seqno));
5078 
5079 	atid->hwq_depth--;
5080 	if (atid->hwq_depth < 0)
5081 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
5082 		    __func__, atid->hwq_depth);
5083 
5084 	/*
5085 	 * If the TID is filtered, handle completing the filter
5086 	 * transition before potentially kicking it to the cleanup
5087 	 * function.
5088 	 */
5089 	if (atid->isfiltered)
5090 		ath_tx_tid_filt_comp_complete(sc, atid);
5091 
5092 	/*
5093 	 * If a cleanup is in progress, punt to comp_cleanup;
5094 	 * rather than handling it here. It's thus their
5095 	 * responsibility to clean up, call the completion
5096 	 * function in net80211, etc.
5097 	 */
5098 	if (atid->cleanup_inprogress) {
5099 		if (atid->isfiltered)
5100 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5101 			    "%s: isfiltered=1, normal_comp?\n",
5102 			    __func__);
5103 		ATH_TX_UNLOCK(sc);
5104 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5105 		    __func__);
5106 		ath_tx_comp_cleanup_unaggr(sc, bf);
5107 		return;
5108 	}
5109 
5110 	/*
5111 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
5112 	 * overlap?
5113 	 *
5114 	 * If the frame is filtered OR if it's any failure but
5115 	 * the TID is filtered, the frame must be added to the
5116 	 * filtered frame list.
5117 	 *
5118 	 * However - a busy buffer can't be added to the filtered
5119 	 * list as it will end up being recycled without having
5120 	 * been made available for the hardware.
5121 	 */
5122 	if ((ts.ts_status & HAL_TXERR_FILT) ||
5123 	    (ts.ts_status != 0 && atid->isfiltered)) {
5124 		int freeframe;
5125 
5126 		if (fail != 0)
5127 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5128 			    "%s: isfiltered=1, fail=%d\n",
5129 			    __func__, fail);
5130 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
5131 		/*
5132 		 * If freeframe=0 then bf is no longer ours; don't
5133 		 * touch it.
5134 		 */
5135 		if (freeframe) {
5136 			/* Remove from BAW */
5137 			if (bf->bf_state.bfs_addedbaw)
5138 				drops++;
5139 			if (bf->bf_state.bfs_dobaw) {
5140 				ath_tx_update_baw(sc, an, atid, bf);
5141 				if (!bf->bf_state.bfs_addedbaw)
5142 					DPRINTF(sc, ATH_DEBUG_SW_TX,
5143 					    "%s: wasn't added: seqno %d\n",
5144 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
5145 			}
5146 			bf->bf_state.bfs_dobaw = 0;
5147 		}
5148 
5149 		/*
5150 		 * If the frame couldn't be filtered, treat it as a drop and
5151 		 * prepare to send a BAR.
5152 		 */
5153 		if (freeframe && drops)
5154 			ath_tx_tid_bar_suspend(sc, atid);
5155 
5156 		/*
5157 		 * Send BAR if required
5158 		 */
5159 		if (ath_tx_tid_bar_tx_ready(sc, atid))
5160 			ath_tx_tid_bar_tx(sc, atid);
5161 
5162 		ATH_TX_UNLOCK(sc);
5163 		/*
5164 		 * If freeframe is set, then the frame couldn't be
5165 		 * cloned and bf is still valid.  Just complete/free it.
5166 		 */
5167 		if (freeframe)
5168 			ath_tx_default_comp(sc, bf, fail);
5169 
5170 		return;
5171 	}
5172 	/*
5173 	 * Don't bother with the retry check if all frames
5174 	 * are being failed (eg during queue deletion.)
5175 	 */
5176 #if 0
5177 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5178 #endif
5179 	if (fail == 0 && ts.ts_status != 0) {
5180 		ATH_TX_UNLOCK(sc);
5181 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5182 		    __func__);
5183 		ath_tx_aggr_retry_unaggr(sc, bf);
5184 		return;
5185 	}
5186 
5187 	/* Success? Complete */
5188 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5189 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5190 	if (bf->bf_state.bfs_dobaw) {
5191 		ath_tx_update_baw(sc, an, atid, bf);
5192 		bf->bf_state.bfs_dobaw = 0;
5193 		if (!bf->bf_state.bfs_addedbaw)
5194 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5195 			    "%s: wasn't added: seqno %d\n",
5196 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
5197 	}
5198 
5199 	/*
5200 	 * If the queue is filtered, re-schedule as required.
5201 	 *
5202 	 * This is required as there may be a subsequent TX descriptor
5203 	 * for this end-node that has CLRDMASK set, so it's quite possible
5204 	 * that a filtered frame will be followed by a non-filtered
5205 	 * (complete or otherwise) frame.
5206 	 *
5207 	 * XXX should we do this before we complete the frame?
5208 	 */
5209 	if (atid->isfiltered)
5210 		ath_tx_tid_filt_comp_complete(sc, atid);
5211 
5212 	/*
5213 	 * Send BAR if required
5214 	 */
5215 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5216 		ath_tx_tid_bar_tx(sc, atid);
5217 
5218 	ATH_TX_UNLOCK(sc);
5219 
5220 	ath_tx_default_comp(sc, bf, fail);
5221 	/* bf is freed at this point */
5222 }
5223 
5224 void
5225 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5226 {
5227 	if (bf->bf_state.bfs_aggr)
5228 		ath_tx_aggr_comp_aggr(sc, bf, fail);
5229 	else
5230 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
5231 }
5232 
5233 /*
5234  * Schedule some packets from the given node/TID to the hardware.
5235  *
5236  * This is the aggregate version.
5237  */
5238 void
5239 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5240     struct ath_tid *tid)
5241 {
5242 	struct ath_buf *bf;
5243 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5244 	struct ieee80211_tx_ampdu *tap;
5245 	ATH_AGGR_STATUS status;
5246 	ath_bufhead bf_q;
5247 
5248 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5249 	ATH_TX_LOCK_ASSERT(sc);
5250 
5251 	/*
5252 	 * XXX TODO: If we're called for a queue that we're leaking frames to,
5253 	 * ensure we only leak one.
5254 	 */
5255 
5256 	tap = ath_tx_get_tx_tid(an, tid->tid);
5257 
5258 	if (tid->tid == IEEE80211_NONQOS_TID)
5259 		DPRINTF(sc, ATH_DEBUG_SW_TX,
5260 		    "%s: called for TID=NONQOS_TID?\n", __func__);
5261 
5262 	for (;;) {
5263 		status = ATH_AGGR_DONE;
5264 
5265 		/*
5266 		 * If the upper layer has paused the TID, don't
5267 		 * queue any further packets.
5268 		 *
5269 		 * This can also occur from the completion task because
5270 		 * of packet loss; but as its serialised with this code,
5271 		 * it won't "appear" half way through queuing packets.
5272 		 */
5273 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5274 			break;
5275 
5276 		bf = ATH_TID_FIRST(tid);
5277 		if (bf == NULL) {
5278 			break;
5279 		}
5280 
5281 		/*
5282 		 * If the packet doesn't fall within the BAW (eg a NULL
5283 		 * data frame), schedule it directly; continue.
5284 		 */
5285 		if (! bf->bf_state.bfs_dobaw) {
5286 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5287 			    "%s: non-baw packet\n",
5288 			    __func__);
5289 			ATH_TID_REMOVE(tid, bf, bf_list);
5290 
5291 			if (bf->bf_state.bfs_nframes > 1)
5292 				DPRINTF(sc, ATH_DEBUG_SW_TX,
5293 				    "%s: aggr=%d, nframes=%d\n",
5294 				    __func__,
5295 				    bf->bf_state.bfs_aggr,
5296 				    bf->bf_state.bfs_nframes);
5297 
5298 			/*
5299 			 * This shouldn't happen - such frames shouldn't
5300 			 * ever have been queued as an aggregate in the
5301 			 * first place.  However, make sure the fields
5302 			 * are correctly setup just to be totally sure.
5303 			 */
5304 			bf->bf_state.bfs_aggr = 0;
5305 			bf->bf_state.bfs_nframes = 1;
5306 
5307 			/* Update CLRDMASK just before this frame is queued */
5308 			ath_tx_update_clrdmask(sc, tid, bf);
5309 
5310 			ath_tx_do_ratelookup(sc, bf);
5311 			ath_tx_calc_duration(sc, bf);
5312 			ath_tx_calc_protection(sc, bf);
5313 			ath_tx_set_rtscts(sc, bf);
5314 			ath_tx_rate_fill_rcflags(sc, bf);
5315 			ath_tx_setds(sc, bf);
5316 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5317 
5318 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5319 
5320 			/* Queue the packet; continue */
5321 			goto queuepkt;
5322 		}
5323 
5324 		TAILQ_INIT(&bf_q);
5325 
5326 		/*
5327 		 * Do a rate control lookup on the first frame in the
5328 		 * list. The rate control code needs that to occur
5329 		 * before it can determine whether to TX.
5330 		 * It's inaccurate because the rate control code doesn't
5331 		 * really "do" aggregate lookups, so it only considers
5332 		 * the size of the first frame.
5333 		 */
5334 		ath_tx_do_ratelookup(sc, bf);
5335 		bf->bf_state.bfs_rc[3].rix = 0;
5336 		bf->bf_state.bfs_rc[3].tries = 0;
5337 
5338 		ath_tx_calc_duration(sc, bf);
5339 		ath_tx_calc_protection(sc, bf);
5340 
5341 		ath_tx_set_rtscts(sc, bf);
5342 		ath_tx_rate_fill_rcflags(sc, bf);
5343 
5344 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5345 
5346 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5347 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5348 
5349 		/*
5350 		 * No frames to be picked up - out of BAW
5351 		 */
5352 		if (TAILQ_EMPTY(&bf_q))
5353 			break;
5354 
5355 		/*
5356 		 * This assumes that the descriptor list in the ath_bufhead
5357 		 * are already linked together via bf_next pointers.
5358 		 */
5359 		bf = TAILQ_FIRST(&bf_q);
5360 
5361 		if (status == ATH_AGGR_8K_LIMITED)
5362 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5363 
5364 		/*
5365 		 * If it's the only frame send as non-aggregate
5366 		 * assume that ath_tx_form_aggr() has checked
5367 		 * whether it's in the BAW and added it appropriately.
5368 		 */
5369 		if (bf->bf_state.bfs_nframes == 1) {
5370 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5371 			    "%s: single-frame aggregate\n", __func__);
5372 
5373 			/* Update CLRDMASK just before this frame is queued */
5374 			ath_tx_update_clrdmask(sc, tid, bf);
5375 
5376 			bf->bf_state.bfs_aggr = 0;
5377 			bf->bf_state.bfs_ndelim = 0;
5378 			ath_tx_setds(sc, bf);
5379 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5380 			if (status == ATH_AGGR_BAW_CLOSED)
5381 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5382 			else
5383 				sc->sc_aggr_stats.aggr_single_pkt++;
5384 		} else {
5385 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5386 			    "%s: multi-frame aggregate: %d frames, "
5387 			    "length %d\n",
5388 			     __func__, bf->bf_state.bfs_nframes,
5389 			    bf->bf_state.bfs_al);
5390 			bf->bf_state.bfs_aggr = 1;
5391 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5392 			sc->sc_aggr_stats.aggr_aggr_pkt++;
5393 
5394 			/* Update CLRDMASK just before this frame is queued */
5395 			ath_tx_update_clrdmask(sc, tid, bf);
5396 
5397 			/*
5398 			 * Calculate the duration/protection as required.
5399 			 */
5400 			ath_tx_calc_duration(sc, bf);
5401 			ath_tx_calc_protection(sc, bf);
5402 
5403 			/*
5404 			 * Update the rate and rtscts information based on the
5405 			 * rate decision made by the rate control code;
5406 			 * the first frame in the aggregate needs it.
5407 			 */
5408 			ath_tx_set_rtscts(sc, bf);
5409 
5410 			/*
5411 			 * Setup the relevant descriptor fields
5412 			 * for aggregation. The first descriptor
5413 			 * already points to the rest in the chain.
5414 			 */
5415 			ath_tx_setds_11n(sc, bf);
5416 
5417 		}
5418 	queuepkt:
5419 		/* Set completion handler, multi-frame aggregate or not */
5420 		bf->bf_comp = ath_tx_aggr_comp;
5421 
5422 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5423 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__);
5424 
5425 		/*
5426 		 * Update leak count and frame config if were leaking frames.
5427 		 *
5428 		 * XXX TODO: it should update all frames in an aggregate
5429 		 * correctly!
5430 		 */
5431 		ath_tx_leak_count_update(sc, tid, bf);
5432 
5433 		/* Punt to txq */
5434 		ath_tx_handoff(sc, txq, bf);
5435 
5436 		/* Track outstanding buffer count to hardware */
5437 		/* aggregates are "one" buffer */
5438 		tid->hwq_depth++;
5439 
5440 		/*
5441 		 * Break out if ath_tx_form_aggr() indicated
5442 		 * there can't be any further progress (eg BAW is full.)
5443 		 * Checking for an empty txq is done above.
5444 		 *
5445 		 * XXX locking on txq here?
5446 		 */
5447 		/* XXX TXQ locking */
5448 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr ||
5449 		    (status == ATH_AGGR_BAW_CLOSED ||
5450 		     status == ATH_AGGR_LEAK_CLOSED))
5451 			break;
5452 	}
5453 }
5454 
5455 /*
5456  * Schedule some packets from the given node/TID to the hardware.
5457  *
5458  * XXX TODO: this routine doesn't enforce the maximum TXQ depth.
5459  * It just dumps frames into the TXQ.  We should limit how deep
5460  * the transmit queue can grow for frames dispatched to the given
5461  * TXQ.
5462  *
5463  * To avoid locking issues, either we need to own the TXQ lock
5464  * at this point, or we need to pass in the maximum frame count
5465  * from the caller.
5466  */
5467 void
5468 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5469     struct ath_tid *tid)
5470 {
5471 	struct ath_buf *bf;
5472 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5473 
5474 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5475 	    __func__, an, tid->tid);
5476 
5477 	ATH_TX_LOCK_ASSERT(sc);
5478 
5479 	/* Check - is AMPDU pending or running? then print out something */
5480 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
5481 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n",
5482 		    __func__, tid->tid);
5483 	if (ath_tx_ampdu_running(sc, an, tid->tid))
5484 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n",
5485 		    __func__, tid->tid);
5486 
5487 	for (;;) {
5488 
5489 		/*
5490 		 * If the upper layers have paused the TID, don't
5491 		 * queue any further packets.
5492 		 *
5493 		 * XXX if we are leaking frames, make sure we decrement
5494 		 * that counter _and_ we continue here.
5495 		 */
5496 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5497 			break;
5498 
5499 		bf = ATH_TID_FIRST(tid);
5500 		if (bf == NULL) {
5501 			break;
5502 		}
5503 
5504 		ATH_TID_REMOVE(tid, bf, bf_list);
5505 
5506 		/* Sanity check! */
5507 		if (tid->tid != bf->bf_state.bfs_tid) {
5508 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !="
5509 			    " tid %d\n", __func__, bf->bf_state.bfs_tid,
5510 			    tid->tid);
5511 		}
5512 		/* Normal completion handler */
5513 		bf->bf_comp = ath_tx_normal_comp;
5514 
5515 		/*
5516 		 * Override this for now, until the non-aggregate
5517 		 * completion handler correctly handles software retransmits.
5518 		 */
5519 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
5520 
5521 		/* Update CLRDMASK just before this frame is queued */
5522 		ath_tx_update_clrdmask(sc, tid, bf);
5523 
5524 		/* Program descriptors + rate control */
5525 		ath_tx_do_ratelookup(sc, bf);
5526 		ath_tx_calc_duration(sc, bf);
5527 		ath_tx_calc_protection(sc, bf);
5528 		ath_tx_set_rtscts(sc, bf);
5529 		ath_tx_rate_fill_rcflags(sc, bf);
5530 		ath_tx_setds(sc, bf);
5531 
5532 		/*
5533 		 * Update the current leak count if
5534 		 * we're leaking frames; and set the
5535 		 * MORE flag as appropriate.
5536 		 */
5537 		ath_tx_leak_count_update(sc, tid, bf);
5538 
5539 		/* Track outstanding buffer count to hardware */
5540 		/* aggregates are "one" buffer */
5541 		tid->hwq_depth++;
5542 
5543 		/* Punt to hardware or software txq */
5544 		ath_tx_handoff(sc, txq, bf);
5545 	}
5546 }
5547 
5548 /*
5549  * Schedule some packets to the given hardware queue.
5550  *
5551  * This function walks the list of TIDs (ie, ath_node TIDs
5552  * with queued traffic) and attempts to schedule traffic
5553  * from them.
5554  *
5555  * TID scheduling is implemented as a FIFO, with TIDs being
5556  * added to the end of the queue after some frames have been
5557  * scheduled.
5558  */
5559 void
5560 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5561 {
5562 	struct ath_tid *tid, *next, *last;
5563 
5564 	ATH_TX_LOCK_ASSERT(sc);
5565 
5566 	/*
5567 	 * Don't schedule if the hardware queue is busy.
5568 	 * This (hopefully) gives some more time to aggregate
5569 	 * some packets in the aggregation queue.
5570 	 *
5571 	 * XXX It doesn't stop a parallel sender from sneaking
5572 	 * in transmitting a frame!
5573 	 */
5574 	/* XXX TXQ locking */
5575 	if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
5576 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5577 		return;
5578 	}
5579 	if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5580 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5581 		return;
5582 	}
5583 
5584 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5585 
5586 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5587 		/*
5588 		 * Suspend paused queues here; they'll be resumed
5589 		 * once the addba completes or times out.
5590 		 */
5591 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5592 		    __func__, tid->tid, tid->paused);
5593 		ath_tx_tid_unsched(sc, tid);
5594 		/*
5595 		 * This node may be in power-save and we're leaking
5596 		 * a frame; be careful.
5597 		 */
5598 		if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5599 			goto loop_done;
5600 		}
5601 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5602 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5603 		else
5604 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5605 
5606 		/* Not empty? Re-schedule */
5607 		if (tid->axq_depth != 0)
5608 			ath_tx_tid_sched(sc, tid);
5609 
5610 		/*
5611 		 * Give the software queue time to aggregate more
5612 		 * packets.  If we aren't running aggregation then
5613 		 * we should still limit the hardware queue depth.
5614 		 */
5615 		/* XXX TXQ locking */
5616 		if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
5617 			break;
5618 		}
5619 		if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5620 			break;
5621 		}
5622 loop_done:
5623 		/*
5624 		 * If this was the last entry on the original list, stop.
5625 		 * Otherwise nodes that have been rescheduled onto the end
5626 		 * of the TID FIFO list will just keep being rescheduled.
5627 		 *
5628 		 * XXX What should we do about nodes that were paused
5629 		 * but are pending a leaking frame in response to a ps-poll?
5630 		 * They'll be put at the front of the list; so they'll
5631 		 * prematurely trigger this condition! Ew.
5632 		 */
5633 		if (tid == last)
5634 			break;
5635 	}
5636 }
5637 
5638 /*
5639  * TX addba handling
5640  */
5641 
5642 /*
5643  * Return net80211 TID struct pointer, or NULL for none
5644  */
5645 struct ieee80211_tx_ampdu *
5646 ath_tx_get_tx_tid(struct ath_node *an, int tid)
5647 {
5648 	struct ieee80211_node *ni = &an->an_node;
5649 	struct ieee80211_tx_ampdu *tap;
5650 
5651 	if (tid == IEEE80211_NONQOS_TID)
5652 		return NULL;
5653 
5654 	tap = &ni->ni_tx_ampdu[tid];
5655 	return tap;
5656 }
5657 
5658 /*
5659  * Is AMPDU-TX running?
5660  */
5661 static int
5662 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5663 {
5664 	struct ieee80211_tx_ampdu *tap;
5665 
5666 	if (tid == IEEE80211_NONQOS_TID)
5667 		return 0;
5668 
5669 	tap = ath_tx_get_tx_tid(an, tid);
5670 	if (tap == NULL)
5671 		return 0;	/* Not valid; default to not running */
5672 
5673 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5674 }
5675 
5676 /*
5677  * Is AMPDU-TX negotiation pending?
5678  */
5679 static int
5680 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5681 {
5682 	struct ieee80211_tx_ampdu *tap;
5683 
5684 	if (tid == IEEE80211_NONQOS_TID)
5685 		return 0;
5686 
5687 	tap = ath_tx_get_tx_tid(an, tid);
5688 	if (tap == NULL)
5689 		return 0;	/* Not valid; default to not pending */
5690 
5691 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5692 }
5693 
5694 /*
5695  * Is AMPDU-TX pending for the given TID?
5696  */
5697 
5698 
5699 /*
5700  * Method to handle sending an ADDBA request.
5701  *
5702  * We tap this so the relevant flags can be set to pause the TID
5703  * whilst waiting for the response.
5704  *
5705  * XXX there's no timeout handler we can override?
5706  */
5707 int
5708 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5709     int dialogtoken, int baparamset, int batimeout)
5710 {
5711 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5712 	int tid = tap->txa_tid;
5713 	struct ath_node *an = ATH_NODE(ni);
5714 	struct ath_tid *atid = &an->an_tid[tid];
5715 
5716 	/*
5717 	 * XXX danger Will Robinson!
5718 	 *
5719 	 * Although the taskqueue may be running and scheduling some more
5720 	 * packets, these should all be _before_ the addba sequence number.
5721 	 * However, net80211 will keep self-assigning sequence numbers
5722 	 * until addba has been negotiated.
5723 	 *
5724 	 * In the past, these packets would be "paused" (which still works
5725 	 * fine, as they're being scheduled to the driver in the same
5726 	 * serialised method which is calling the addba request routine)
5727 	 * and when the aggregation session begins, they'll be dequeued
5728 	 * as aggregate packets and added to the BAW. However, now there's
5729 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5730 	 * packets. Thus they never get included in the BAW tracking and
5731 	 * this can cause the initial burst of packets after the addba
5732 	 * negotiation to "hang", as they quickly fall outside the BAW.
5733 	 *
5734 	 * The "eventual" solution should be to tag these packets with
5735 	 * dobaw. Although net80211 has given us a sequence number,
5736 	 * it'll be "after" the left edge of the BAW and thus it'll
5737 	 * fall within it.
5738 	 */
5739 	ATH_TX_LOCK(sc);
5740 	/*
5741 	 * This is a bit annoying.  Until net80211 HT code inherits some
5742 	 * (any) locking, we may have this called in parallel BUT only
5743 	 * one response/timeout will be called.  Grr.
5744 	 */
5745 	if (atid->addba_tx_pending == 0) {
5746 		ath_tx_tid_pause(sc, atid);
5747 		atid->addba_tx_pending = 1;
5748 	}
5749 	ATH_TX_UNLOCK(sc);
5750 
5751 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5752 	    "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5753 	    __func__,
5754 	    ni->ni_macaddr,
5755 	    ":",
5756 	    dialogtoken, baparamset, batimeout);
5757 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5758 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5759 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5760 
5761 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5762 	    batimeout);
5763 }
5764 
5765 /*
5766  * Handle an ADDBA response.
5767  *
5768  * We unpause the queue so TX'ing can resume.
5769  *
5770  * Any packets TX'ed from this point should be "aggregate" (whether
5771  * aggregate or not) so the BAW is updated.
5772  *
5773  * Note! net80211 keeps self-assigning sequence numbers until
5774  * ampdu is negotiated. This means the initially-negotiated BAW left
5775  * edge won't match the ni->ni_txseq.
5776  *
5777  * So, being very dirty, the BAW left edge is "slid" here to match
5778  * ni->ni_txseq.
5779  *
5780  * What likely SHOULD happen is that all packets subsequent to the
5781  * addba request should be tagged as aggregate and queued as non-aggregate
5782  * frames; thus updating the BAW. For now though, I'll just slide the
5783  * window.
5784  */
5785 int
5786 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5787     int status, int code, int batimeout)
5788 {
5789 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5790 	int tid = tap->txa_tid;
5791 	struct ath_node *an = ATH_NODE(ni);
5792 	struct ath_tid *atid = &an->an_tid[tid];
5793 	int r;
5794 
5795 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5796 	    "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
5797 	    ni->ni_macaddr,
5798 	    ":",
5799 	    status, code, batimeout);
5800 
5801 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5802 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5803 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5804 
5805 	/*
5806 	 * Call this first, so the interface flags get updated
5807 	 * before the TID is unpaused. Otherwise a race condition
5808 	 * exists where the unpaused TID still doesn't yet have
5809 	 * IEEE80211_AGGR_RUNNING set.
5810 	 */
5811 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
5812 
5813 	ATH_TX_LOCK(sc);
5814 	atid->addba_tx_pending = 0;
5815 	/*
5816 	 * XXX dirty!
5817 	 * Slide the BAW left edge to wherever net80211 left it for us.
5818 	 * Read above for more information.
5819 	 */
5820 	tap->txa_start = ni->ni_txseqs[tid];
5821 	ath_tx_tid_resume(sc, atid);
5822 	ATH_TX_UNLOCK(sc);
5823 	return r;
5824 }
5825 
5826 
5827 /*
5828  * Stop ADDBA on a queue.
5829  *
5830  * This can be called whilst BAR TX is currently active on the queue,
5831  * so make sure this is unblocked before continuing.
5832  */
5833 void
5834 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
5835 {
5836 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5837 	int tid = tap->txa_tid;
5838 	struct ath_node *an = ATH_NODE(ni);
5839 	struct ath_tid *atid = &an->an_tid[tid];
5840 	ath_bufhead bf_cq;
5841 	struct ath_buf *bf;
5842 
5843 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
5844 	    __func__,
5845 	    ni->ni_macaddr,
5846 	    ":");
5847 
5848 	/*
5849 	 * Pause TID traffic early, so there aren't any races
5850 	 * Unblock the pending BAR held traffic, if it's currently paused.
5851 	 */
5852 	ATH_TX_LOCK(sc);
5853 	ath_tx_tid_pause(sc, atid);
5854 	if (atid->bar_wait) {
5855 		/*
5856 		 * bar_unsuspend() expects bar_tx == 1, as it should be
5857 		 * called from the TX completion path.  This quietens
5858 		 * the warning.  It's cleared for us anyway.
5859 		 */
5860 		atid->bar_tx = 1;
5861 		ath_tx_tid_bar_unsuspend(sc, atid);
5862 	}
5863 	ATH_TX_UNLOCK(sc);
5864 
5865 	/* There's no need to hold the TXQ lock here */
5866 	sc->sc_addba_stop(ni, tap);
5867 
5868 	/*
5869 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
5870 	 * it'll set the cleanup flag, and it'll be unpaused once
5871 	 * things have been cleaned up.
5872 	 */
5873 	TAILQ_INIT(&bf_cq);
5874 	ATH_TX_LOCK(sc);
5875 
5876 	/*
5877 	 * In case there's a followup call to this, only call it
5878 	 * if we don't have a cleanup in progress.
5879 	 *
5880 	 * Since we've paused the queue above, we need to make
5881 	 * sure we unpause if there's already a cleanup in
5882 	 * progress - it means something else is also doing
5883 	 * this stuff, so we don't need to also keep it paused.
5884 	 */
5885 	if (atid->cleanup_inprogress) {
5886 		ath_tx_tid_resume(sc, atid);
5887 	} else {
5888 		ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
5889 		/*
5890 		 * Unpause the TID if no cleanup is required.
5891 		 */
5892 		if (! atid->cleanup_inprogress)
5893 			ath_tx_tid_resume(sc, atid);
5894 	}
5895 	ATH_TX_UNLOCK(sc);
5896 
5897 	/* Handle completing frames and fail them */
5898 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5899 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5900 		ath_tx_default_comp(sc, bf, 1);
5901 	}
5902 
5903 }
5904 
5905 /*
5906  * Handle a node reassociation.
5907  *
5908  * We may have a bunch of frames queued to the hardware; those need
5909  * to be marked as cleanup.
5910  */
5911 void
5912 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
5913 {
5914 	struct ath_tid *tid;
5915 	int i;
5916 	ath_bufhead bf_cq;
5917 	struct ath_buf *bf;
5918 
5919 	TAILQ_INIT(&bf_cq);
5920 
5921 	ATH_TX_UNLOCK_ASSERT(sc);
5922 
5923 	ATH_TX_LOCK(sc);
5924 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
5925 		tid = &an->an_tid[i];
5926 		if (tid->hwq_depth == 0)
5927 			continue;
5928 		DPRINTF(sc, ATH_DEBUG_NODE,
5929 		    "%s: %6D: TID %d: cleaning up TID\n",
5930 		    __func__,
5931 		    an->an_node.ni_macaddr,
5932 		    ":",
5933 		    i);
5934 		/*
5935 		 * In case there's a followup call to this, only call it
5936 		 * if we don't have a cleanup in progress.
5937 		 */
5938 		if (! tid->cleanup_inprogress) {
5939 			ath_tx_tid_pause(sc, tid);
5940 			ath_tx_tid_cleanup(sc, an, i, &bf_cq);
5941 			/*
5942 			 * Unpause the TID if no cleanup is required.
5943 			 */
5944 			if (! tid->cleanup_inprogress)
5945 				ath_tx_tid_resume(sc, tid);
5946 		}
5947 	}
5948 	ATH_TX_UNLOCK(sc);
5949 
5950 	/* Handle completing frames and fail them */
5951 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5952 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5953 		ath_tx_default_comp(sc, bf, 1);
5954 	}
5955 }
5956 
5957 /*
5958  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
5959  * it simply tears down the aggregation session. Ew.
5960  *
5961  * It however will call ieee80211_ampdu_stop() which will call
5962  * ic->ic_addba_stop().
5963  *
5964  * XXX This uses a hard-coded max BAR count value; the whole
5965  * XXX BAR TX success or failure should be better handled!
5966  */
5967 void
5968 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5969     int status)
5970 {
5971 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5972 	int tid = tap->txa_tid;
5973 	struct ath_node *an = ATH_NODE(ni);
5974 	struct ath_tid *atid = &an->an_tid[tid];
5975 	int attempts = tap->txa_attempts;
5976 	int old_txa_start;
5977 
5978 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
5979 	    "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n",
5980 	    __func__,
5981 	    ni->ni_macaddr,
5982 	    ":",
5983 	    tap->txa_tid,
5984 	    atid->tid,
5985 	    status,
5986 	    attempts,
5987 	    tap->txa_start,
5988 	    tap->txa_seqpending);
5989 
5990 	/* Note: This may update the BAW details */
5991 	/*
5992 	 * XXX What if this does slide the BAW along? We need to somehow
5993 	 * XXX either fix things when it does happen, or prevent the
5994 	 * XXX seqpending value to be anything other than exactly what
5995 	 * XXX the hell we want!
5996 	 *
5997 	 * XXX So for now, how I do this inside the TX lock for now
5998 	 * XXX and just correct it afterwards? The below condition should
5999 	 * XXX never happen and if it does I need to fix all kinds of things.
6000 	 */
6001 	ATH_TX_LOCK(sc);
6002 	old_txa_start = tap->txa_start;
6003 	sc->sc_bar_response(ni, tap, status);
6004 	if (tap->txa_start != old_txa_start) {
6005 		device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n",
6006 		    __func__,
6007 		    tid,
6008 		    tap->txa_start,
6009 		    old_txa_start);
6010 	}
6011 	tap->txa_start = old_txa_start;
6012 	ATH_TX_UNLOCK(sc);
6013 
6014 	/* Unpause the TID */
6015 	/*
6016 	 * XXX if this is attempt=50, the TID will be downgraded
6017 	 * XXX to a non-aggregate session. So we must unpause the
6018 	 * XXX TID here or it'll never be done.
6019 	 *
6020 	 * Also, don't call it if bar_tx/bar_wait are 0; something
6021 	 * has beaten us to the punch? (XXX figure out what?)
6022 	 */
6023 	if (status == 0 || attempts == 50) {
6024 		ATH_TX_LOCK(sc);
6025 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
6026 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6027 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
6028 			    __func__,
6029 			    atid->bar_tx, atid->bar_wait);
6030 		else
6031 			ath_tx_tid_bar_unsuspend(sc, atid);
6032 		ATH_TX_UNLOCK(sc);
6033 	}
6034 }
6035 
6036 /*
6037  * This is called whenever the pending ADDBA request times out.
6038  * Unpause and reschedule the TID.
6039  */
6040 void
6041 ath_addba_response_timeout(struct ieee80211_node *ni,
6042     struct ieee80211_tx_ampdu *tap)
6043 {
6044 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6045 	int tid = tap->txa_tid;
6046 	struct ath_node *an = ATH_NODE(ni);
6047 	struct ath_tid *atid = &an->an_tid[tid];
6048 
6049 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6050 	    "%s: %6D: TID=%d, called; resuming\n",
6051 	    __func__,
6052 	    ni->ni_macaddr,
6053 	    ":",
6054 	    tid);
6055 
6056 	ATH_TX_LOCK(sc);
6057 	atid->addba_tx_pending = 0;
6058 	ATH_TX_UNLOCK(sc);
6059 
6060 	/* Note: This updates the aggregate state to (again) pending */
6061 	sc->sc_addba_response_timeout(ni, tap);
6062 
6063 	/* Unpause the TID; which reschedules it */
6064 	ATH_TX_LOCK(sc);
6065 	ath_tx_tid_resume(sc, atid);
6066 	ATH_TX_UNLOCK(sc);
6067 }
6068 
6069 /*
6070  * Check if a node is asleep or not.
6071  */
6072 int
6073 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
6074 {
6075 
6076 	ATH_TX_LOCK_ASSERT(sc);
6077 
6078 	return (an->an_is_powersave);
6079 }
6080 
6081 /*
6082  * Mark a node as currently "in powersaving."
6083  * This suspends all traffic on the node.
6084  *
6085  * This must be called with the node/tx locks free.
6086  *
6087  * XXX TODO: the locking silliness below is due to how the node
6088  * locking currently works.  Right now, the node lock is grabbed
6089  * to do rate control lookups and these are done with the TX
6090  * queue lock held.  This means the node lock can't be grabbed
6091  * first here or a LOR will occur.
6092  *
6093  * Eventually (hopefully!) the TX path code will only grab
6094  * the TXQ lock when transmitting and the ath_node lock when
6095  * doing node/TID operations.  There are other complications -
6096  * the sched/unsched operations involve walking the per-txq
6097  * 'active tid' list and this requires both locks to be held.
6098  */
6099 void
6100 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
6101 {
6102 	struct ath_tid *atid;
6103 	struct ath_txq *txq;
6104 	int tid;
6105 
6106 	ATH_TX_UNLOCK_ASSERT(sc);
6107 
6108 	/* Suspend all traffic on the node */
6109 	ATH_TX_LOCK(sc);
6110 
6111 	if (an->an_is_powersave) {
6112 		DPRINTF(sc, ATH_DEBUG_XMIT,
6113 		    "%s: %6D: node was already asleep!\n",
6114 		    __func__, an->an_node.ni_macaddr, ":");
6115 		ATH_TX_UNLOCK(sc);
6116 		return;
6117 	}
6118 
6119 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6120 		atid = &an->an_tid[tid];
6121 		txq = sc->sc_ac2q[atid->ac];
6122 
6123 		ath_tx_tid_pause(sc, atid);
6124 	}
6125 
6126 	/* Mark node as in powersaving */
6127 	an->an_is_powersave = 1;
6128 
6129 	ATH_TX_UNLOCK(sc);
6130 }
6131 
6132 /*
6133  * Mark a node as currently "awake."
6134  * This resumes all traffic to the node.
6135  */
6136 void
6137 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
6138 {
6139 	struct ath_tid *atid;
6140 	struct ath_txq *txq;
6141 	int tid;
6142 
6143 	ATH_TX_UNLOCK_ASSERT(sc);
6144 
6145 	ATH_TX_LOCK(sc);
6146 
6147 	/* !? */
6148 	if (an->an_is_powersave == 0) {
6149 		ATH_TX_UNLOCK(sc);
6150 		DPRINTF(sc, ATH_DEBUG_XMIT,
6151 		    "%s: an=%p: node was already awake\n",
6152 		    __func__, an);
6153 		return;
6154 	}
6155 
6156 	/* Mark node as awake */
6157 	an->an_is_powersave = 0;
6158 	/*
6159 	 * Clear any pending leaked frame requests
6160 	 */
6161 	an->an_leak_count = 0;
6162 
6163 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6164 		atid = &an->an_tid[tid];
6165 		txq = sc->sc_ac2q[atid->ac];
6166 
6167 		ath_tx_tid_resume(sc, atid);
6168 	}
6169 	ATH_TX_UNLOCK(sc);
6170 }
6171 
6172 static int
6173 ath_legacy_dma_txsetup(struct ath_softc *sc)
6174 {
6175 
6176 	/* nothing new needed */
6177 	return (0);
6178 }
6179 
6180 static int
6181 ath_legacy_dma_txteardown(struct ath_softc *sc)
6182 {
6183 
6184 	/* nothing new needed */
6185 	return (0);
6186 }
6187 
6188 void
6189 ath_xmit_setup_legacy(struct ath_softc *sc)
6190 {
6191 	/*
6192 	 * For now, just set the descriptor length to sizeof(ath_desc);
6193 	 * worry about extracting the real length out of the HAL later.
6194 	 */
6195 	sc->sc_tx_desclen = sizeof(struct ath_desc);
6196 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
6197 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
6198 
6199 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
6200 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6201 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6202 
6203 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6204 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6205 
6206 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
6207 }
6208