1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32 #include <sys/cdefs.h>
33 /*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39
40 #include "opt_inet.h"
41 #include "opt_ath.h"
42 /*
43 * This is needed for register operations which are performed
44 * by the driver - eg, calls to ath_hal_gettsf32().
45 *
46 * It's also required for any AH_DEBUG checks in here, eg the
47 * module dependencies.
48 */
49 #include "opt_ah.h"
50 #include "opt_wlan.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysctl.h>
55 #include <sys/mbuf.h>
56 #include <sys/malloc.h>
57 #include <sys/lock.h>
58 #include <sys/mutex.h>
59 #include <sys/kernel.h>
60 #include <sys/socket.h>
61 #include <sys/sockio.h>
62 #include <sys/errno.h>
63 #include <sys/callout.h>
64 #include <sys/bus.h>
65 #include <sys/endian.h>
66 #include <sys/kthread.h>
67 #include <sys/taskqueue.h>
68 #include <sys/priv.h>
69 #include <sys/module.h>
70 #include <sys/ktr.h>
71 #include <sys/smp.h> /* for mp_ncpus */
72
73 #include <machine/bus.h>
74
75 #include <net/if.h>
76 #include <net/if_var.h>
77 #include <net/if_dl.h>
78 #include <net/if_media.h>
79 #include <net/if_types.h>
80 #include <net/if_arp.h>
81 #include <net/ethernet.h>
82 #include <net/if_llc.h>
83
84 #include <net80211/ieee80211_var.h>
85 #include <net80211/ieee80211_regdomain.h>
86 #ifdef IEEE80211_SUPPORT_SUPERG
87 #include <net80211/ieee80211_superg.h>
88 #endif
89
90 #include <net/bpf.h>
91
92 #ifdef INET
93 #include <netinet/in.h>
94 #include <netinet/if_ether.h>
95 #endif
96
97 #include <dev/ath/if_athvar.h>
98
99 #include <dev/ath/if_ath_debug.h>
100 #include <dev/ath/if_ath_misc.h>
101 #include <dev/ath/if_ath_tx.h>
102 #include <dev/ath/if_ath_beacon.h>
103
104 #ifdef ATH_TX99_DIAG
105 #include <dev/ath/ath_tx99/ath_tx99.h>
106 #endif
107
108 /*
109 * Setup a h/w transmit queue for beacons.
110 */
111 int
ath_beaconq_setup(struct ath_softc * sc)112 ath_beaconq_setup(struct ath_softc *sc)
113 {
114 struct ath_hal *ah = sc->sc_ah;
115 HAL_TXQ_INFO qi;
116
117 memset(&qi, 0, sizeof(qi));
118 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
119 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
120 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
121 /* NB: for dynamic turbo, don't enable any other interrupts */
122 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
123 if (sc->sc_isedma)
124 qi.tqi_qflags |= HAL_TXQ_TXOKINT_ENABLE |
125 HAL_TXQ_TXERRINT_ENABLE;
126
127 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
128 }
129
130 /*
131 * Setup the transmit queue parameters for the beacon queue.
132 */
133 int
ath_beaconq_config(struct ath_softc * sc)134 ath_beaconq_config(struct ath_softc *sc)
135 {
136 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1)
137 struct ieee80211com *ic = &sc->sc_ic;
138 struct ath_hal *ah = sc->sc_ah;
139 HAL_TXQ_INFO qi;
140
141 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
142 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
143 ic->ic_opmode == IEEE80211_M_MBSS) {
144 /*
145 * Always burst out beacon and CAB traffic.
146 */
147 qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT;
148 qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
149 qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
150 } else {
151 struct chanAccParams chp;
152 struct wmeParams *wmep;
153
154 ieee80211_wme_ic_getparams(ic, &chp);
155 wmep = &chp.cap_wmeParams[WME_AC_BE];
156
157 /*
158 * Adhoc mode; important thing is to use 2x cwmin.
159 */
160 qi.tqi_aifs = wmep->wmep_aifsn;
161 qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
162 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
163 }
164
165 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
166 device_printf(sc->sc_dev, "unable to update parameters for "
167 "beacon hardware queue!\n");
168 return 0;
169 } else {
170 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
171 return 1;
172 }
173 #undef ATH_EXPONENT_TO_VALUE
174 }
175
176 /*
177 * Allocate and setup an initial beacon frame.
178 */
179 int
ath_beacon_alloc(struct ath_softc * sc,struct ieee80211_node * ni)180 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
181 {
182 struct ieee80211vap *vap = ni->ni_vap;
183 struct ath_vap *avp = ATH_VAP(vap);
184 struct ath_buf *bf;
185 struct mbuf *m;
186 int error;
187
188 bf = avp->av_bcbuf;
189 DPRINTF(sc, ATH_DEBUG_NODE, "%s: bf_m=%p, bf_node=%p\n",
190 __func__, bf->bf_m, bf->bf_node);
191 if (bf->bf_m != NULL) {
192 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
193 m_freem(bf->bf_m);
194 bf->bf_m = NULL;
195 }
196 if (bf->bf_node != NULL) {
197 ieee80211_free_node(bf->bf_node);
198 bf->bf_node = NULL;
199 }
200
201 /*
202 * NB: the beacon data buffer must be 32-bit aligned;
203 * we assume the mbuf routines will return us something
204 * with this alignment (perhaps should assert).
205 */
206 m = ieee80211_beacon_alloc(ni);
207 if (m == NULL) {
208 device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__);
209 sc->sc_stats.ast_be_nombuf++;
210 return ENOMEM;
211 }
212 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
213 bf->bf_segs, &bf->bf_nseg,
214 BUS_DMA_NOWAIT);
215 if (error != 0) {
216 device_printf(sc->sc_dev,
217 "%s: cannot map mbuf, bus_dmamap_load_mbuf_sg returns %d\n",
218 __func__, error);
219 m_freem(m);
220 return error;
221 }
222
223 /*
224 * Calculate a TSF adjustment factor required for staggered
225 * beacons. Note that we assume the format of the beacon
226 * frame leaves the tstamp field immediately following the
227 * header.
228 */
229 if (sc->sc_stagbeacons && avp->av_bslot > 0) {
230 uint64_t tsfadjust;
231 struct ieee80211_frame *wh;
232
233 /*
234 * The beacon interval is in TU's; the TSF is in usecs.
235 * We figure out how many TU's to add to align the timestamp
236 * then convert to TSF units and handle byte swapping before
237 * inserting it in the frame. The hardware will then add this
238 * each time a beacon frame is sent. Note that we align vap's
239 * 1..N and leave vap 0 untouched. This means vap 0 has a
240 * timestamp in one beacon interval while the others get a
241 * timstamp aligned to the next interval.
242 */
243 tsfadjust = ni->ni_intval *
244 (ATH_BCBUF - avp->av_bslot) / ATH_BCBUF;
245 tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */
246
247 DPRINTF(sc, ATH_DEBUG_BEACON,
248 "%s: %s beacons bslot %d intval %u tsfadjust %llu\n",
249 __func__, sc->sc_stagbeacons ? "stagger" : "burst",
250 avp->av_bslot, ni->ni_intval,
251 (long long unsigned) le64toh(tsfadjust));
252
253 wh = mtod(m, struct ieee80211_frame *);
254 memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust));
255 }
256 bf->bf_m = m;
257 bf->bf_node = ieee80211_ref_node(ni);
258
259 return 0;
260 }
261
262 /*
263 * Setup the beacon frame for transmit.
264 */
265 static void
ath_beacon_setup(struct ath_softc * sc,struct ath_buf * bf)266 ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf)
267 {
268 #define USE_SHPREAMBLE(_ic) \
269 (((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\
270 == IEEE80211_F_SHPREAMBLE)
271 struct ieee80211_node *ni = bf->bf_node;
272 struct ieee80211com *ic = ni->ni_ic;
273 struct mbuf *m = bf->bf_m;
274 struct ath_hal *ah = sc->sc_ah;
275 struct ath_desc *ds;
276 int flags, antenna;
277 const HAL_RATE_TABLE *rt;
278 u_int8_t rix, rate;
279 HAL_DMA_ADDR bufAddrList[4];
280 uint32_t segLenList[4];
281 HAL_11N_RATE_SERIES rc[4];
282
283 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n",
284 __func__, m, m->m_len);
285
286 /* setup descriptors */
287 ds = bf->bf_desc;
288 bf->bf_last = bf;
289 bf->bf_lastds = ds;
290
291 flags = HAL_TXDESC_NOACK;
292 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
293 /* self-linked descriptor */
294 ath_hal_settxdesclink(sc->sc_ah, ds, bf->bf_daddr);
295 flags |= HAL_TXDESC_VEOL;
296 /*
297 * Let hardware handle antenna switching.
298 */
299 antenna = sc->sc_txantenna;
300 } else {
301 ath_hal_settxdesclink(sc->sc_ah, ds, 0);
302 /*
303 * Switch antenna every 4 beacons.
304 * XXX assumes two antenna
305 */
306 if (sc->sc_txantenna != 0)
307 antenna = sc->sc_txantenna;
308 else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0)
309 antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1);
310 else
311 antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1);
312 }
313
314 KASSERT(bf->bf_nseg == 1,
315 ("multi-segment beacon frame; nseg %u", bf->bf_nseg));
316
317 /*
318 * Calculate rate code.
319 * XXX everything at min xmit rate
320 */
321 rix = 0;
322 rt = sc->sc_currates;
323 rate = rt->info[rix].rateCode;
324 if (USE_SHPREAMBLE(ic))
325 rate |= rt->info[rix].shortPreamble;
326 ath_hal_setuptxdesc(ah, ds
327 , m->m_len + IEEE80211_CRC_LEN /* frame length */
328 , sizeof(struct ieee80211_frame)/* header length */
329 , HAL_PKT_TYPE_BEACON /* Atheros packet type */
330 , ieee80211_get_node_txpower(ni) /* txpower XXX */
331 , rate, 1 /* series 0 rate/tries */
332 , HAL_TXKEYIX_INVALID /* no encryption */
333 , antenna /* antenna mode */
334 , flags /* no ack, veol for beacons */
335 , 0 /* rts/cts rate */
336 , 0 /* rts/cts duration */
337 );
338
339 /*
340 * The EDMA HAL currently assumes that _all_ rate control
341 * settings are done in ath_hal_set11nratescenario(), rather
342 * than in ath_hal_setuptxdesc().
343 */
344 if (sc->sc_isedma) {
345 memset(&rc, 0, sizeof(rc));
346
347 rc[0].ChSel = sc->sc_txchainmask;
348 rc[0].Tries = 1;
349 rc[0].Rate = rt->info[rix].rateCode;
350 rc[0].RateIndex = rix;
351 rc[0].tx_power_cap = 0x3f;
352 rc[0].PktDuration =
353 ath_hal_computetxtime(ah, rt, roundup(m->m_len, 4),
354 rix, 0, AH_TRUE);
355 ath_hal_set11nratescenario(ah, ds, 0, 0, rc, 4, flags);
356 }
357
358 /* NB: beacon's BufLen must be a multiple of 4 bytes */
359 segLenList[0] = roundup(m->m_len, 4);
360 segLenList[1] = segLenList[2] = segLenList[3] = 0;
361 bufAddrList[0] = bf->bf_segs[0].ds_addr;
362 bufAddrList[1] = bufAddrList[2] = bufAddrList[3] = 0;
363 ath_hal_filltxdesc(ah, ds
364 , bufAddrList
365 , segLenList
366 , 0 /* XXX desc id */
367 , sc->sc_bhalq /* hardware TXQ */
368 , AH_TRUE /* first segment */
369 , AH_TRUE /* last segment */
370 , ds /* first descriptor */
371 );
372 #if 0
373 ath_desc_swap(ds);
374 #endif
375 #undef USE_SHPREAMBLE
376 }
377
378 void
ath_beacon_update(struct ieee80211vap * vap,int item)379 ath_beacon_update(struct ieee80211vap *vap, int item)
380 {
381 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off;
382
383 setbit(bo->bo_flags, item);
384 }
385
386 /*
387 * Handle a beacon miss.
388 */
389 void
ath_beacon_miss(struct ath_softc * sc)390 ath_beacon_miss(struct ath_softc *sc)
391 {
392 HAL_SURVEY_SAMPLE hs;
393 HAL_BOOL ret;
394 uint32_t hangs;
395
396 bzero(&hs, sizeof(hs));
397
398 ret = ath_hal_get_mib_cycle_counts(sc->sc_ah, &hs);
399
400 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) && hangs != 0) {
401 DPRINTF(sc, ATH_DEBUG_BEACON,
402 "%s: hang=0x%08x\n",
403 __func__,
404 hangs);
405 }
406
407 #ifdef ATH_DEBUG_ALQ
408 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_MISSED_BEACON))
409 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_MISSED_BEACON, 0, NULL);
410 #endif
411
412 DPRINTF(sc, ATH_DEBUG_BEACON,
413 "%s: valid=%d, txbusy=%u, rxbusy=%u, chanbusy=%u, "
414 "extchanbusy=%u, cyclecount=%u\n",
415 __func__,
416 ret,
417 hs.tx_busy,
418 hs.rx_busy,
419 hs.chan_busy,
420 hs.ext_chan_busy,
421 hs.cycle_count);
422 }
423
424 /*
425 * Transmit a beacon frame at SWBA. Dynamic updates to the
426 * frame contents are done as needed and the slot time is
427 * also adjusted based on current state.
428 */
429 void
ath_beacon_proc(void * arg,int pending)430 ath_beacon_proc(void *arg, int pending)
431 {
432 struct ath_softc *sc = arg;
433 struct ath_hal *ah = sc->sc_ah;
434 struct ieee80211vap *vap;
435 struct ath_buf *bf;
436 int slot, otherant;
437 uint32_t bfaddr;
438
439 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n",
440 __func__, pending);
441 /*
442 * Check if the previous beacon has gone out. If
443 * not don't try to post another, skip this period
444 * and wait for the next. Missed beacons indicate
445 * a problem and should not occur. If we miss too
446 * many consecutive beacons reset the device.
447 */
448 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
449 sc->sc_bmisscount++;
450 sc->sc_stats.ast_be_missed++;
451 ath_beacon_miss(sc);
452 DPRINTF(sc, ATH_DEBUG_BEACON,
453 "%s: missed %u consecutive beacons\n",
454 __func__, sc->sc_bmisscount);
455 if (sc->sc_bmisscount >= ath_bstuck_threshold)
456 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
457 return;
458 }
459 if (sc->sc_bmisscount != 0) {
460 DPRINTF(sc, ATH_DEBUG_BEACON,
461 "%s: resume beacon xmit after %u misses\n",
462 __func__, sc->sc_bmisscount);
463 sc->sc_bmisscount = 0;
464 #ifdef ATH_DEBUG_ALQ
465 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_RESUME_BEACON))
466 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_RESUME_BEACON, 0, NULL);
467 #endif
468 }
469
470 if (sc->sc_stagbeacons) { /* staggered beacons */
471 struct ieee80211com *ic = &sc->sc_ic;
472 uint32_t tsftu;
473
474 tsftu = ath_hal_gettsf32(ah) >> 10;
475 /* XXX lintval */
476 slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval;
477 vap = sc->sc_bslot[(slot+1) % ATH_BCBUF];
478 bfaddr = 0;
479 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
480 bf = ath_beacon_generate(sc, vap);
481 if (bf != NULL)
482 bfaddr = bf->bf_daddr;
483 }
484 } else { /* burst'd beacons */
485 uint32_t *bflink = &bfaddr;
486
487 for (slot = 0; slot < ATH_BCBUF; slot++) {
488 vap = sc->sc_bslot[slot];
489 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
490 bf = ath_beacon_generate(sc, vap);
491 /*
492 * XXX TODO: this should use settxdesclinkptr()
493 * otherwise it won't work for EDMA chipsets!
494 */
495 if (bf != NULL) {
496 /* XXX should do this using the ds */
497 *bflink = bf->bf_daddr;
498 ath_hal_gettxdesclinkptr(sc->sc_ah,
499 bf->bf_desc, &bflink);
500 }
501 }
502 }
503 /*
504 * XXX TODO: this should use settxdesclinkptr()
505 * otherwise it won't work for EDMA chipsets!
506 */
507 *bflink = 0; /* terminate list */
508 }
509
510 /*
511 * Handle slot time change when a non-ERP station joins/leaves
512 * an 11g network. The 802.11 layer notifies us via callback,
513 * we mark updateslot, then wait one beacon before effecting
514 * the change. This gives associated stations at least one
515 * beacon interval to note the state change.
516 */
517 /* XXX locking */
518 if (sc->sc_updateslot == UPDATE) {
519 sc->sc_updateslot = COMMIT; /* commit next beacon */
520 sc->sc_slotupdate = slot;
521 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
522 ath_setslottime(sc); /* commit change to h/w */
523
524 /*
525 * Check recent per-antenna transmit statistics and flip
526 * the default antenna if noticeably more frames went out
527 * on the non-default antenna.
528 * XXX assumes 2 anntenae
529 */
530 if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) {
531 otherant = sc->sc_defant & 1 ? 2 : 1;
532 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
533 ath_setdefantenna(sc, otherant);
534 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
535 }
536
537 /* Program the CABQ with the contents of the CABQ txq and start it */
538 ATH_TXQ_LOCK(sc->sc_cabq);
539 ath_beacon_cabq_start(sc);
540 ATH_TXQ_UNLOCK(sc->sc_cabq);
541
542 /* Program the new beacon frame if we have one for this interval */
543 if (bfaddr != 0) {
544 /*
545 * Stop any current dma and put the new frame on the queue.
546 * This should never fail since we check above that no frames
547 * are still pending on the queue.
548 */
549 if (! sc->sc_isedma) {
550 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
551 DPRINTF(sc, ATH_DEBUG_ANY,
552 "%s: beacon queue %u did not stop?\n",
553 __func__, sc->sc_bhalq);
554 }
555 }
556 /* NB: cabq traffic should already be queued and primed */
557
558 ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr);
559 ath_hal_txstart(ah, sc->sc_bhalq);
560
561 sc->sc_stats.ast_be_xmit++;
562 }
563 }
564
565 static void
ath_beacon_cabq_start_edma(struct ath_softc * sc)566 ath_beacon_cabq_start_edma(struct ath_softc *sc)
567 {
568 struct ath_buf *bf, *bf_last;
569 struct ath_txq *cabq = sc->sc_cabq;
570 #if 0
571 struct ath_buf *bfi;
572 int i = 0;
573 #endif
574
575 ATH_TXQ_LOCK_ASSERT(cabq);
576
577 if (TAILQ_EMPTY(&cabq->axq_q))
578 return;
579 bf = TAILQ_FIRST(&cabq->axq_q);
580 bf_last = TAILQ_LAST(&cabq->axq_q, axq_q_s);
581
582 /*
583 * This is a dirty, dirty hack to push the contents of
584 * the cabq staging queue into the FIFO.
585 *
586 * This ideally should live in the EDMA code file
587 * and only push things into the CABQ if there's a FIFO
588 * slot.
589 *
590 * We can't treat this like a normal TX queue because
591 * in the case of multi-VAP traffic, we may have to flush
592 * the CABQ each new (staggered) beacon that goes out.
593 * But for non-staggered beacons, we could in theory
594 * handle multicast traffic for all VAPs in one FIFO
595 * push. Just keep all of this in mind if you're wondering
596 * how to correctly/better handle multi-VAP CABQ traffic
597 * with EDMA.
598 */
599
600 /*
601 * Is the CABQ FIFO free? If not, complain loudly and
602 * don't queue anything. Maybe we'll flush the CABQ
603 * traffic, maybe we won't. But that'll happen next
604 * beacon interval.
605 */
606 if (cabq->axq_fifo_depth >= HAL_TXFIFO_DEPTH) {
607 device_printf(sc->sc_dev,
608 "%s: Q%d: CAB FIFO queue=%d?\n",
609 __func__,
610 cabq->axq_qnum,
611 cabq->axq_fifo_depth);
612 return;
613 }
614
615 /*
616 * Ok, so here's the gymnastics reqiured to make this
617 * all sensible.
618 */
619
620 /*
621 * Tag the first/last buffer appropriately.
622 */
623 bf->bf_flags |= ATH_BUF_FIFOPTR;
624 bf_last->bf_flags |= ATH_BUF_FIFOEND;
625
626 #if 0
627 i = 0;
628 TAILQ_FOREACH(bfi, &cabq->axq_q, bf_list) {
629 ath_printtxbuf(sc, bf, cabq->axq_qnum, i, 0);
630 i++;
631 }
632 #endif
633
634 /*
635 * We now need to push this set of frames onto the tail
636 * of the FIFO queue. We don't adjust the aggregate
637 * count, only the queue depth counter(s).
638 * We also need to blank the link pointer now.
639 */
640 TAILQ_CONCAT(&cabq->fifo.axq_q, &cabq->axq_q, bf_list);
641 cabq->axq_link = NULL;
642 cabq->fifo.axq_depth += cabq->axq_depth;
643 cabq->axq_depth = 0;
644
645 /* Bump FIFO queue */
646 cabq->axq_fifo_depth++;
647
648 /* Push the first entry into the hardware */
649 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
650 cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
651
652 /* NB: gated by beacon so safe to start here */
653 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
654
655 }
656
657 static void
ath_beacon_cabq_start_legacy(struct ath_softc * sc)658 ath_beacon_cabq_start_legacy(struct ath_softc *sc)
659 {
660 struct ath_buf *bf;
661 struct ath_txq *cabq = sc->sc_cabq;
662
663 ATH_TXQ_LOCK_ASSERT(cabq);
664 if (TAILQ_EMPTY(&cabq->axq_q))
665 return;
666 bf = TAILQ_FIRST(&cabq->axq_q);
667
668 /* Push the first entry into the hardware */
669 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
670 cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
671
672 /* NB: gated by beacon so safe to start here */
673 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
674 }
675
676 /*
677 * Start CABQ transmission - this assumes that all frames are prepped
678 * and ready in the CABQ.
679 */
680 void
ath_beacon_cabq_start(struct ath_softc * sc)681 ath_beacon_cabq_start(struct ath_softc *sc)
682 {
683 struct ath_txq *cabq = sc->sc_cabq;
684
685 ATH_TXQ_LOCK_ASSERT(cabq);
686
687 if (TAILQ_EMPTY(&cabq->axq_q))
688 return;
689
690 if (sc->sc_isedma)
691 ath_beacon_cabq_start_edma(sc);
692 else
693 ath_beacon_cabq_start_legacy(sc);
694 }
695
696 struct ath_buf *
ath_beacon_generate(struct ath_softc * sc,struct ieee80211vap * vap)697 ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
698 {
699 struct ath_vap *avp = ATH_VAP(vap);
700 struct ath_txq *cabq = sc->sc_cabq;
701 struct ath_buf *bf;
702 struct mbuf *m;
703 int nmcastq, error;
704
705 KASSERT(vap->iv_state >= IEEE80211_S_RUN,
706 ("not running, state %d", vap->iv_state));
707 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
708
709 /*
710 * Update dynamic beacon contents. If this returns
711 * non-zero then we need to remap the memory because
712 * the beacon frame changed size (probably because
713 * of the TIM bitmap).
714 */
715 bf = avp->av_bcbuf;
716 m = bf->bf_m;
717 /* XXX lock mcastq? */
718 nmcastq = avp->av_mcastq.axq_depth;
719
720 if (ieee80211_beacon_update(bf->bf_node, m, nmcastq)) {
721 /* XXX too conservative? */
722 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
723 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
724 bf->bf_segs, &bf->bf_nseg,
725 BUS_DMA_NOWAIT);
726 if (error != 0) {
727 if_printf(vap->iv_ifp,
728 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
729 __func__, error);
730 return NULL;
731 }
732 }
733 if ((vap->iv_bcn_off.bo_tim[4] & 1) && cabq->axq_depth) {
734 DPRINTF(sc, ATH_DEBUG_BEACON,
735 "%s: cabq did not drain, mcastq %u cabq %u\n",
736 __func__, nmcastq, cabq->axq_depth);
737 sc->sc_stats.ast_cabq_busy++;
738 if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) {
739 /*
740 * CABQ traffic from a previous vap is still pending.
741 * We must drain the q before this beacon frame goes
742 * out as otherwise this vap's stations will get cab
743 * frames from a different vap.
744 * XXX could be slow causing us to miss DBA
745 */
746 /*
747 * XXX TODO: this doesn't stop CABQ DMA - it assumes
748 * that since we're about to transmit a beacon, we've
749 * already stopped transmitting on the CABQ. But this
750 * doesn't at all mean that the CABQ DMA QCU will
751 * accept a new TXDP! So what, should we do a DMA
752 * stop? What if it fails?
753 *
754 * More thought is required here.
755 */
756 /*
757 * XXX can we even stop TX DMA here? Check what the
758 * reference driver does for cabq for beacons, given
759 * that stopping TX requires RX is paused.
760 */
761 ath_tx_draintxq(sc, cabq);
762 }
763 }
764 ath_beacon_setup(sc, bf);
765 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
766
767 /*
768 * XXX TODO: tie into net80211 for quiet time IE update and program
769 * local AP timer if we require it. The process of updating the
770 * beacon will also update the IE with the relevant counters.
771 */
772
773 /*
774 * Enable the CAB queue before the beacon queue to
775 * insure cab frames are triggered by this beacon.
776 */
777 if (vap->iv_bcn_off.bo_tim[4] & 1) {
778 /* NB: only at DTIM */
779 ATH_TXQ_LOCK(&avp->av_mcastq);
780 if (nmcastq) {
781 struct ath_buf *bfm, *bfc_last;
782
783 /*
784 * Move frames from the s/w mcast q to the h/w cab q.
785 *
786 * XXX TODO: if we chain together multiple VAPs
787 * worth of CABQ traffic, should we keep the
788 * MORE data bit set on the last frame of each
789 * intermediary VAP (ie, only clear the MORE
790 * bit of the last frame on the last vap?)
791 */
792 bfm = TAILQ_FIRST(&avp->av_mcastq.axq_q);
793 ATH_TXQ_LOCK(cabq);
794
795 /*
796 * If there's already a frame on the CABQ, we
797 * need to link to the end of the last frame.
798 * We can't use axq_link here because
799 * EDMA descriptors require some recalculation
800 * (checksum) to occur.
801 */
802 bfc_last = ATH_TXQ_LAST(cabq, axq_q_s);
803 if (bfc_last != NULL) {
804 ath_hal_settxdesclink(sc->sc_ah,
805 bfc_last->bf_lastds,
806 bfm->bf_daddr);
807 }
808 ath_txqmove(cabq, &avp->av_mcastq);
809 ATH_TXQ_UNLOCK(cabq);
810 /*
811 * XXX not entirely accurate, in case a mcast
812 * queue frame arrived before we grabbed the TX
813 * lock.
814 */
815 sc->sc_stats.ast_cabq_xmit += nmcastq;
816 }
817 ATH_TXQ_UNLOCK(&avp->av_mcastq);
818 }
819 return bf;
820 }
821
822 void
ath_beacon_start_adhoc(struct ath_softc * sc,struct ieee80211vap * vap)823 ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap)
824 {
825 struct ath_vap *avp = ATH_VAP(vap);
826 struct ath_hal *ah = sc->sc_ah;
827 struct ath_buf *bf;
828 struct mbuf *m;
829 int error;
830
831 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
832
833 /*
834 * Update dynamic beacon contents. If this returns
835 * non-zero then we need to remap the memory because
836 * the beacon frame changed size (probably because
837 * of the TIM bitmap).
838 */
839 bf = avp->av_bcbuf;
840 m = bf->bf_m;
841 if (ieee80211_beacon_update(bf->bf_node, m, 0)) {
842 /* XXX too conservative? */
843 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
844 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
845 bf->bf_segs, &bf->bf_nseg,
846 BUS_DMA_NOWAIT);
847 if (error != 0) {
848 if_printf(vap->iv_ifp,
849 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
850 __func__, error);
851 return;
852 }
853 }
854 ath_beacon_setup(sc, bf);
855 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
856
857 /* NB: caller is known to have already stopped tx dma */
858 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
859 ath_hal_txstart(ah, sc->sc_bhalq);
860 }
861
862 /*
863 * Reclaim beacon resources and return buffer to the pool.
864 */
865 void
ath_beacon_return(struct ath_softc * sc,struct ath_buf * bf)866 ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf)
867 {
868
869 DPRINTF(sc, ATH_DEBUG_NODE, "%s: free bf=%p, bf_m=%p, bf_node=%p\n",
870 __func__, bf, bf->bf_m, bf->bf_node);
871 if (bf->bf_m != NULL) {
872 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
873 m_freem(bf->bf_m);
874 bf->bf_m = NULL;
875 }
876 if (bf->bf_node != NULL) {
877 ieee80211_free_node(bf->bf_node);
878 bf->bf_node = NULL;
879 }
880 TAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
881 }
882
883 /*
884 * Reclaim beacon resources.
885 */
886 void
ath_beacon_free(struct ath_softc * sc)887 ath_beacon_free(struct ath_softc *sc)
888 {
889 struct ath_buf *bf;
890
891 TAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
892 DPRINTF(sc, ATH_DEBUG_NODE,
893 "%s: free bf=%p, bf_m=%p, bf_node=%p\n",
894 __func__, bf, bf->bf_m, bf->bf_node);
895 if (bf->bf_m != NULL) {
896 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
897 m_freem(bf->bf_m);
898 bf->bf_m = NULL;
899 }
900 if (bf->bf_node != NULL) {
901 ieee80211_free_node(bf->bf_node);
902 bf->bf_node = NULL;
903 }
904 }
905 }
906
907 /*
908 * Configure the beacon and sleep timers.
909 *
910 * When operating as an AP this resets the TSF and sets
911 * up the hardware to notify us when we need to issue beacons.
912 *
913 * When operating in station mode this sets up the beacon
914 * timers according to the timestamp of the last received
915 * beacon and the current TSF, configures PCF and DTIM
916 * handling, programs the sleep registers so the hardware
917 * will wakeup in time to receive beacons, and configures
918 * the beacon miss handling so we'll receive a BMISS
919 * interrupt when we stop seeing beacons from the AP
920 * we've associated with.
921 */
922 void
ath_beacon_config(struct ath_softc * sc,struct ieee80211vap * vap)923 ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap)
924 {
925 #define TSF_TO_TU(_h,_l) \
926 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
927 #define FUDGE 2
928 struct ath_hal *ah = sc->sc_ah;
929 struct ath_vap *avp;
930 struct ieee80211com *ic = &sc->sc_ic;
931 struct ieee80211_node *ni;
932 u_int32_t nexttbtt, intval, tsftu;
933 u_int32_t nexttbtt_u8, intval_u8;
934 u_int64_t tsf, tsf_beacon;
935
936 if (vap == NULL)
937 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
938 /*
939 * Just ensure that we aren't being called when the last
940 * VAP is destroyed.
941 */
942 if (vap == NULL) {
943 device_printf(sc->sc_dev, "%s: called with no VAPs\n",
944 __func__);
945 return;
946 }
947
948 /* Now that we have a vap, we can do this bit */
949 avp = ATH_VAP(vap);
950
951 ni = ieee80211_ref_node(vap->iv_bss);
952
953 ATH_LOCK(sc);
954 ath_power_set_power_state(sc, HAL_PM_AWAKE);
955 ATH_UNLOCK(sc);
956
957 /* Always clear the quiet IE timers; let the next update program them */
958 ath_hal_set_quiet(ah, 0, 0, 0, HAL_QUIET_DISABLE);
959 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie));
960
961 /* extract tstamp from last beacon and convert to TU */
962 nexttbtt = TSF_TO_TU(le32dec(ni->ni_tstamp.data + 4),
963 le32dec(ni->ni_tstamp.data));
964
965 tsf_beacon = ((uint64_t) le32dec(ni->ni_tstamp.data + 4)) << 32;
966 tsf_beacon |= le32dec(ni->ni_tstamp.data);
967
968 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
969 ic->ic_opmode == IEEE80211_M_MBSS) {
970 /*
971 * For multi-bss ap/mesh support beacons are either staggered
972 * evenly over N slots or burst together. For the former
973 * arrange for the SWBA to be delivered for each slot.
974 * Slots that are not occupied will generate nothing.
975 */
976 /* NB: the beacon interval is kept internally in TU's */
977 intval = ni->ni_intval & HAL_BEACON_PERIOD;
978 if (sc->sc_stagbeacons)
979 intval /= ATH_BCBUF;
980 } else {
981 /* NB: the beacon interval is kept internally in TU's */
982 intval = ni->ni_intval & HAL_BEACON_PERIOD;
983 }
984
985 /*
986 * Note: rounding up to the next intval can cause problems with
987 * bad APs when we're in powersave mode.
988 *
989 * In STA mode with powersave enabled, beacons are only received
990 * whenever the beacon timer fires to wake up the hardware.
991 * Now, if this is rounded up to the next intval, it assumes
992 * that the AP has started transmitting beacons at TSF values that
993 * are multiples of intval, versus say being 25 TU off.
994 *
995 * The specification (802.11-2012 10.1.3.2 - Beacon Generation in
996 * Infrastructure Networks) requires APs be beaconing at a
997 * multiple of intval. So, if bintval=100, then we shouldn't
998 * get beacons at intervals other than around multiples of 100.
999 */
1000 if (nexttbtt == 0) /* e.g. for ap mode */
1001 nexttbtt = intval;
1002 else
1003 nexttbtt = roundup(nexttbtt, intval);
1004
1005 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
1006 __func__, nexttbtt, intval, ni->ni_intval);
1007 if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) {
1008 HAL_BEACON_STATE bs;
1009 int dtimperiod, dtimcount;
1010 int cfpperiod, cfpcount;
1011
1012 /*
1013 * Setup dtim and cfp parameters according to
1014 * last beacon we received (which may be none).
1015 */
1016 dtimperiod = ni->ni_dtim_period;
1017 if (dtimperiod <= 0) /* NB: 0 if not known */
1018 dtimperiod = 1;
1019 dtimcount = ni->ni_dtim_count;
1020 if (dtimcount >= dtimperiod) /* NB: sanity check */
1021 dtimcount = 0; /* XXX? */
1022 cfpperiod = 1; /* NB: no PCF support yet */
1023 cfpcount = 0;
1024 /*
1025 * Pull nexttbtt forward to reflect the current
1026 * TSF and calculate dtim+cfp state for the result.
1027 */
1028 tsf = ath_hal_gettsf64(ah);
1029 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
1030
1031 DPRINTF(sc, ATH_DEBUG_BEACON,
1032 "%s: beacon tsf=%llu, hw tsf=%llu, nexttbtt=%u, tsftu=%u\n",
1033 __func__,
1034 (unsigned long long) tsf_beacon,
1035 (unsigned long long) tsf,
1036 nexttbtt,
1037 tsftu);
1038 DPRINTF(sc, ATH_DEBUG_BEACON,
1039 "%s: beacon tsf=%llu, hw tsf=%llu, tsf delta=%lld\n",
1040 __func__,
1041 (unsigned long long) tsf_beacon,
1042 (unsigned long long) tsf,
1043 (long long) tsf -
1044 (long long) tsf_beacon);
1045
1046 DPRINTF(sc, ATH_DEBUG_BEACON,
1047 "%s: nexttbtt=%llu, beacon tsf delta=%lld\n",
1048 __func__,
1049 (unsigned long long) nexttbtt,
1050 (long long) ((long long) nexttbtt * 1024LL) - (long long) tsf_beacon);
1051
1052 /* XXX cfpcount? */
1053
1054 if (nexttbtt > tsftu) {
1055 uint32_t countdiff, oldtbtt, remainder;
1056
1057 oldtbtt = nexttbtt;
1058 remainder = (nexttbtt - tsftu) % intval;
1059 nexttbtt = tsftu + remainder;
1060
1061 countdiff = (oldtbtt - nexttbtt) / intval % dtimperiod;
1062 if (dtimcount > countdiff) {
1063 dtimcount -= countdiff;
1064 } else {
1065 dtimcount += dtimperiod - countdiff;
1066 }
1067 } else { //nexttbtt <= tsftu
1068 uint32_t countdiff, oldtbtt, remainder;
1069
1070 oldtbtt = nexttbtt;
1071 remainder = (tsftu - nexttbtt) % intval;
1072 nexttbtt = tsftu - remainder + intval;
1073 countdiff = (nexttbtt - oldtbtt) / intval % dtimperiod;
1074 if (dtimcount > countdiff) {
1075 dtimcount -= countdiff;
1076 } else {
1077 dtimcount += dtimperiod - countdiff;
1078 }
1079 }
1080
1081 DPRINTF(sc, ATH_DEBUG_BEACON,
1082 "%s: adj nexttbtt=%llu, rx tsf delta=%lld\n",
1083 __func__,
1084 (unsigned long long) nexttbtt,
1085 (long long) ((long long)nexttbtt * 1024LL) - (long long)tsf);
1086
1087 memset(&bs, 0, sizeof(bs));
1088 bs.bs_intval = intval;
1089 bs.bs_nexttbtt = nexttbtt;
1090 bs.bs_dtimperiod = dtimperiod*intval;
1091 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
1092 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
1093 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
1094 bs.bs_cfpmaxduration = 0;
1095 #if 0
1096 /*
1097 * The 802.11 layer records the offset to the DTIM
1098 * bitmap while receiving beacons; use it here to
1099 * enable h/w detection of our AID being marked in
1100 * the bitmap vector (to indicate frames for us are
1101 * pending at the AP).
1102 * XXX do DTIM handling in s/w to WAR old h/w bugs
1103 * XXX enable based on h/w rev for newer chips
1104 */
1105 bs.bs_timoffset = ni->ni_timoff;
1106 #endif
1107 /*
1108 * Calculate the number of consecutive beacons to miss
1109 * before taking a BMISS interrupt.
1110 * Note that we clamp the result to at most 10 beacons.
1111 */
1112 bs.bs_bmissthreshold = vap->iv_bmissthreshold;
1113 if (bs.bs_bmissthreshold > 10)
1114 bs.bs_bmissthreshold = 10;
1115 else if (bs.bs_bmissthreshold <= 0)
1116 bs.bs_bmissthreshold = 1;
1117
1118 /*
1119 * Calculate sleep duration. The configuration is
1120 * given in ms. We insure a multiple of the beacon
1121 * period is used. Also, if the sleep duration is
1122 * greater than the DTIM period then it makes senses
1123 * to make it a multiple of that.
1124 *
1125 * XXX fixed at 100ms
1126 */
1127 bs.bs_sleepduration =
1128 roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval);
1129 if (bs.bs_sleepduration > bs.bs_dtimperiod)
1130 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1131
1132 DPRINTF(sc, ATH_DEBUG_BEACON,
1133 "%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u "
1134 "nextdtim %u bmiss %u sleep %u cfp:period %u "
1135 "maxdur %u next %u timoffset %u\n"
1136 , __func__
1137 , tsf
1138 , tsftu
1139 , bs.bs_intval
1140 , bs.bs_nexttbtt
1141 , bs.bs_dtimperiod
1142 , bs.bs_nextdtim
1143 , bs.bs_bmissthreshold
1144 , bs.bs_sleepduration
1145 , bs.bs_cfpperiod
1146 , bs.bs_cfpmaxduration
1147 , bs.bs_cfpnext
1148 , bs.bs_timoffset
1149 );
1150 ath_hal_intrset(ah, 0);
1151 ath_hal_beacontimers(ah, &bs);
1152 sc->sc_imask |= HAL_INT_BMISS;
1153 ath_hal_intrset(ah, sc->sc_imask);
1154 } else {
1155 ath_hal_intrset(ah, 0);
1156 if (nexttbtt == intval)
1157 intval |= HAL_BEACON_RESET_TSF;
1158 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1159 /*
1160 * In IBSS mode enable the beacon timers but only
1161 * enable SWBA interrupts if we need to manually
1162 * prepare beacon frames. Otherwise we use a
1163 * self-linked tx descriptor and let the hardware
1164 * deal with things.
1165 */
1166 intval |= HAL_BEACON_ENA;
1167 if (!sc->sc_hasveol)
1168 sc->sc_imask |= HAL_INT_SWBA;
1169 if ((intval & HAL_BEACON_RESET_TSF) == 0) {
1170 /*
1171 * Pull nexttbtt forward to reflect
1172 * the current TSF.
1173 */
1174 tsf = ath_hal_gettsf64(ah);
1175 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
1176 do {
1177 nexttbtt += intval;
1178 } while (nexttbtt < tsftu);
1179 }
1180 ath_beaconq_config(sc);
1181 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
1182 ic->ic_opmode == IEEE80211_M_MBSS) {
1183 /*
1184 * In AP/mesh mode we enable the beacon timers
1185 * and SWBA interrupts to prepare beacon frames.
1186 */
1187 intval |= HAL_BEACON_ENA;
1188 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
1189 ath_beaconq_config(sc);
1190 }
1191
1192 /*
1193 * Now dirty things because for now, the EDMA HAL has
1194 * nexttbtt and intval is TU/8.
1195 */
1196 if (sc->sc_isedma) {
1197 nexttbtt_u8 = (nexttbtt << 3);
1198 intval_u8 = (intval << 3);
1199 if (intval & HAL_BEACON_ENA)
1200 intval_u8 |= HAL_BEACON_ENA;
1201 if (intval & HAL_BEACON_RESET_TSF)
1202 intval_u8 |= HAL_BEACON_RESET_TSF;
1203 ath_hal_beaconinit(ah, nexttbtt_u8, intval_u8);
1204 } else
1205 ath_hal_beaconinit(ah, nexttbtt, intval);
1206 sc->sc_bmisscount = 0;
1207 ath_hal_intrset(ah, sc->sc_imask);
1208 /*
1209 * When using a self-linked beacon descriptor in
1210 * ibss mode load it once here.
1211 */
1212 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
1213 ath_beacon_start_adhoc(sc, vap);
1214 }
1215 ieee80211_free_node(ni);
1216
1217 ATH_LOCK(sc);
1218 ath_power_restore_power_state(sc);
1219 ATH_UNLOCK(sc);
1220 #undef FUDGE
1221 #undef TSF_TO_TU
1222 }
1223