1 /* $NetBSD: ad1848_isa.c,v 1.40 2019/06/08 08:02:38 isaki Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Ken Hornstein and John Kohl.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31 /*
32 * Copyright (c) 1994 John Brezak
33 * Copyright (c) 1991-1993 Regents of the University of California.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the Computer Systems
47 * Engineering Group at Lawrence Berkeley Laboratory.
48 * 4. Neither the name of the University nor of the Laboratory may be used
49 * to endorse or promote products derived from this software without
50 * specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 * SUCH DAMAGE.
63 *
64 */
65
66 /*
67 * Copyright by Hannu Savolainen 1994
68 *
69 * Redistribution and use in source and binary forms, with or without
70 * modification, are permitted provided that the following conditions are
71 * met: 1. Redistributions of source code must retain the above copyright
72 * notice, this list of conditions and the following disclaimer. 2.
73 * Redistributions in binary form must reproduce the above copyright notice,
74 * this list of conditions and the following disclaimer in the documentation
75 * and/or other materials provided with the distribution.
76 *
77 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
78 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
79 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
80 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
81 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
82 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
83 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
84 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
85 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
86 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
87 * SUCH DAMAGE.
88 *
89 */
90 /*
91 * Portions of this code are from the VOXware support for the ad1848
92 * by Hannu Savolainen <hannu@voxware.pp.fi>
93 *
94 * Portions also supplied from the SoundBlaster driver for NetBSD.
95 */
96
97 #include <sys/cdefs.h>
98 __KERNEL_RCSID(0, "$NetBSD: ad1848_isa.c,v 1.40 2019/06/08 08:02:38 isaki Exp $");
99
100 #include <sys/param.h>
101 #include <sys/systm.h>
102 #include <sys/errno.h>
103 #include <sys/ioctl.h>
104 #include <sys/syslog.h>
105 #include <sys/device.h>
106 #include <sys/proc.h>
107 #include <sys/buf.h>
108 #include <sys/cpu.h>
109 #include <sys/bus.h>
110 #include <sys/audioio.h>
111 #include <sys/malloc.h>
112
113 #include <dev/audio/audio_if.h>
114
115 #include <dev/isa/isavar.h>
116 #include <dev/isa/isadmavar.h>
117
118 #include <dev/ic/ad1848reg.h>
119 #include <dev/ic/cs4231reg.h>
120 #include <dev/ic/cs4237reg.h>
121 #include <dev/isa/ad1848var.h>
122 #include <dev/isa/cs4231var.h>
123
124 #ifdef AUDIO_DEBUG
125 #define DPRINTF(x) if (ad1848debug) printf x
126 extern int ad1848debug;
127 #else
128 #define DPRINTF(x)
129 #endif
130
131 static int ad1848_isa_read( struct ad1848_softc *, int);
132 static void ad1848_isa_write( struct ad1848_softc *, int, int);
133
134 int
ad1848_isa_read(struct ad1848_softc * sc,int index)135 ad1848_isa_read(struct ad1848_softc *sc, int index)
136 {
137
138 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, index);
139 }
140
141 void
ad1848_isa_write(struct ad1848_softc * sc,int index,int value)142 ad1848_isa_write(struct ad1848_softc *sc, int index, int value)
143 {
144
145 bus_space_write_1(sc->sc_iot, sc->sc_ioh, index, value);
146 }
147
148 /*
149 * Map and probe for the ad1848 chip
150 */
151 int
ad1848_isa_mapprobe(struct ad1848_isa_softc * isc,int iobase)152 ad1848_isa_mapprobe(struct ad1848_isa_softc *isc, int iobase)
153 {
154 struct ad1848_softc *sc;
155
156 sc = &isc->sc_ad1848;
157 if (!AD1848_BASE_VALID(iobase)) {
158 #ifdef AUDIO_DEBUG
159 printf("ad1848: configured iobase %04x invalid\n", iobase);
160 #endif
161 return 0;
162 }
163
164 /* Map the AD1848 ports */
165 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
166 return 0;
167
168 if (!ad1848_isa_probe(isc)) {
169 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
170 return 0;
171 } else
172 return 1;
173 }
174
175 /*
176 * Probe for the ad1848 chip
177 */
178 int
ad1848_isa_probe(struct ad1848_isa_softc * isc)179 ad1848_isa_probe(struct ad1848_isa_softc *isc)
180 {
181 struct ad1848_softc *sc;
182 u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
183 int i, t;
184
185 sc = &isc->sc_ad1848;
186 sc->sc_readreg = ad1848_isa_read;
187 sc->sc_writereg = ad1848_isa_write;
188
189 /* Is there an ad1848 chip ? */
190 sc->MCE_bit = MODE_CHANGE_ENABLE;
191 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */
192
193 /*
194 * Check that the I/O address is in use.
195 *
196 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the
197 * chip has performed its power-on initialization. Just assume
198 * this has happened before the OS is starting.
199 *
200 * If the I/O address is unused, inb() typically returns 0xff.
201 */
202 tmp = ADREAD(sc, AD1848_IADDR);
203 if (tmp & SP_IN_INIT) { /* Not a AD1848 */
204 DPRINTF(("ad_detect_A %x\n", tmp));
205 goto bad;
206 }
207
208 /*
209 * Test if it's possible to change contents of the indirect registers.
210 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read
211 * only so try to avoid using it. The bit 0x20 is the mic preamp
212 * enable; on some chips it is always the same in both registers, so
213 * we avoid tests where they are different.
214 */
215 ad_write(sc, 0, 0x8a);
216 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */
217 tmp1 = ad_read(sc, 0);
218 tmp2 = ad_read(sc, 1);
219
220 if (tmp1 != 0x8a || tmp2 != 0x45) {
221 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2));
222 goto bad;
223 }
224
225 ad_write(sc, 0, 0x65);
226 ad_write(sc, 1, 0xaa);
227 tmp1 = ad_read(sc, 0);
228 tmp2 = ad_read(sc, 1);
229
230 if (tmp1 != 0x65 || tmp2 != 0xaa) {
231 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2));
232 goto bad;
233 }
234
235 /*
236 * The indirect register I12 has some read only bits. Lets
237 * try to change them.
238 */
239 tmp = ad_read(sc, SP_MISC_INFO);
240 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
241
242 /* Here, AD1845 may sometimes be busy. Wait til it becomes ready. */
243 for (t = 0; t < 100000 && ADREAD(sc, AD1848_IADDR) & SP_IN_INIT; t++)
244 ;
245 #ifdef AUDIO_DEBUG
246 if (t)
247 DPRINTF(("ad1848_isa_probe: t %d\n", t));
248 #endif
249
250 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
251 DPRINTF(("ad_detect_D (%x)\n", tmp1));
252 goto bad;
253 }
254
255 /*
256 * MSB and 4 LSBs of the reg I12 tell the chip revision.
257 *
258 * A preliminary version of the AD1846 data sheet stated that it
259 * used an ID field of 0x0B. The current version, however,
260 * states that the AD1846 uses ID 0x0A, just like the AD1848K.
261 *
262 * this switch statement will need updating as newer clones arrive....
263 */
264 switch (tmp1 & 0x8f) {
265 case 0x09:
266 sc->chip_name = "AD1848J";
267 break;
268 case 0x0A:
269 sc->chip_name = "AD1848K";
270 break;
271 #if 0 /* See above */
272 case 0x0B:
273 sc->chip_name = "AD1846";
274 break;
275 #endif
276 case 0x81:
277 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
278 break;
279 case 0x89:
280 sc->chip_name = "CS4248";
281 break;
282 case 0x8A:
283 sc->chip_name = "broken"; /* CS4231/AD1845; see below */
284 break;
285 default:
286 sc->chip_name = "unknown";
287 DPRINTF(("ad1848: unknown codec version 0x%02x\n",
288 tmp1 & 0x8f));
289 break;
290 }
291
292 /*
293 * The original AD1848/CS4248 has just 16 indirect registers. This
294 * means that I0 and I16 should return the same value (etc.).
295 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test
296 * fails with CS4231, AD1845, etc.
297 */
298 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */
299
300 for (i = 0; i < 16; i++)
301 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
302 if (i != SP_TEST_AND_INIT) {
303 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2));
304 goto bad;
305 }
306 }
307
308 /*
309 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit
310 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845.
311 */
312 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */
313
314 tmp1 = ad_read(sc, SP_MISC_INFO);
315 if ((tmp1 & 0xc0) == (0x80 | MODE2)) {
316 /*
317 * CS4231 or AD1845 detected - is it?
318 *
319 * Verify that setting I2 doesn't change I18.
320 */
321 ad_write(sc, 18, 0x88); /* Set I18 to known value */
322
323 ad_write(sc, 2, 0x45);
324 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
325 ad_write(sc, 2, 0xaa);
326 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */
327 DPRINTF(("ad_detect_H(%x)\n", tmp2));
328 goto bad;
329 }
330
331 sc->mode = 2;
332
333 /*
334 * It's a CS4231, or another clone with 32 registers.
335 * Let's find out which by checking I25.
336 */
337 if ((tmp1 & 0x8f) == 0x8a) {
338 tmp1 = ad_read(sc, CS_VERSION_ID);
339 switch (tmp1 & 0xe7) {
340 case 0xA0:
341 sc->chip_name = "CS4231A";
342 break;
343 case 0x80:
344 /* XXX I25 no good, AD1845 same as CS4231 */
345 /*
346 * XXX
347 * This test is correct only after reset
348 */
349 if (ad_read(sc, 17) & 0xf0) {
350 sc->chip_name = "AD1845";
351 sc->is_ad1845 = 1;
352 } else
353 sc->chip_name = "CS4231";
354 break;
355 case 0x82:
356 sc->chip_name = "CS4232";
357 break;
358 case 0xa2:
359 sc->chip_name = "CS4232C";
360 break;
361 case 0x03:
362 case 0x83:
363 sc->chip_name = "CS4236";
364
365 /*
366 * Try to switch to mode3 (CS4236B or
367 * CS4237B) by setting CMS to 3. A
368 * plain CS4236 will not react to
369 * LLBM settings.
370 */
371 ad_write(sc, SP_MISC_INFO, MODE3);
372
373 tmp1 = ad_read(sc, CS_LEFT_LINE_CONTROL);
374 ad_write(sc, CS_LEFT_LINE_CONTROL, 0xe0);
375 tmp2 = ad_read(sc, CS_LEFT_LINE_CONTROL);
376 if (tmp2 == 0xe0) {
377 /*
378 * it's a CS4237B or another
379 * clone supporting mode 3.
380 * Let's determine which by
381 * enabling extended registers
382 * and checking X25.
383 */
384 tmp2 = ad_xread(sc, CS_X_CHIP_VERSION);
385 switch (tmp2 & X_CHIP_VERSIONF_CID) {
386 case X_CHIP_CID_CS4236BB:
387 sc->chip_name = "CS4236BrevB";
388 break;
389 case X_CHIP_CID_CS4236B:
390 sc->chip_name = "CS4236B";
391 break;
392 case X_CHIP_CID_CS4237B:
393 sc->chip_name = "CS4237B";
394 break;
395 default:
396 sc->chip_name = "CS4236B compatible";
397 DPRINTF(("cs4236: unknown mode 3 compatible codec, version 0x%02x\n", tmp2));
398 break;
399 }
400 sc->mode = 3;
401 }
402
403 /* restore volume control information */
404 ad_write(sc, CS_LEFT_LINE_CONTROL, tmp1);
405 break;
406 }
407 }
408 }
409 }
410
411 /* Wait for 1848 to init */
412 while (ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
413 ;
414
415 /* Wait for 1848 to autocal */
416 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
417 while (ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
418 ;
419
420 return 1;
421 bad:
422 return 0;
423 }
424
425 /* Unmap the I/O ports */
426 void
ad1848_isa_unmap(struct ad1848_isa_softc * isc)427 ad1848_isa_unmap(struct ad1848_isa_softc *isc)
428 {
429 struct ad1848_softc *sc;
430
431 sc = &isc->sc_ad1848;
432 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
433 }
434
435 /*
436 * Attach hardware to driver, attach hardware driver to audio
437 * pseudo-device driver .
438 */
439 void
ad1848_isa_attach(struct ad1848_isa_softc * isc)440 ad1848_isa_attach(struct ad1848_isa_softc *isc)
441 {
442 struct ad1848_softc *sc;
443 int error;
444
445 sc = &isc->sc_ad1848;
446 sc->sc_readreg = ad1848_isa_read;
447 sc->sc_writereg = ad1848_isa_write;
448
449 if (isc->sc_playdrq != -1) {
450 isc->sc_play_maxsize = isa_dmamaxsize(isc->sc_ic,
451 isc->sc_playdrq);
452 error = isa_dmamap_create(isc->sc_ic, isc->sc_playdrq,
453 isc->sc_play_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
454 if (error) {
455 aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n",
456 isc->sc_playdrq);
457 return;
458 }
459 }
460 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
461 isc->sc_rec_maxsize = isa_dmamaxsize(isc->sc_ic,
462 isc->sc_recdrq);
463 error = isa_dmamap_create(isc->sc_ic, isc->sc_recdrq,
464 isc->sc_rec_maxsize, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
465 if (error) {
466 aprint_error_dev(sc->sc_dev, "can't create map for drq %d\n",
467 isc->sc_recdrq);
468 isa_dmamap_destroy(isc->sc_ic, isc->sc_playdrq);
469 return;
470 }
471 }
472
473 ad1848_attach(sc);
474 }
475
476 int
ad1848_isa_open(void * addr,int flags)477 ad1848_isa_open(void *addr, int flags)
478 {
479 struct ad1848_isa_softc *isc;
480 struct ad1848_softc *sc;
481 int error, state;
482
483 isc = addr;
484 sc = &isc->sc_ad1848;
485 DPRINTF(("ad1848_isa_open: sc=%p\n", isc));
486 state = 0;
487
488 if (isc->sc_playdrq != -1) {
489 error = isa_drq_alloc(isc->sc_ic, isc->sc_playdrq);
490 if (error != 0)
491 return EBUSY;
492 state |= 1;
493 }
494 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) {
495 error = isa_drq_alloc(isc->sc_ic, isc->sc_recdrq);
496 if (error != 0)
497 goto bad;
498 state |= 2;
499 }
500
501 #ifndef AUDIO_NO_POWER_CTL
502 /* Power-up chip */
503 if (isc->powerctl) {
504 KASSERT(mutex_owned(&sc->sc_intr_lock));
505 isc->powerctl(isc->powerarg, flags);
506 }
507 #endif
508
509 /* Init and mute wave output */
510 ad1848_mute_wave_output(sc, WAVE_MUTE2_INIT, 1);
511
512 error = ad1848_open(sc, flags);
513 if (error) {
514 #ifndef AUDIO_NO_POWER_CTL
515 if (isc->powerctl) {
516 KASSERT(mutex_owned(&sc->sc_intr_lock));
517 isc->powerctl(isc->powerarg, 0);
518 }
519 #endif
520 goto bad;
521 }
522
523 DPRINTF(("ad1848_isa_open: opened\n"));
524 return 0;
525
526 bad:
527 if (state & 1)
528 isa_drq_free(isc->sc_ic, isc->sc_playdrq);
529 if (state & 2)
530 isa_drq_free(isc->sc_ic, isc->sc_recdrq);
531
532 return error;
533 }
534
535 void
ad1848_isa_close(void * addr)536 ad1848_isa_close(void *addr)
537 {
538 struct ad1848_isa_softc *isc;
539 struct ad1848_softc *sc;
540
541 DPRINTF(("ad1848_isa_close: stop DMA\n"));
542 isc = addr;
543 sc = &isc->sc_ad1848;
544 ad1848_close(sc);
545
546 #ifndef AUDIO_NO_POWER_CTL
547 /* Power-down chip */
548 if (isc->powerctl) {
549 KASSERT(mutex_owned(&sc->sc_intr_lock));
550 isc->powerctl(isc->powerarg, 0);
551 }
552 #endif
553
554 if (isc->sc_playdrq != -1)
555 isa_drq_free(isc->sc_ic, isc->sc_playdrq);
556 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq)
557 isa_drq_free(isc->sc_ic, isc->sc_recdrq);
558 }
559
560 int
ad1848_isa_trigger_input(void * addr,void * start,void * end,int blksize,void (* intr)(void *),void * arg,const audio_params_t * param)561 ad1848_isa_trigger_input(
562 void *addr,
563 void *start, void *end,
564 int blksize,
565 void (*intr)(void *),
566 void *arg,
567 const audio_params_t *param)
568 {
569 struct ad1848_isa_softc *isc;
570 struct ad1848_softc *sc;
571 uint8_t reg;
572
573 isc = addr;
574 sc = &isc->sc_ad1848;
575 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start,
576 (char *)end - (char *)start, NULL,
577 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
578
579 isc->sc_recrun = 1;
580 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
581 isc->sc_rintr = intr;
582 isc->sc_rarg = arg;
583 } else {
584 isc->sc_pintr = intr;
585 isc->sc_parg = arg;
586 }
587
588 /*
589 * Calculate number of transfers.
590 * Note that ADPCM is always transferred 4 bytes at at a time.
591 */
592 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
593 (blksize * 8) / (param->precision * param->channels) - 1;
594
595 if (sc->mode >= 2) {
596 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff);
597 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8);
598 } else {
599 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
600 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
601 }
602
603 reg = ad_read(sc, SP_INTERFACE_CONFIG);
604 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg);
605
606 return 0;
607 }
608
609 int
ad1848_isa_trigger_output(void * addr,void * start,void * end,int blksize,void (* intr)(void *),void * arg,const audio_params_t * param)610 ad1848_isa_trigger_output(
611 void *addr,
612 void *start, void *end,
613 int blksize,
614 void (*intr)(void *),
615 void *arg,
616 const audio_params_t *param)
617 {
618 struct ad1848_isa_softc *isc;
619 struct ad1848_softc *sc;
620 uint8_t reg;
621
622 isc = addr;
623 sc = &isc->sc_ad1848;
624 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start,
625 (char *)end - (char *)start, NULL,
626 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
627
628 isc->sc_playrun = 1;
629 isc->sc_pintr = intr;
630 isc->sc_parg = arg;
631
632 /*
633 * Calculate number of transfers.
634 * Note that ADPCM is always transferred 4 bytes at at a time.
635 */
636 blksize = (param->encoding == AUDIO_ENCODING_ADPCM) ? blksize / 4 - 1 :
637 (blksize * 8) / (param->precision * param->channels) - 1;
638
639 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff);
640 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8);
641
642 /* Unmute wave output */
643 ad1848_mute_wave_output(sc, WAVE_MUTE2, 0);
644
645 reg = ad_read(sc, SP_INTERFACE_CONFIG);
646 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg);
647
648 return 0;
649 }
650
651 int
ad1848_isa_halt_input(void * addr)652 ad1848_isa_halt_input(void *addr)
653 {
654 struct ad1848_isa_softc *isc;
655 struct ad1848_softc *sc;
656
657 isc = addr;
658 sc = &isc->sc_ad1848;
659 if (isc->sc_recrun) {
660 ad1848_halt_input(sc);
661 isa_dmaabort(isc->sc_ic, isc->sc_recdrq);
662 isc->sc_recrun = 0;
663 }
664
665 return 0;
666 }
667
668 int
ad1848_isa_halt_output(void * addr)669 ad1848_isa_halt_output(void *addr)
670 {
671 struct ad1848_isa_softc *isc;
672 struct ad1848_softc *sc;
673
674 isc = addr;
675 sc = &isc->sc_ad1848;
676 if (isc->sc_playrun) {
677 /* Mute wave output */
678 ad1848_mute_wave_output(sc, WAVE_MUTE2, 1);
679
680 ad1848_halt_output(sc);
681 isa_dmaabort(isc->sc_ic, isc->sc_playdrq);
682 isc->sc_playrun = 0;
683 }
684
685 return 0;
686 }
687
688 int
ad1848_isa_intr(void * arg)689 ad1848_isa_intr(void *arg)
690 {
691 struct ad1848_isa_softc *isc;
692 struct ad1848_softc *sc;
693 int retval;
694 u_char status;
695
696 isc = arg;
697 sc = &isc->sc_ad1848;
698
699 KASSERT(mutex_owned(&sc->sc_intr_lock));
700
701 retval = 0;
702 /* Get intr status */
703 status = ADREAD(sc, AD1848_STATUS);
704
705 #ifdef AUDIO_DEBUG
706 if (ad1848debug > 1)
707 printf("ad1848_isa_intr: pintr=%p rintr=%p status=%x\n",
708 isc->sc_pintr, isc->sc_rintr, status);
709 #endif
710 isc->sc_interrupts++;
711
712 /* Handle interrupt */
713 if ((status & INTERRUPT_STATUS) != 0) {
714 if (sc->mode == 2 && isc->sc_playdrq != isc->sc_recdrq) {
715 status = ad_read(sc, CS_IRQ_STATUS);
716 if ((status & CS_IRQ_PI) && isc->sc_playrun) {
717 (*isc->sc_pintr)(isc->sc_parg);
718 retval = 1;
719 }
720 if ((status & CS_IRQ_CI) && isc->sc_recrun) {
721 (*isc->sc_rintr)(isc->sc_rarg);
722 retval = 1;
723 }
724 } else {
725 if (isc->sc_playrun) {
726 (*isc->sc_pintr)(isc->sc_parg);
727 retval = 1;
728 }
729 }
730
731 /* Clear interrupt */
732 ADWRITE(sc, AD1848_STATUS, 0);
733 }
734 return retval;
735 }
736
737 void *
ad1848_isa_malloc(void * addr,int direction,size_t size)738 ad1848_isa_malloc(
739 void *addr,
740 int direction,
741 size_t size)
742 {
743 struct ad1848_isa_softc *isc;
744 int drq;
745
746 isc = addr;
747 if (direction == AUMODE_PLAY)
748 drq = isc->sc_playdrq;
749 else
750 drq = isc->sc_recdrq;
751 return isa_malloc(isc->sc_ic, drq, size, M_DEVBUF, M_WAITOK);
752 }
753
754 void
ad1848_isa_free(void * addr,void * ptr,size_t size)755 ad1848_isa_free(void *addr, void *ptr, size_t size)
756 {
757
758 isa_free(ptr, M_DEVBUF);
759 }
760
761 size_t
ad1848_isa_round_buffersize(void * addr,int direction,size_t size)762 ad1848_isa_round_buffersize(void *addr, int direction, size_t size)
763 {
764 struct ad1848_isa_softc *isc;
765 bus_size_t maxsize;
766
767 isc = addr;
768 if (direction == AUMODE_PLAY)
769 maxsize = isc->sc_play_maxsize;
770 else if (isc->sc_recdrq == isc->sc_playdrq)
771 maxsize = isc->sc_play_maxsize;
772 else
773 maxsize = isc->sc_rec_maxsize;
774
775 if (size > maxsize)
776 size = maxsize;
777 return size;
778 }
779
780 int
ad1848_isa_get_props(void * addr)781 ad1848_isa_get_props(void *addr)
782 {
783 struct ad1848_isa_softc *isc;
784
785 isc = addr;
786 return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
787 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0);
788 }
789