1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
2
3 /*-
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
7 * All rights reserved.
8 *
9 * This code is derived from software written for Brini by Mark Brinicombe
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * Machine dependent functions for kernel setup
40 *
41 * Created : 17/09/94
42 * Updated : 18/04/01 updated for new wscons
43 */
44
45 #include "opt_compat.h"
46 #include "opt_ddb.h"
47 #include "opt_kstack_pages.h"
48 #include "opt_platform.h"
49 #include "opt_sched.h"
50 #include "opt_timer.h"
51
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
54
55 #include <sys/param.h>
56 #include <sys/buf.h>
57 #include <sys/bus.h>
58 #include <sys/cons.h>
59 #include <sys/cpu.h>
60 #include <sys/devmap.h>
61 #include <sys/efi.h>
62 #include <sys/imgact.h>
63 #include <sys/kdb.h>
64 #include <sys/kernel.h>
65 #include <sys/linker.h>
66 #include <sys/msgbuf.h>
67 #include <sys/reboot.h>
68 #include <sys/rwlock.h>
69 #include <sys/sched.h>
70 #include <sys/syscallsubr.h>
71 #include <sys/sysent.h>
72 #include <sys/sysproto.h>
73 #include <sys/vmmeter.h>
74
75 #include <vm/vm_object.h>
76 #include <vm/vm_page.h>
77 #include <vm/vm_pager.h>
78
79 #include <machine/debug_monitor.h>
80 #include <machine/machdep.h>
81 #include <machine/metadata.h>
82 #include <machine/pcb.h>
83 #include <machine/physmem.h>
84 #include <machine/platform.h>
85 #include <machine/sysarch.h>
86 #include <machine/undefined.h>
87 #include <machine/vfp.h>
88 #include <machine/vmparam.h>
89
90 #ifdef FDT
91 #include <dev/fdt/fdt_common.h>
92 #include <machine/ofw_machdep.h>
93 #endif
94
95 #ifdef DEBUG
96 #define debugf(fmt, args...) printf(fmt, ##args)
97 #else
98 #define debugf(fmt, args...)
99 #endif
100
101 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
102 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
103 defined(COMPAT_FREEBSD9)
104 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
105 #endif
106
107 struct pcpu __pcpu[MAXCPU];
108 struct pcpu *pcpup = &__pcpu[0];
109
110 static struct trapframe proc0_tf;
111 uint32_t cpu_reset_address = 0;
112 int cold = 1;
113 vm_offset_t vector_page;
114
115 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
116 int (*_arm_bzero)(void *, int, int) = NULL;
117 int _min_memcpy_size = 0;
118 int _min_bzero_size = 0;
119
120 extern int *end;
121
122 #ifdef FDT
123 vm_paddr_t pmap_pa;
124 #if __ARM_ARCH >= 6
125 vm_offset_t systempage;
126 vm_offset_t irqstack;
127 vm_offset_t undstack;
128 vm_offset_t abtstack;
129 #else
130 /*
131 * This is the number of L2 page tables required for covering max
132 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
133 * stacks etc.), uprounded to be divisible by 4.
134 */
135 #define KERNEL_PT_MAX 78
136 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
137 struct pv_addr systempage;
138 static struct pv_addr msgbufpv;
139 struct pv_addr irqstack;
140 struct pv_addr undstack;
141 struct pv_addr abtstack;
142 static struct pv_addr kernelstack;
143 #endif /* __ARM_ARCH >= 6 */
144 #endif /* FDT */
145
146 #ifdef MULTIDELAY
147 static delay_func *delay_impl;
148 static void *delay_arg;
149 #endif
150
151 struct kva_md_info kmi;
152
153 /*
154 * arm32_vector_init:
155 *
156 * Initialize the vector page, and select whether or not to
157 * relocate the vectors.
158 *
159 * NOTE: We expect the vector page to be mapped at its expected
160 * destination.
161 */
162
163 extern unsigned int page0[], page0_data[];
164 void
arm_vector_init(vm_offset_t va,int which)165 arm_vector_init(vm_offset_t va, int which)
166 {
167 unsigned int *vectors = (int *) va;
168 unsigned int *vectors_data = vectors + (page0_data - page0);
169 int vec;
170
171 /*
172 * Loop through the vectors we're taking over, and copy the
173 * vector's insn and data word.
174 */
175 for (vec = 0; vec < ARM_NVEC; vec++) {
176 if ((which & (1 << vec)) == 0) {
177 /* Don't want to take over this vector. */
178 continue;
179 }
180 vectors[vec] = page0[vec];
181 vectors_data[vec] = page0_data[vec];
182 }
183
184 /* Now sync the vectors. */
185 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
186
187 vector_page = va;
188 #if __ARM_ARCH < 6
189 if (va == ARM_VECTORS_HIGH) {
190 /*
191 * Enable high vectors in the system control reg (SCTLR).
192 *
193 * Assume the MD caller knows what it's doing here, and really
194 * does want the vector page relocated.
195 *
196 * Note: This has to be done here (and not just in
197 * cpu_setup()) because the vector page needs to be
198 * accessible *before* cpu_startup() is called.
199 * Think ddb(9) ...
200 */
201 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
202 }
203 #endif
204 }
205
206 static void
cpu_startup(void * dummy)207 cpu_startup(void *dummy)
208 {
209 struct pcb *pcb = thread0.td_pcb;
210 const unsigned int mbyte = 1024 * 1024;
211 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
212 vm_page_t m;
213 #endif
214
215 identify_arm_cpu();
216
217 vm_ksubmap_init(&kmi);
218
219 /*
220 * Display the RAM layout.
221 */
222 printf("real memory = %ju (%ju MB)\n",
223 (uintmax_t)arm32_ptob(realmem),
224 (uintmax_t)arm32_ptob(realmem) / mbyte);
225 printf("avail memory = %ju (%ju MB)\n",
226 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
227 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
228 if (bootverbose) {
229 arm_physmem_print_tables();
230 devmap_print_table();
231 }
232
233 bufinit();
234 vm_pager_bufferinit();
235 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
236 USPACE_SVC_STACK_TOP;
237 pmap_set_pcb_pagedir(kernel_pmap, pcb);
238 #if __ARM_ARCH < 6
239 vector_page_setprot(VM_PROT_READ);
240 pmap_postinit();
241 #ifdef ARM_CACHE_LOCK_ENABLE
242 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
243 arm_lock_cache_line(ARM_TP_ADDRESS);
244 #else
245 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
246 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
247 #endif
248 *(uint32_t *)ARM_RAS_START = 0;
249 *(uint32_t *)ARM_RAS_END = 0xffffffff;
250 #endif
251 }
252
253 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
254
255 /*
256 * Flush the D-cache for non-DMA I/O so that the I-cache can
257 * be made coherent later.
258 */
259 void
cpu_flush_dcache(void * ptr,size_t len)260 cpu_flush_dcache(void *ptr, size_t len)
261 {
262
263 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
264 }
265
266 /* Get current clock frequency for the given cpu id. */
267 int
cpu_est_clockrate(int cpu_id,uint64_t * rate)268 cpu_est_clockrate(int cpu_id, uint64_t *rate)
269 {
270
271 return (ENXIO);
272 }
273
274 void
cpu_idle(int busy)275 cpu_idle(int busy)
276 {
277
278 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
279 spinlock_enter();
280 #ifndef NO_EVENTTIMERS
281 if (!busy)
282 cpu_idleclock();
283 #endif
284 if (!sched_runnable())
285 cpu_sleep(0);
286 #ifndef NO_EVENTTIMERS
287 if (!busy)
288 cpu_activeclock();
289 #endif
290 spinlock_exit();
291 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
292 }
293
294 int
cpu_idle_wakeup(int cpu)295 cpu_idle_wakeup(int cpu)
296 {
297
298 return (0);
299 }
300
301 /*
302 * Most ARM platforms don't need to do anything special to init their clocks
303 * (they get intialized during normal device attachment), and by not defining a
304 * cpu_initclocks() function they get this generic one. Any platform that needs
305 * to do something special can just provide their own implementation, which will
306 * override this one due to the weak linkage.
307 */
308 void
arm_generic_initclocks(void)309 arm_generic_initclocks(void)
310 {
311
312 #ifndef NO_EVENTTIMERS
313 #ifdef SMP
314 if (PCPU_GET(cpuid) == 0)
315 cpu_initclocks_bsp();
316 else
317 cpu_initclocks_ap();
318 #else
319 cpu_initclocks_bsp();
320 #endif
321 #endif
322 }
323 __weak_reference(arm_generic_initclocks, cpu_initclocks);
324
325 #ifdef MULTIDELAY
326 void
arm_set_delay(delay_func * impl,void * arg)327 arm_set_delay(delay_func *impl, void *arg)
328 {
329
330 KASSERT(impl != NULL, ("No DELAY implementation"));
331 delay_impl = impl;
332 delay_arg = arg;
333 }
334
335 void
DELAY(int usec)336 DELAY(int usec)
337 {
338
339 delay_impl(usec, delay_arg);
340 }
341 #endif
342
343 void
cpu_pcpu_init(struct pcpu * pcpu,int cpuid,size_t size)344 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
345 {
346 }
347
348 void
spinlock_enter(void)349 spinlock_enter(void)
350 {
351 struct thread *td;
352 register_t cspr;
353
354 td = curthread;
355 if (td->td_md.md_spinlock_count == 0) {
356 cspr = disable_interrupts(PSR_I | PSR_F);
357 td->td_md.md_spinlock_count = 1;
358 td->td_md.md_saved_cspr = cspr;
359 } else
360 td->td_md.md_spinlock_count++;
361 critical_enter();
362 }
363
364 void
spinlock_exit(void)365 spinlock_exit(void)
366 {
367 struct thread *td;
368 register_t cspr;
369
370 td = curthread;
371 critical_exit();
372 cspr = td->td_md.md_saved_cspr;
373 td->td_md.md_spinlock_count--;
374 if (td->td_md.md_spinlock_count == 0)
375 restore_interrupts(cspr);
376 }
377
378 /*
379 * Clear registers on exec
380 */
381 void
exec_setregs(struct thread * td,struct image_params * imgp,u_long stack)382 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
383 {
384 struct trapframe *tf = td->td_frame;
385
386 memset(tf, 0, sizeof(*tf));
387 tf->tf_usr_sp = stack;
388 tf->tf_usr_lr = imgp->entry_addr;
389 tf->tf_svc_lr = 0x77777777;
390 tf->tf_pc = imgp->entry_addr;
391 tf->tf_spsr = PSR_USR32_MODE;
392 }
393
394
395 #ifdef VFP
396 /*
397 * Get machine VFP context.
398 */
399 void
get_vfpcontext(struct thread * td,mcontext_vfp_t * vfp)400 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
401 {
402 struct pcb *pcb;
403
404 pcb = td->td_pcb;
405 if (td == curthread) {
406 critical_enter();
407 vfp_store(&pcb->pcb_vfpstate, false);
408 critical_exit();
409 } else
410 MPASS(TD_IS_SUSPENDED(td));
411 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg,
412 sizeof(vfp->mcv_reg));
413 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr;
414 }
415
416 /*
417 * Set machine VFP context.
418 */
419 void
set_vfpcontext(struct thread * td,mcontext_vfp_t * vfp)420 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
421 {
422 struct pcb *pcb;
423
424 pcb = td->td_pcb;
425 if (td == curthread) {
426 critical_enter();
427 vfp_discard(td);
428 critical_exit();
429 } else
430 MPASS(TD_IS_SUSPENDED(td));
431 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg,
432 sizeof(pcb->pcb_vfpstate.reg));
433 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
434 }
435 #endif
436
437 int
arm_get_vfpstate(struct thread * td,void * args)438 arm_get_vfpstate(struct thread *td, void *args)
439 {
440 int rv;
441 struct arm_get_vfpstate_args ua;
442 mcontext_vfp_t mcontext_vfp;
443
444 rv = copyin(args, &ua, sizeof(ua));
445 if (rv != 0)
446 return (rv);
447 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t))
448 return (EINVAL);
449 #ifdef VFP
450 get_vfpcontext(td, &mcontext_vfp);
451 #else
452 bzero(&mcontext_vfp, sizeof(mcontext_vfp));
453 #endif
454
455 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp));
456 if (rv != 0)
457 return (rv);
458 return (0);
459 }
460
461 /*
462 * Get machine context.
463 */
464 int
get_mcontext(struct thread * td,mcontext_t * mcp,int clear_ret)465 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
466 {
467 struct trapframe *tf = td->td_frame;
468 __greg_t *gr = mcp->__gregs;
469
470 if (clear_ret & GET_MC_CLEAR_RET) {
471 gr[_REG_R0] = 0;
472 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
473 } else {
474 gr[_REG_R0] = tf->tf_r0;
475 gr[_REG_CPSR] = tf->tf_spsr;
476 }
477 gr[_REG_R1] = tf->tf_r1;
478 gr[_REG_R2] = tf->tf_r2;
479 gr[_REG_R3] = tf->tf_r3;
480 gr[_REG_R4] = tf->tf_r4;
481 gr[_REG_R5] = tf->tf_r5;
482 gr[_REG_R6] = tf->tf_r6;
483 gr[_REG_R7] = tf->tf_r7;
484 gr[_REG_R8] = tf->tf_r8;
485 gr[_REG_R9] = tf->tf_r9;
486 gr[_REG_R10] = tf->tf_r10;
487 gr[_REG_R11] = tf->tf_r11;
488 gr[_REG_R12] = tf->tf_r12;
489 gr[_REG_SP] = tf->tf_usr_sp;
490 gr[_REG_LR] = tf->tf_usr_lr;
491 gr[_REG_PC] = tf->tf_pc;
492
493 mcp->mc_vfp_size = 0;
494 mcp->mc_vfp_ptr = NULL;
495 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
496
497 return (0);
498 }
499
500 /*
501 * Set machine context.
502 *
503 * However, we don't set any but the user modifiable flags, and we won't
504 * touch the cs selector.
505 */
506 int
set_mcontext(struct thread * td,mcontext_t * mcp)507 set_mcontext(struct thread *td, mcontext_t *mcp)
508 {
509 mcontext_vfp_t mc_vfp, *vfp;
510 struct trapframe *tf = td->td_frame;
511 const __greg_t *gr = mcp->__gregs;
512 int spsr;
513
514 /*
515 * Make sure the processor mode has not been tampered with and
516 * interrupts have not been disabled.
517 */
518 spsr = gr[_REG_CPSR];
519 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
520 (spsr & (PSR_I | PSR_F)) != 0)
521 return (EINVAL);
522
523 #ifdef WITNESS
524 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
525 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
526 td->td_proc->p_comm, __func__,
527 mcp->mc_vfp_size, mcp->mc_vfp_size);
528 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
529 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
530 td->td_proc->p_comm, __func__);
531 }
532 #endif
533
534 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
535 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
536 return (EFAULT);
537 vfp = &mc_vfp;
538 } else {
539 vfp = NULL;
540 }
541
542 tf->tf_r0 = gr[_REG_R0];
543 tf->tf_r1 = gr[_REG_R1];
544 tf->tf_r2 = gr[_REG_R2];
545 tf->tf_r3 = gr[_REG_R3];
546 tf->tf_r4 = gr[_REG_R4];
547 tf->tf_r5 = gr[_REG_R5];
548 tf->tf_r6 = gr[_REG_R6];
549 tf->tf_r7 = gr[_REG_R7];
550 tf->tf_r8 = gr[_REG_R8];
551 tf->tf_r9 = gr[_REG_R9];
552 tf->tf_r10 = gr[_REG_R10];
553 tf->tf_r11 = gr[_REG_R11];
554 tf->tf_r12 = gr[_REG_R12];
555 tf->tf_usr_sp = gr[_REG_SP];
556 tf->tf_usr_lr = gr[_REG_LR];
557 tf->tf_pc = gr[_REG_PC];
558 tf->tf_spsr = gr[_REG_CPSR];
559 #ifdef VFP
560 if (vfp != NULL)
561 set_vfpcontext(td, vfp);
562 #endif
563 return (0);
564 }
565
566 void
sendsig(catcher,ksi,mask)567 sendsig(catcher, ksi, mask)
568 sig_t catcher;
569 ksiginfo_t *ksi;
570 sigset_t *mask;
571 {
572 struct thread *td;
573 struct proc *p;
574 struct trapframe *tf;
575 struct sigframe *fp, frame;
576 struct sigacts *psp;
577 struct sysentvec *sysent;
578 int onstack;
579 int sig;
580 int code;
581
582 td = curthread;
583 p = td->td_proc;
584 PROC_LOCK_ASSERT(p, MA_OWNED);
585 sig = ksi->ksi_signo;
586 code = ksi->ksi_code;
587 psp = p->p_sigacts;
588 mtx_assert(&psp->ps_mtx, MA_OWNED);
589 tf = td->td_frame;
590 onstack = sigonstack(tf->tf_usr_sp);
591
592 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
593 catcher, sig);
594
595 /* Allocate and validate space for the signal handler context. */
596 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
597 SIGISMEMBER(psp->ps_sigonstack, sig)) {
598 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
599 td->td_sigstk.ss_size);
600 #if defined(COMPAT_43)
601 td->td_sigstk.ss_flags |= SS_ONSTACK;
602 #endif
603 } else
604 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
605
606 /* make room on the stack */
607 fp--;
608
609 /* make the stack aligned */
610 fp = (struct sigframe *)STACKALIGN(fp);
611 /* Populate the siginfo frame. */
612 bzero(&frame, sizeof(frame));
613 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
614 #ifdef VFP
615 get_vfpcontext(td, &frame.sf_vfp);
616 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
617 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
618 #else
619 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
620 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
621 #endif
622 frame.sf_si = ksi->ksi_info;
623 frame.sf_uc.uc_sigmask = *mask;
624 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
625 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
626 frame.sf_uc.uc_stack = td->td_sigstk;
627 mtx_unlock(&psp->ps_mtx);
628 PROC_UNLOCK(td->td_proc);
629
630 /* Copy the sigframe out to the user's stack. */
631 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
632 /* Process has trashed its stack. Kill it. */
633 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
634 PROC_LOCK(p);
635 sigexit(td, SIGILL);
636 }
637
638 /*
639 * Build context to run handler in. We invoke the handler
640 * directly, only returning via the trampoline. Note the
641 * trampoline version numbers are coordinated with machine-
642 * dependent code in libc.
643 */
644
645 tf->tf_r0 = sig;
646 tf->tf_r1 = (register_t)&fp->sf_si;
647 tf->tf_r2 = (register_t)&fp->sf_uc;
648
649 /* the trampoline uses r5 as the uc address */
650 tf->tf_r5 = (register_t)&fp->sf_uc;
651 tf->tf_pc = (register_t)catcher;
652 tf->tf_usr_sp = (register_t)fp;
653 sysent = p->p_sysent;
654 if (sysent->sv_sigcode_base != 0)
655 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
656 else
657 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
658 *(sysent->sv_szsigcode));
659 /* Set the mode to enter in the signal handler */
660 #if __ARM_ARCH >= 7
661 if ((register_t)catcher & 1)
662 tf->tf_spsr |= PSR_T;
663 else
664 tf->tf_spsr &= ~PSR_T;
665 #endif
666
667 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
668 tf->tf_usr_sp);
669
670 PROC_LOCK(p);
671 mtx_lock(&psp->ps_mtx);
672 }
673
674 int
sys_sigreturn(td,uap)675 sys_sigreturn(td, uap)
676 struct thread *td;
677 struct sigreturn_args /* {
678 const struct __ucontext *sigcntxp;
679 } */ *uap;
680 {
681 ucontext_t uc;
682 int error;
683
684 if (uap == NULL)
685 return (EFAULT);
686 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
687 return (EFAULT);
688 /* Restore register context. */
689 error = set_mcontext(td, &uc.uc_mcontext);
690 if (error != 0)
691 return (error);
692
693 /* Restore signal mask. */
694 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
695
696 return (EJUSTRETURN);
697 }
698
699 /*
700 * Construct a PCB from a trapframe. This is called from kdb_trap() where
701 * we want to start a backtrace from the function that caused us to enter
702 * the debugger. We have the context in the trapframe, but base the trace
703 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
704 * enough for a backtrace.
705 */
706 void
makectx(struct trapframe * tf,struct pcb * pcb)707 makectx(struct trapframe *tf, struct pcb *pcb)
708 {
709 pcb->pcb_regs.sf_r4 = tf->tf_r4;
710 pcb->pcb_regs.sf_r5 = tf->tf_r5;
711 pcb->pcb_regs.sf_r6 = tf->tf_r6;
712 pcb->pcb_regs.sf_r7 = tf->tf_r7;
713 pcb->pcb_regs.sf_r8 = tf->tf_r8;
714 pcb->pcb_regs.sf_r9 = tf->tf_r9;
715 pcb->pcb_regs.sf_r10 = tf->tf_r10;
716 pcb->pcb_regs.sf_r11 = tf->tf_r11;
717 pcb->pcb_regs.sf_r12 = tf->tf_r12;
718 pcb->pcb_regs.sf_pc = tf->tf_pc;
719 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
720 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
721 }
722
723 void
pcpu0_init(void)724 pcpu0_init(void)
725 {
726 #if __ARM_ARCH >= 6
727 set_curthread(&thread0);
728 #endif
729 pcpu_init(pcpup, 0, sizeof(struct pcpu));
730 PCPU_SET(curthread, &thread0);
731 }
732
733 /*
734 * Initialize proc0
735 */
736 void
init_proc0(vm_offset_t kstack)737 init_proc0(vm_offset_t kstack)
738 {
739 proc_linkup0(&proc0, &thread0);
740 thread0.td_kstack = kstack;
741 thread0.td_pcb = (struct pcb *)
742 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
743 thread0.td_pcb->pcb_flags = 0;
744 thread0.td_pcb->pcb_vfpcpu = -1;
745 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
746 thread0.td_frame = &proc0_tf;
747 pcpup->pc_curpcb = thread0.td_pcb;
748 }
749
750 #if __ARM_ARCH >= 6
751 void
set_stackptrs(int cpu)752 set_stackptrs(int cpu)
753 {
754
755 set_stackptr(PSR_IRQ32_MODE,
756 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
757 set_stackptr(PSR_ABT32_MODE,
758 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
759 set_stackptr(PSR_UND32_MODE,
760 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
761 }
762 #else
763 void
set_stackptrs(int cpu)764 set_stackptrs(int cpu)
765 {
766
767 set_stackptr(PSR_IRQ32_MODE,
768 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
769 set_stackptr(PSR_ABT32_MODE,
770 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
771 set_stackptr(PSR_UND32_MODE,
772 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
773 }
774 #endif
775
776 static void
arm_kdb_init(void)777 arm_kdb_init(void)
778 {
779
780 kdb_init();
781 #ifdef KDB
782 if (boothowto & RB_KDB)
783 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
784 #endif
785 }
786
787 #ifdef FDT
788 #if __ARM_ARCH < 6
789 void *
initarm(struct arm_boot_params * abp)790 initarm(struct arm_boot_params *abp)
791 {
792 struct mem_region mem_regions[FDT_MEM_REGIONS];
793 struct pv_addr kernel_l1pt;
794 struct pv_addr dpcpu;
795 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
796 uint64_t memsize;
797 uint32_t l2size;
798 char *env;
799 void *kmdp;
800 u_int l1pagetable;
801 int i, j, err_devmap, mem_regions_sz;
802
803 lastaddr = parse_boot_param(abp);
804 arm_physmem_kernaddr = abp->abp_physaddr;
805
806 memsize = 0;
807
808 cpuinfo_init();
809 set_cpufuncs();
810
811 /*
812 * Find the dtb passed in by the boot loader.
813 */
814 kmdp = preload_search_by_type("elf kernel");
815 if (kmdp != NULL)
816 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
817 else
818 dtbp = (vm_offset_t)NULL;
819
820 #if defined(FDT_DTB_STATIC)
821 /*
822 * In case the device tree blob was not retrieved (from metadata) try
823 * to use the statically embedded one.
824 */
825 if (dtbp == (vm_offset_t)NULL)
826 dtbp = (vm_offset_t)&fdt_static_dtb;
827 #endif
828
829 if (OF_install(OFW_FDT, 0) == FALSE)
830 panic("Cannot install FDT");
831
832 if (OF_init((void *)dtbp) != 0)
833 panic("OF_init failed with the found device tree");
834
835 /* Grab physical memory regions information from device tree. */
836 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
837 panic("Cannot get physical memory regions");
838 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
839
840 /* Grab reserved memory regions information from device tree. */
841 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
842 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
843 EXFLAG_NODUMP | EXFLAG_NOALLOC);
844
845 /* Platform-specific initialisation */
846 platform_probe_and_attach();
847
848 pcpu0_init();
849
850 /* Do basic tuning, hz etc */
851 init_param1();
852
853 /* Calculate number of L2 tables needed for mapping vm_page_array */
854 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
855 l2size = (l2size >> L1_S_SHIFT) + 1;
856
857 /*
858 * Add one table for end of kernel map, one for stacks, msgbuf and
859 * L1 and L2 tables map and one for vectors map.
860 */
861 l2size += 3;
862
863 /* Make it divisible by 4 */
864 l2size = (l2size + 3) & ~3;
865
866 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
867
868 /* Define a macro to simplify memory allocation */
869 #define valloc_pages(var, np) \
870 alloc_pages((var).pv_va, (np)); \
871 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
872
873 #define alloc_pages(var, np) \
874 (var) = freemempos; \
875 freemempos += (np * PAGE_SIZE); \
876 memset((char *)(var), 0, ((np) * PAGE_SIZE));
877
878 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
879 freemempos += PAGE_SIZE;
880 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
881
882 for (i = 0, j = 0; i < l2size; ++i) {
883 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
884 valloc_pages(kernel_pt_table[i],
885 L2_TABLE_SIZE / PAGE_SIZE);
886 j = i;
887 } else {
888 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
889 L2_TABLE_SIZE_REAL * (i - j);
890 kernel_pt_table[i].pv_pa =
891 kernel_pt_table[i].pv_va - KERNVIRTADDR +
892 abp->abp_physaddr;
893
894 }
895 }
896 /*
897 * Allocate a page for the system page mapped to 0x00000000
898 * or 0xffff0000. This page will just contain the system vectors
899 * and can be shared by all processes.
900 */
901 valloc_pages(systempage, 1);
902
903 /* Allocate dynamic per-cpu area. */
904 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
905 dpcpu_init((void *)dpcpu.pv_va, 0);
906
907 /* Allocate stacks for all modes */
908 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
909 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
910 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
911 valloc_pages(kernelstack, kstack_pages);
912 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
913
914 /*
915 * Now we start construction of the L1 page table
916 * We start by mapping the L2 page tables into the L1.
917 * This means that we can replace L1 mappings later on if necessary
918 */
919 l1pagetable = kernel_l1pt.pv_va;
920
921 /*
922 * Try to map as much as possible of kernel text and data using
923 * 1MB section mapping and for the rest of initial kernel address
924 * space use L2 coarse tables.
925 *
926 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
927 * and kernel structures
928 */
929 l2_start = lastaddr & ~(L1_S_OFFSET);
930 for (i = 0 ; i < l2size - 1; i++)
931 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
932 &kernel_pt_table[i]);
933
934 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
935
936 /* Map kernel code and data */
937 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
938 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
939 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
940
941 /* Map L1 directory and allocated L2 page tables */
942 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
943 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
944
945 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
946 kernel_pt_table[0].pv_pa,
947 L2_TABLE_SIZE_REAL * l2size,
948 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
949
950 /* Map allocated DPCPU, stacks and msgbuf */
951 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
952 freemempos - dpcpu.pv_va,
953 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
954
955 /* Link and map the vector page */
956 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
957 &kernel_pt_table[l2size - 1]);
958 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
959 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
960
961 /* Establish static device mappings. */
962 err_devmap = platform_devmap_init();
963 devmap_bootstrap(l1pagetable, NULL);
964 vm_max_kernel_address = platform_lastaddr();
965
966 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
967 pmap_pa = kernel_l1pt.pv_pa;
968 cpu_setttb(kernel_l1pt.pv_pa);
969 cpu_tlb_flushID();
970 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
971
972 /*
973 * Now that proper page tables are installed, call cpu_setup() to enable
974 * instruction and data caches and other chip-specific features.
975 */
976 cpu_setup();
977
978 /*
979 * Only after the SOC registers block is mapped we can perform device
980 * tree fixups, as they may attempt to read parameters from hardware.
981 */
982 OF_interpret("perform-fixup", 0);
983
984 platform_gpio_init();
985
986 cninit();
987
988 debugf("initarm: console initialized\n");
989 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
990 debugf(" boothowto = 0x%08x\n", boothowto);
991 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
992 arm_print_kenv();
993
994 env = kern_getenv("kernelname");
995 if (env != NULL) {
996 strlcpy(kernelname, env, sizeof(kernelname));
997 freeenv(env);
998 }
999
1000 if (err_devmap != 0)
1001 printf("WARNING: could not fully configure devmap, error=%d\n",
1002 err_devmap);
1003
1004 platform_late_init();
1005
1006 /*
1007 * Pages were allocated during the secondary bootstrap for the
1008 * stacks for different CPU modes.
1009 * We must now set the r13 registers in the different CPU modes to
1010 * point to these stacks.
1011 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1012 * of the stack memory.
1013 */
1014 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1015
1016 set_stackptrs(0);
1017
1018 /*
1019 * We must now clean the cache again....
1020 * Cleaning may be done by reading new data to displace any
1021 * dirty data in the cache. This will have happened in cpu_setttb()
1022 * but since we are boot strapping the addresses used for the read
1023 * may have just been remapped and thus the cache could be out
1024 * of sync. A re-clean after the switch will cure this.
1025 * After booting there are no gross relocations of the kernel thus
1026 * this problem will not occur after initarm().
1027 */
1028 cpu_idcache_wbinv_all();
1029
1030 undefined_init();
1031
1032 init_proc0(kernelstack.pv_va);
1033
1034 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1035 pmap_bootstrap(freemempos, &kernel_l1pt);
1036 msgbufp = (void *)msgbufpv.pv_va;
1037 msgbufinit(msgbufp, msgbufsize);
1038 mutex_init();
1039
1040 /*
1041 * Exclude the kernel (and all the things we allocated which immediately
1042 * follow the kernel) from the VM allocation pool but not from crash
1043 * dumps. virtual_avail is a global variable which tracks the kva we've
1044 * "allocated" while setting up pmaps.
1045 *
1046 * Prepare the list of physical memory available to the vm subsystem.
1047 */
1048 arm_physmem_exclude_region(abp->abp_physaddr,
1049 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1050 arm_physmem_init_kernel_globals();
1051
1052 init_param2(physmem);
1053 dbg_monitor_init();
1054 arm_kdb_init();
1055
1056 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1057 sizeof(struct pcb)));
1058 }
1059 #else /* __ARM_ARCH < 6 */
1060 void *
initarm(struct arm_boot_params * abp)1061 initarm(struct arm_boot_params *abp)
1062 {
1063 struct mem_region mem_regions[FDT_MEM_REGIONS];
1064 vm_paddr_t lastaddr;
1065 vm_offset_t dtbp, kernelstack, dpcpu;
1066 char *env;
1067 void *kmdp;
1068 int err_devmap, mem_regions_sz;
1069 #ifdef EFI
1070 struct efi_map_header *efihdr;
1071 #endif
1072
1073 /* get last allocated physical address */
1074 arm_physmem_kernaddr = abp->abp_physaddr;
1075 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1076
1077 set_cpufuncs();
1078 cpuinfo_init();
1079
1080 /*
1081 * Find the dtb passed in by the boot loader.
1082 */
1083 kmdp = preload_search_by_type("elf kernel");
1084 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1085 #if defined(FDT_DTB_STATIC)
1086 /*
1087 * In case the device tree blob was not retrieved (from metadata) try
1088 * to use the statically embedded one.
1089 */
1090 if (dtbp == (vm_offset_t)NULL)
1091 dtbp = (vm_offset_t)&fdt_static_dtb;
1092 #endif
1093
1094 if (OF_install(OFW_FDT, 0) == FALSE)
1095 panic("Cannot install FDT");
1096
1097 if (OF_init((void *)dtbp) != 0)
1098 panic("OF_init failed with the found device tree");
1099
1100 #if defined(LINUX_BOOT_ABI)
1101 arm_parse_fdt_bootargs();
1102 #endif
1103
1104 #ifdef EFI
1105 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1106 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1107 if (efihdr != NULL) {
1108 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1109 } else
1110 #endif
1111 {
1112 /* Grab physical memory regions information from device tree. */
1113 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1114 panic("Cannot get physical memory regions");
1115 }
1116 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1117
1118 /* Grab reserved memory regions information from device tree. */
1119 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1120 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1121 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1122
1123 /*
1124 * Set TEX remapping registers.
1125 * Setup kernel page tables and switch to kernel L1 page table.
1126 */
1127 pmap_set_tex();
1128 pmap_bootstrap_prepare(lastaddr);
1129
1130 /*
1131 * If EARLY_PRINTF support is enabled, we need to re-establish the
1132 * mapping after pmap_bootstrap_prepare() switches to new page tables.
1133 * Note that we can only do the remapping if the VA is outside the
1134 * kernel, now that we have real virtual (not VA=PA) mappings in effect.
1135 * Early printf does not work between the time pmap_set_tex() does
1136 * cp15_prrr_set() and this code remaps the VA.
1137 */
1138 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1139 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024,
1140 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
1141 #endif
1142
1143 /*
1144 * Now that proper page tables are installed, call cpu_setup() to enable
1145 * instruction and data caches and other chip-specific features.
1146 */
1147 cpu_setup();
1148
1149 /* Platform-specific initialisation */
1150 platform_probe_and_attach();
1151 pcpu0_init();
1152
1153 /* Do basic tuning, hz etc */
1154 init_param1();
1155
1156 /*
1157 * Allocate a page for the system page mapped to 0xffff0000
1158 * This page will just contain the system vectors and can be
1159 * shared by all processes.
1160 */
1161 systempage = pmap_preboot_get_pages(1);
1162
1163 /* Map the vector page. */
1164 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1165 if (virtual_end >= ARM_VECTORS_HIGH)
1166 virtual_end = ARM_VECTORS_HIGH - 1;
1167
1168 /* Allocate dynamic per-cpu area. */
1169 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1170 dpcpu_init((void *)dpcpu, 0);
1171
1172 /* Allocate stacks for all modes */
1173 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1174 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1175 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1176 kernelstack = pmap_preboot_get_vpages(kstack_pages);
1177
1178 /* Allocate message buffer. */
1179 msgbufp = (void *)pmap_preboot_get_vpages(
1180 round_page(msgbufsize) / PAGE_SIZE);
1181
1182 /*
1183 * Pages were allocated during the secondary bootstrap for the
1184 * stacks for different CPU modes.
1185 * We must now set the r13 registers in the different CPU modes to
1186 * point to these stacks.
1187 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1188 * of the stack memory.
1189 */
1190 set_stackptrs(0);
1191 mutex_init();
1192
1193 /* Establish static device mappings. */
1194 err_devmap = platform_devmap_init();
1195 devmap_bootstrap(0, NULL);
1196 vm_max_kernel_address = platform_lastaddr();
1197
1198 /*
1199 * Only after the SOC registers block is mapped we can perform device
1200 * tree fixups, as they may attempt to read parameters from hardware.
1201 */
1202 OF_interpret("perform-fixup", 0);
1203 platform_gpio_init();
1204 cninit();
1205
1206 /*
1207 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(),
1208 * undo it now that the normal console printf works.
1209 */
1210 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1211 pmap_kremove(SOCDEV_VA);
1212 #endif
1213
1214 debugf("initarm: console initialized\n");
1215 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1216 debugf(" boothowto = 0x%08x\n", boothowto);
1217 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1218 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1219 arm_print_kenv();
1220
1221 env = kern_getenv("kernelname");
1222 if (env != NULL)
1223 strlcpy(kernelname, env, sizeof(kernelname));
1224
1225 if (err_devmap != 0)
1226 printf("WARNING: could not fully configure devmap, error=%d\n",
1227 err_devmap);
1228
1229 platform_late_init();
1230
1231 /*
1232 * We must now clean the cache again....
1233 * Cleaning may be done by reading new data to displace any
1234 * dirty data in the cache. This will have happened in cpu_setttb()
1235 * but since we are boot strapping the addresses used for the read
1236 * may have just been remapped and thus the cache could be out
1237 * of sync. A re-clean after the switch will cure this.
1238 * After booting there are no gross relocations of the kernel thus
1239 * this problem will not occur after initarm().
1240 */
1241 /* Set stack for exception handlers */
1242 undefined_init();
1243 init_proc0(kernelstack);
1244 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1245 enable_interrupts(PSR_A);
1246 pmap_bootstrap(0);
1247
1248 /* Exclude the kernel (and all the things we allocated which immediately
1249 * follow the kernel) from the VM allocation pool but not from crash
1250 * dumps. virtual_avail is a global variable which tracks the kva we've
1251 * "allocated" while setting up pmaps.
1252 *
1253 * Prepare the list of physical memory available to the vm subsystem.
1254 */
1255 arm_physmem_exclude_region(abp->abp_physaddr,
1256 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1257 arm_physmem_init_kernel_globals();
1258
1259 init_param2(physmem);
1260 /* Init message buffer. */
1261 msgbufinit(msgbufp, msgbufsize);
1262 dbg_monitor_init();
1263 arm_kdb_init();
1264 /* Apply possible BP hardening. */
1265 cpuinfo_init_bp_hardening();
1266 return ((void *)STACKALIGN(thread0.td_pcb));
1267
1268 }
1269
1270 #endif /* __ARM_ARCH < 6 */
1271 #endif /* FDT */
1272