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Searched defs:Writes (Results 1 – 8 of 8) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
HDCodeGenSchedule.cpp759 IdxVec &Writes, IdxVec &Reads) const { in findRWs()
877 IdxVec Writes, Reads; in collectSchedClasses() local
942 IdxVec Writes; in collectSchedClasses() local
1262 IdxVec Writes, Reads; in inferFromItinClass() local
1284 IdxVec Writes, Reads; in inferFromInstRWs() local
1846 IdxVec Writes, Reads; in collectProcResources() local
2002 IdxVec Writes, Reads; in collectItinProcResources() local
2044 void CodeGenSchedModels::collectRWResources(ArrayRef<unsigned> Writes, in collectRWResources()
HDCodeGenSchedule.h130 IdxVec Writes; member
HDSubtargetEmitter.cpp1026 IdxVec Writes = SC.Writes; in GenSchedClassTables() local
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDMachineInstrBundle.h224 bool Writes; member
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/
HDInstruction.h277 void setDependentWrites(unsigned Writes) { in setDependentWrites()
349 SmallVector<WriteDescriptor, 4> Writes; // Implicit writes are at the end. member
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMParallelDSP.cpp352 SmallVector<Instruction*, 8> Writes; in RecordMemoryOps() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDRegisterCoalescer.cpp1713 bool Reads, Writes; in updateRegDefsUses() local
HDMachinePipeliner.cpp2484 bool Reads, Writes; in orderDependence() local