| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 34 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createEmptyIntervalFrom() local
43 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createFrom() local
399 LiveRangeEdit::MRI_NoteNewVirtualRegister(unsigned VReg) in MRI_NoteNewVirtualRegister()
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| D | LiveIntervalUnion.cpp | 149 LiveInterval *VReg = LiveUnionI.value(); in collectInterferingVRegs() local
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| D | MachineFunction.cpp | 426 unsigned VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn() local
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| D | TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i]; in TailDuplicateAndUpdate() local
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| D | InlineSpiller.cpp | 1013 unsigned VReg =0) { in dumpMachineInstrRangeWithSlotIndex()
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| /freebsd-9-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | LiveIntervalUnion.h | 119 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): in Query()
135 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { in init()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 287 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); in getVR() local
320 unsigned VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
439 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx, in ConstrainForSubReg()
494 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitSubregNode() local
587 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitCopyToRegClassNode() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/NVPTX/InstPrinter/ |
| D | NVPTXInstPrinter.cpp | 69 unsigned VReg = RegNo & 0x0FFFFFFF; in printRegName() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2131 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); in LowerFormalArguments_32SVR4() local
2150 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); in LowerFormalArguments_32SVR4() local
2328 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
2366 unsigned VReg; in LowerFormalArguments_64SVR4() local
2390 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
2414 unsigned VReg; in LowerFormalArguments_64SVR4() local
2437 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); in LowerFormalArguments_64SVR4() local
2492 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() local
2660 unsigned VReg; in LowerFormalArguments_Darwin() local
2683 unsigned VReg; in LowerFormalArguments_Darwin() local
[all …]
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| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | SIISelLowering.cpp | 1336 unsigned VReg = MI->getOperand(0).getReg(); in AdjustInstrPostInstrSelection() local
1395 SDValue VReg = AMDGPUTargetLowering::CreateLiveInRegister(DAG, RC, Reg, VT); in CreateLiveInRegister() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | Thumb1RegisterInfo.cpp | 561 unsigned VReg = 0; in eliminateFrameIndex() local
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| D | ARMISelLowering.cpp | 2910 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC); in StoreByValRegs() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 871 unsigned VReg = in LowerFormalArguments() local
876 unsigned VReg = in LowerFormalArguments() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 401 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments_32() local
513 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments_32() local
564 unsigned VReg = MF.addLiveIn(VA.getLocReg(), in LowerFormalArguments_64() local
635 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); in LowerFormalArguments_64() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1147 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments() local
1200 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 468 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass); in LowerCCCArguments() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 684 unsigned VReg = MRI.createVirtualRegister(RC); in LowerFormalArguments() local
735 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I], in LowerFormalArguments() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1079 unsigned VReg = MF.addLiveIn(AArch64ArgRegs[i], &AArch64::GPR64RegClass); in SaveVarArgRegisters() local
1102 unsigned VReg = MF.addLiveIn(AArch64FPRArgRegs[i], in SaveVarArgRegisters() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 757 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); in addLiveIn() local
3466 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2373 unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], in LowerFormalArguments() local
2400 unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs], in LowerFormalArguments() local
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