1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 35 * from: FreeBSD: src/sys/i386/include/vmparam.h,v 1.33 2000/03/30 36 * $FreeBSD$ 37 */ 38 39 #ifndef _MACHINE_VMPARAM_H_ 40 #define _MACHINE_VMPARAM_H_ 41 42 /* 43 * Virtual memory related constants, all in bytes 44 */ 45 #ifndef MAXTSIZ 46 #define MAXTSIZ (1*1024*1024*1024) /* max text size */ 47 #endif 48 #ifndef DFLDSIZ 49 #define DFLDSIZ (128*1024*1024) /* initial data size limit */ 50 #endif 51 #ifndef MAXDSIZ 52 #define MAXDSIZ (1*1024*1024*1024) /* max data size */ 53 #endif 54 #ifndef DFLSSIZ 55 #define DFLSSIZ (128*1024*1024) /* initial stack size limit */ 56 #endif 57 #ifndef MAXSSIZ 58 #define MAXSSIZ (1*1024*1024*1024) /* max stack size */ 59 #endif 60 #ifndef SGROWSIZ 61 #define SGROWSIZ (128*1024) /* amount to grow stack */ 62 #endif 63 64 /* 65 * The physical address space is sparsely populated. 66 */ 67 #define VM_PHYSSEG_SPARSE 68 69 /* 70 * The number of PHYSSEG entries must be one greater than the number 71 * of phys_avail entries because the phys_avail entry that spans the 72 * largest physical address that is accessible by ISA DMA is split 73 * into two PHYSSEG entries. 74 */ 75 #define VM_PHYSSEG_MAX 64 76 77 /* 78 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool 79 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 80 * the pool from which physical pages for small UMA objects are 81 * allocated. 82 */ 83 #define VM_NFREEPOOL 2 84 #define VM_FREEPOOL_DEFAULT 0 85 #define VM_FREEPOOL_DIRECT 1 86 87 /* 88 * Create two free page lists: VM_FREELIST_DEFAULT is for physical 89 * pages that are above the largest physical address that is 90 * accessible by ISA DMA and VM_FREELIST_ISADMA is for physical pages 91 * that are below that address. 92 */ 93 #define VM_NFREELIST 2 94 #define VM_FREELIST_DEFAULT 0 95 #define VM_FREELIST_ISADMA 1 96 97 /* 98 * An allocation size of 16MB is supported in order to optimize the 99 * use of the direct map by UMA. Specifically, a cache line contains 100 * at most four TTEs, collectively mapping 16MB of physical memory. 101 * By reducing the number of distinct 16MB "pages" that are used by UMA, 102 * the physical memory allocator reduces the likelihood of both 4MB 103 * page TLB misses and cache misses caused by 4MB page TLB misses. 104 */ 105 #define VM_NFREEORDER 12 106 107 /* 108 * Enable superpage reservations: 1 level. 109 */ 110 #ifndef VM_NRESERVLEVEL 111 #define VM_NRESERVLEVEL 1 112 #endif 113 114 /* 115 * Level 0 reservations consist of 512 pages. 116 */ 117 #ifndef VM_LEVEL_0_ORDER 118 #define VM_LEVEL_0_ORDER 9 119 #endif 120 121 /** 122 * Address space layout. 123 * 124 * UltraSPARC I and II implement a 44 bit virtual address space. The address 125 * space is split into 2 regions at each end of the 64 bit address space, with 126 * an out of range "hole" in the middle. UltraSPARC III implements the full 127 * 64 bit virtual address space, but we don't really have any use for it and 128 * 43 bits of user address space is considered to be "enough", so we ignore it. 129 * 130 * Upper region: 0xffffffffffffffff 131 * 0xfffff80000000000 132 * 133 * Hole: 0xfffff7ffffffffff 134 * 0x0000080000000000 135 * 136 * Lower region: 0x000007ffffffffff 137 * 0x0000000000000000 138 * 139 * In general we ignore the upper region, and use the lower region as mappable 140 * space. 141 * 142 * We define some interesting address constants: 143 * 144 * VM_MIN_ADDRESS and VM_MAX_ADDRESS define the start and end of the entire 145 * 64 bit address space, mostly just for convenience. 146 * 147 * VM_MIN_DIRECT_ADDRESS and VM_MAX_DIRECT_ADDRESS define the start and end 148 * of the direct mapped region. This maps virtual addresses to physical 149 * addresses directly using 4mb tlb entries, with the physical address encoded 150 * in the lower 43 bits of virtual address. These mappings are convenient 151 * because they do not require page tables, and because they never change they 152 * do not require tlb flushes. However, since these mappings are cacheable, 153 * we must ensure that all pages accessed this way are either not double 154 * mapped, or that all other mappings have virtual color equal to physical 155 * color, in order to avoid creating illegal aliases in the data cache. 156 * 157 * VM_MIN_KERNEL_ADDRESS and VM_MAX_KERNEL_ADDRESS define the start and end of 158 * mappable kernel virtual address space. VM_MIN_KERNEL_ADDRESS is basically 159 * arbitrary, a convenient address is chosen which allows both the kernel text 160 * and data and the prom's address space to be mapped with 1 4mb tsb page. 161 * VM_MAX_KERNEL_ADDRESS is variable, computed at startup time based on the 162 * amount of physical memory available. Each 4mb tsb page provides 1g of 163 * virtual address space, with the only practical limit being available 164 * phsyical memory. 165 * 166 * VM_MIN_PROM_ADDRESS and VM_MAX_PROM_ADDRESS define the start and end of the 167 * prom address space. On startup the prom's mappings are duplicated in the 168 * kernel tsb, to allow prom memory to be accessed normally by the kernel. 169 * 170 * VM_MIN_USER_ADDRESS and VM_MAX_USER_ADDRESS define the start and end of the 171 * user address space. There are some hardware errata about using addresses 172 * at the boundary of the va hole, so we allow just under 43 bits of user 173 * address space. Note that the kernel and user address spaces overlap, but 174 * this doesn't matter because they use different tlb contexts, and because 175 * the kernel address space is not mapped into each process' address space. 176 */ 177 #define VM_MIN_ADDRESS (0x0000000000000000UL) 178 #define VM_MAX_ADDRESS (0xffffffffffffffffUL) 179 180 #define VM_MIN_DIRECT_ADDRESS (0xfffff80000000000UL) 181 #define VM_MAX_DIRECT_ADDRESS (VM_MAX_ADDRESS) 182 183 #define VM_MIN_KERNEL_ADDRESS (0x00000000c0000000UL) 184 #define VM_MAX_KERNEL_ADDRESS (vm_max_kernel_address) 185 186 #define VM_MIN_PROM_ADDRESS (0x00000000f0000000UL) 187 #define VM_MAX_PROM_ADDRESS (0x00000000ffffffffUL) 188 189 #define VM_MIN_USER_ADDRESS (0x0000000000000000UL) 190 #define VM_MAX_USER_ADDRESS (0x000007fe00000000UL) 191 192 #define VM_MINUSER_ADDRESS (VM_MIN_USER_ADDRESS) 193 #define VM_MAXUSER_ADDRESS (VM_MAX_USER_ADDRESS) 194 195 #define KERNBASE (VM_MIN_KERNEL_ADDRESS) 196 #define PROMBASE (VM_MIN_PROM_ADDRESS) 197 #define USRSTACK (VM_MAX_USER_ADDRESS) 198 199 /* 200 * How many physical pages per kmem arena virtual page. 201 */ 202 #ifndef VM_KMEM_SIZE_SCALE 203 #define VM_KMEM_SIZE_SCALE (tsb_kernel_ldd_phys == 0 ? 3 : 2) 204 #endif 205 206 /* 207 * Optional floor (in bytes) on the size of the kmem arena. 208 */ 209 #ifndef VM_KMEM_SIZE_MIN 210 #define VM_KMEM_SIZE_MIN (16 * 1024 * 1024) 211 #endif 212 213 /* 214 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the 215 * kernel map. 216 */ 217 #ifndef VM_KMEM_SIZE_MAX 218 #define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 219 VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 220 #endif 221 222 /* 223 * Initial pagein size of beginning of executable file. 224 */ 225 #ifndef VM_INITIAL_PAGEIN 226 #define VM_INITIAL_PAGEIN 16 227 #endif 228 229 #define UMA_MD_SMALL_ALLOC 230 231 extern u_int tsb_kernel_ldd_phys; 232 extern vm_offset_t vm_max_kernel_address; 233 234 /* 235 * Older sparc64 machines have a virtually indexed L1 data cache of 16KB. 236 * Consequently, mapping the same physical page multiple times may have 237 * caching disabled. 238 */ 239 #define ZERO_REGION_SIZE PAGE_SIZE 240 241 #define SFBUF 242 #define SFBUF_MAP 243 #define SFBUF_OPTIONAL_DIRECT_MAP dcache_color_ignore 244 #include <machine/tlb.h> 245 #define SFBUF_PHYS_DMAP(x) TLB_PHYS_TO_DIRECT(x) 246 247 #endif /* !_MACHINE_VMPARAM_H_ */ 248