xref: /dragonfly/sys/dev/crypto/tpm/tpm20.h (revision 959366edc6ceee964a31f71baf4f38d75e0f167c)
1 /*-
2  * Copyright (c) 2018 Stormshield.
3  * Copyright (c) 2018 Semihalf.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  *
27  * $FreeBSD: head/sys/dev/tpm/tpm20.h 365144 2020-09-01 21:50:31Z mjg $
28  */
29 
30 #ifndef _TPM20_H_
31 #define   _TPM20_H_
32 
33 #include <sys/endian.h>
34 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/lock.h>
37 #include <sys/malloc.h>
38 #include <sys/proc.h>
39 #include <sys/systm.h>
40 
41 #include <sys/bus.h>
42 #include <sys/callout.h>
43 #include <sys/condvar.h>
44 #include <sys/conf.h>
45 #include <sys/device.h>
46 #include <sys/module.h>
47 #include <sys/rman.h>
48 #include <sys/uio.h>
49 
50 #include <machine/md_var.h>
51 
52 #include <contrib/dev/acpica/source/include/acpi.h>
53 #include <contrib/dev/acpica/source/include/accommon.h>
54 #include <dev/acpica/acpivar.h>
55 #include "opt_acpi.h"
56 
57 #include "opt_tpm.h"
58 
59 #define   BIT(x) (1 << (x))
60 
61 /* Timeouts in us */
62 #define   TPM_TIMEOUT_A                           750000
63 #define   TPM_TIMEOUT_B                           2000000
64 #define   TPM_TIMEOUT_C                           200000
65 #define   TPM_TIMEOUT_D                           30000
66 
67 /*
68  * Generating RSA key pair takes ~(10-20s), which is significantly longer than
69  * any timeout defined in spec. Because of that we need a new one.
70  */
71 #define   TPM_TIMEOUT_LONG              40000000
72 
73 /* List of commands that require TPM_TIMEOUT_LONG time to complete */
74 #define   TPM_CC_CreatePrimary                    0x00000131
75 #define   TPM_CC_Create                           0x00000153
76 #define   TPM_CC_CreateLoaded           0x00000191
77 
78 /* List of commands that require only TPM_TIMEOUT_C time to complete */
79 #define   TPM_CC_SequenceComplete                 0x0000013e
80 #define   TPM_CC_Startup                          0x00000144
81 #define   TPM_CC_SequenceUpdate                   0x0000015c
82 #define   TPM_CC_GetCapability                    0x0000017a
83 #define   TPM_CC_PCR_Extend             0x00000182
84 #define   TPM_CC_EventSequenceComplete  0x00000185
85 #define   TPM_CC_HashSequenceStart      0x00000186
86 
87 /* Timeout before data in read buffer is discarded */
88 #define   TPM_READ_TIMEOUT              500000
89 
90 #define   TPM_BUFSIZE                             0x1000
91 
92 #define   TPM_HEADER_SIZE                         10
93 
94 #define   TPM_CDEV_NAME                           "tpm0"
95 #define   TPM_CDEV_PERM_FLAG            0600
96 
97 #define   TPM2_START_METHOD_ACPI                  2
98 #define   TPM2_START_METHOD_TIS                   6
99 #define   TPM2_START_METHOD_CRB                   7
100 #define   TPM2_START_METHOD_CRB_ACPI    8
101 
102 struct tpm_sc {
103           device_t  dev;
104 
105           struct resource     *mem_res;
106           struct resource     *irq_res;
107           int                 mem_rid;
108           int                 irq_rid;
109 
110           struct cdev         *sc_cdev;
111 
112           struct lock         dev_lock;
113           struct cv buf_cv;
114 
115           void                *intr_cookie;
116           int                 intr_type;          /* Current event type */
117           bool                interrupts;
118 
119           uint8_t   *buf;
120           size_t              pending_data_length;
121           struct thread       *owner_tid;
122 
123           struct callout      discard_buffer_callout;
124 #ifdef TPM_HARVEST
125           struct callout      harvest_callout;
126           int                 harvest_ticks;
127 #endif
128 
129           int                 (*transmit)(struct tpm_sc *, size_t);
130 };
131 
132 int tpm20_suspend(device_t dev);
133 int tpm20_shutdown(device_t dev);
134 int32_t tpm20_get_timeout(uint32_t command);
135 int tpm20_init(struct tpm_sc *sc);
136 void tpm20_release(struct tpm_sc *sc);
137 
138 /* Small helper routines for io ops */
139 static inline uint8_t
RD1(struct tpm_sc * sc,bus_size_t off)140 RD1(struct tpm_sc *sc, bus_size_t off)
141 {
142 
143           return (bus_read_1(sc->mem_res, off));
144 }
145 static inline uint32_t
RD4(struct tpm_sc * sc,bus_size_t off)146 RD4(struct tpm_sc *sc, bus_size_t off)
147 {
148 
149           return (bus_read_4(sc->mem_res, off));
150 }
151 #ifdef __amd64__
152 static inline uint64_t
RD8(struct tpm_sc * sc,bus_size_t off)153 RD8(struct tpm_sc *sc, bus_size_t off)
154 {
155 
156           return (bus_read_8(sc->mem_res, off));
157 }
158 #endif
159 static inline void
WR1(struct tpm_sc * sc,bus_size_t off,uint8_t val)160 WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
161 {
162 
163           bus_write_1(sc->mem_res, off, val);
164 }
165 static inline void
WR4(struct tpm_sc * sc,bus_size_t off,uint32_t val)166 WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
167 {
168 
169           bus_write_4(sc->mem_res, off, val);
170 }
171 static inline void
AND4(struct tpm_sc * sc,bus_size_t off,uint32_t val)172 AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
173 {
174 
175           WR4(sc, off, RD4(sc, off) & val);
176 }
177 static inline void
OR1(struct tpm_sc * sc,bus_size_t off,uint8_t val)178 OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
179 {
180 
181           WR1(sc, off, RD1(sc, off) | val);
182 }
183 static inline void
OR4(struct tpm_sc * sc,bus_size_t off,uint32_t val)184 OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
185 {
186 
187           WR4(sc, off, RD4(sc, off) | val);
188 }
189 #endif    /* _TPM20_H_ */
190