| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 138 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function
139 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function
140 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function
141 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function
147 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
148 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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| D | LegalizationArtifactCombiner.h | 1012 unsigned SrcOp = SrcDef->getOpcode(); in tryCombineUnmergeValues() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonRDFOpt.cpp | 139 const MachineOperand &SrcOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
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| D | HexagonExpandCondsets.cpp | 643 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, in genCondTfrFor()
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| D | HexagonFrameLowering.cpp | 2406 MachineOperand &SrcOp = SI.getOperand(2); in optimizeSpillSlots() local
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| D | HexagonBitSimplify.cpp | 2570 const MachineOperand &SrcOp = MI->getOperand(1); in simplifyExtractLow() local
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| D | HexagonInstrInfo.cpp | 1207 const MachineOperand &SrcOp = MI.getOperand(2); in expandPostRAPseudo() local
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| D | HexagonISelDAGToDAGHVX.cpp | 1353 unsigned SrcOp = SegList[0] / 2; in packs() local
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| /openbsd/src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineNegator.cpp | 252 Value *SrcOp = I->getOperand(0); in visitImpl() local
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| D | InstCombineCasts.cpp | 1255 if (auto *SrcOp = dyn_cast<Instruction>(Src)) in visitZExt() local
2079 Value *SrcOp = CI.getPointerOperand(); in visitPtrToInt() local
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| D | InstructionCombining.cpp | 2185 Value *SrcOp = BCI->getOperand(0); in visitGEPOfBitcast() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64SelectionDAGInfo.cpp | 59 auto *SrcOp = in EmitMOPS() local
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| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | CodeGenInstruction.cpp | 359 std::pair<unsigned,unsigned> SrcOp = (FirstIsDest ? RHSOp : LHSOp); in ParseConstraint() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 1425 const MachineOperand &SrcOp = MI->getOperand(1); in verifyPreISelGenericInstruction() local
1447 const MachineOperand &SrcOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1838 const MachineOperand &SrcOp = MI->getOperand(1); in visitMachineInstrBefore() local
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| D | MachineScheduler.cpp | 1830 const MachineOperand &SrcOp = Copy->getOperand(1); in constrainLocalCopy() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SILowerControlFlow.cpp | 578 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands() local
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| D | SIInstrInfo.cpp | 1949 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local
2012 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local
2314 const MachineOperand &SrcOp = MI.getOperand(I); in expandMovDPP64() local
4793 const MachineOperand &SrcOp = MI.getOperand(1); in verifyInstruction() local
8617 MachineOperand *SrcOp = &Def->getOperand(1); in optimizeCompareInstr() local
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| D | SIFoldOperands.cpp | 1300 auto &SrcOp = InstToErase->getOperand(1); in tryFoldFoldableCopy() local
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| D | AMDGPULegalizerInfo.cpp | 4779 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() local
4836 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local
4851 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local
4991 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in legalizeImageIntrinsic() local
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| D | AMDGPURegisterBankInfo.cpp | 3328 const MachineOperand &SrcOp = MI.getOperand(i); in getDefaultMappingSOP() local
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| /openbsd/src/gnu/llvm/llvm/lib/Linker/ |
| D | IRMover.cpp | 1312 MDNode *SrcOp = SrcModFlags->getOperand(I); in linkModuleFlagsMetadata() local
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| /openbsd/src/gnu/llvm/llvm/tools/llvm-c-test/ |
| D | echo.cpp | 504 LLVMValueRef SrcOp = LLVMGetOperand(Src, 0); in CloneInstruction() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1734 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT, in EmitStackConvert()
1739 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT, in EmitStackConvert()
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| D | SelectionDAG.cpp | 2981 SDValue SrcOp = Op.getOperand(0); in computeKnownBits() local
2997 SDValue SrcOp = Op.getOperand(i); in computeKnownBits() local
4043 SDValue SrcOp = Op.getOperand(i); in ComputeNumSignBits() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 7333 SDValue SrcOp = Op.getOperand(1); in computeKnownBitsForTargetNode() local
7352 SDValue SrcOp = Op.getOperand(0); in computeKnownBitsForTargetNode() local
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