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Searched defs:Shr (Results 1 – 9 of 9) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
HDInstCombineSimplifyDemanded.cpp500 if (Instruction *Shr = dyn_cast<Instruction>(I->getOperand(0))) in SimplifyDemandedUseBits() local
934 InstCombiner::simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, in simplifyShrShlDemandedBits()
HDInstCombineCompares.cpp2164 BinaryOperator *Shr, in foldICmpShrConstant()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
HDSimplifyIndVar.cpp777 BinaryOperator *Shr = cast<BinaryOperator>(U); in strengthenRightShift() local
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/Interp/
HDInterp.h896 inline bool Shr(InterpState &S, CodePtr OpPC) { in Shr() function
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDAMDGPULegalizerInfo.cpp1461 auto Shr = B.buildAShr(S64, FractMask, Exp); in legalizeIntrinsicTrunc() local
HDAMDGPUISelLowering.cpp2110 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); in LowerFTRUNC() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
HDLegalizerHelper.cpp4309 auto Shr = MIRBuilder.buildLShr(SrcIntTy, Src, ShiftAmt); in lowerExtract() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
HDTargetLowering.cpp6236 SDValue Shr = DAG.getNode(ISD::SRL, dl, SrcVT, Src, ShiftConst); in expandUINT_TO_FP() local
HDDAGCombiner.cpp20419 SDValue Shr = DAG.getNode(ISD::SRA, SDLoc(N0), VT, Shl, ShrAmt); in SimplifySelectCC() local