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Searched defs:Shift (Results 1 – 25 of 89) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
HDAMDKernelCodeTInfo.h38 #define PRINTCOMP(GetMacro, Shift) \ argument
43 #define PARSECOMP(SetMacro, Shift) \ argument
53 #define COMPPGM(name, aname, GetMacro, SetMacro, Shift) \ argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/
HDScaledNumber.cpp48 int Shift = 64 - LeadingZeros; in multiply64() local
64 int Shift = 0; in divide32() local
86 int Shift = 0; in divide64() local
169 int Shift = 63 - (NewE - E); in toStringAPFloat() local
214 if (int Shift = std::min(int16_t(countLeadingZeros64(D)), E)) { in toString() local
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/
HDLEB128.h133 unsigned Shift = 0; variable
166 unsigned Shift = 0; variable
HDScaledNumber.h88 int Shift = 64 - Width - countLeadingZeros(Digits); variable
700 static ScaledNumber adjustToWidth(uint64_t N, int32_t Shift) { in adjustToWidth()
833 template <class DigitsT> void ScaledNumber<DigitsT>::shiftLeft(int32_t Shift) { in shiftLeft()
863 template <class DigitsT> void ScaledNumber<DigitsT>::shiftRight(int32_t Shift) { in shiftRight()
HDMathExtras.h99 T Shift = std::numeric_limits<T>::digits >> 1; in count() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64ExpandImm.cpp270 unsigned Shift = 0; // LSL amount for high bits with MOVZ/MOVN in expandMOVImmSimple() local
313 for (unsigned Shift = 0; Shift < BitSize; Shift += 16) { in expandMOVImm() local
356 for (unsigned Shift = 0; Shift < BitSize; Shift += 16) { in expandMOVImm() local
HDAArch64ISelDAGToDAG.cpp70 bool SelectArithShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectArithShiftedRegister()
73 bool SelectLogicalShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectLogicalShiftedRegister()
163 bool SelectSVEAddSubImm(SDValue N, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubImm()
333 SDValue &Shift) { in SelectArithImmed()
363 SDValue &Shift) { in SelectNegArithImmed()
464 SDValue &Reg, SDValue &Shift) { in SelectShiftedRegister()
686 SDValue &Shift) { in SelectArithExtendedRegister()
2321 for (unsigned Shift = 0; Shift < BitWidth; Shift += 16) { in tryBitfieldInsertOpFromOrAndImm() local
2882 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubImm()
HDAArch64RedundantCopyElimination.cpp198 int32_t Shift = PredI.getOperand(3).getImm(); in knownRegValInBlock() local
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ADT/
HDPointerEmbeddedInt.h44 Shift = sizeof(uintptr_t) * CHAR_BIT - Bits, enumerator
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/Basic/
HDOperatorPrecedence.h39 Shift = 12, // <<, >> enumerator
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/gwp_asan/
HDstack_trace_compressor.cpp37 uint8_t Shift = 0; in varIntDecode() local
/freebsd-11-stable/contrib/llvm-project/clang/lib/Format/
HDWhitespaceManager.cpp237 int Shift = 0; in AlignTokenSequence() local
447 int Shift = 0; in AlignMacroSequence() local
695 int Shift = 0; in alignTrailingComments() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
HDHexagonMCCodeEmitter.cpp607 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI); in getExprOpValue() local
648 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI); in getExprOpValue() local
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/Tooling/ASTDiff/
HDASTDiff.h39 int Depth, Height, Shift = 0; member
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMicroMipsSizeReduction.cpp58 uint8_t Shift; // Shift value member
105 uint8_t Shift() const { return Imm.Shift; } in Shift() function
327 static bool InRange(int64_t Value, unsigned short Shift, int LBound, in InRange()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
HDIntegerDivision.cpp36 ConstantInt *Shift; in generateSignedRemainderCode() local
108 ConstantInt *Shift; in generateSignedDivisionCode() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
HDAArch64AddressingModes.h802 for (int Shift = 0; Shift <= RegWidth - 16; Shift += 16) in isAnyMOVZMovAlias() local
809 inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) { in isMOVZMovAlias()
820 inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) { in isMOVNMovAlias()
HDAArch64InstPrinter.cpp239 int Shift = MI->getOperand(2).getImm(); in printInst() local
253 int Shift = MI->getOperand(2).getImm(); in printInst() local
940 unsigned Shift = in printAddSubImm() local
1523 unsigned Shift = MI->getOperand(OpNum + 1).getImm(); in printImm8OptLsl() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
HDInstCombinePHI.cpp903 unsigned Shift; // The amount shifted. member
921 unsigned Shift; // The amount shifted. member
1024 unsigned Shift = cast<ConstantInt>(UserI->getOperand(1))->getZExtValue(); in SliceUpIllegalIntegerPHI() local
/freebsd-11-stable/contrib/libarchive/libarchive/
HDarchive_ppmd_private.h108 Byte Shift; /* Speed of Freq change; low Shift is for fast change */ member
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDGCNRegBankReassign.cpp501 unsigned Shift = countTrailingZeros(LM); in getFreeBanks() local
508 unsigned Shift = countTrailingZeros(LM) >> 1; in getFreeBanks() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86ISelDAGToDAG.cpp1633 SDValue Shift, SDValue X, in foldMaskAndShiftToExtract()
1677 SDValue Shift = N.getOperand(0); in foldMaskedShiftToScaledMask() local
1769 SDValue Shift, SDValue X, in foldMaskAndShiftToScale()
1856 SDValue Shift, SDValue X, in foldMaskedShiftToBEXTR()
2173 SDValue Shift = N.getOperand(0); in matchAddressRecursively() local
3556 uint64_t Shift = ShiftCst->getZExtValue(); in matchBEXTRFromAndImm() local
3793 SDValue Shift = N->getOperand(0); in tryShrinkShlLogicImm() local
5086 SDValue Shift = in Select() local
5097 SDValue Shift = in Select() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
HDGISelKnownBits.cpp320 uint64_t Shift = RHSKnown.getConstant().getZExtValue(); in computeKnownBitsImpl() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
HDAutoUpgrade.cpp893 Value *Op, unsigned Shift) { in UpgradeX86PSLLDQIntrinsics()
927 unsigned Shift) { in UpgradeX86PSRLDQIntrinsics()
1008 Value *Op1, Value *Shift, in UpgradeX86ALIGNIntrinsics()
2402 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2408 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2415 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2421 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDBlockFrequencyInfoImpl.cpp206 static uint64_t shiftRightAndRound(uint64_t N, int Shift) { in shiftRightAndRound()
234 int Shift = 0; in normalize() local

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