Home
last modified time | relevance | path

Searched defs:SchedModel (Results 1 – 25 of 28) sorted by relevance

12

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonMachineScheduler.h41 const TargetSchedModel *SchedModel; variable
135 const TargetSchedModel *SchedModel = nullptr; member
218 const TargetSchedModel *SchedModel = nullptr; variable
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZHazardRecognizer.h48 const TargetSchedModel *SchedModel; variable
HDSystemZMachineScheduler.h38 TargetSchedModel SchedModel; variable
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDTargetSchedule.h34 MCSchedModel SchedModel; variable
HDTargetSubtargetInfo.h141 const TargetSchedModel *SchedModel) const { in resolveSchedClass()
HDScheduleDAGInstrs.h125 TargetSchedModel SchedModel; variable
HDMachineTraceMetrics.h93 TargetSchedModel SchedModel; variable
HDMachineScheduler.h614 const TargetSchedModel *SchedModel = nullptr; variable
894 const TargetSchedModel *SchedModel = nullptr; variable
HDTargetInstrInfo.h1496 virtual bool hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64StorePairSuppress.cpp34 TargetSchedModel SchedModel; member in __anonf7a7c4fc0111::AArch64StorePairSuppress
HDAArch64ConditionalCompares.cpp765 MCSchedModel SchedModel; member in __anonae141cec0211::AArch64ConditionalCompares
HDAArch64SIMDInstrOpt.cpp71 TargetSchedModel SchedModel; member
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
HDMCSubtargetInfo.h57 const MCSchedModel *SchedModel; member
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDEarlyIfConversion.cpp704 MCSchedModel SchedModel; member in __anon78a08bdd0211::EarlyIfConverter
941 TargetSchedModel SchedModel; member in __anon78a08bdd0411::EarlyIfPredicator
HDMachineCombiner.cpp68 MCSchedModel SchedModel; member in __anond651b90f0111::MachineCombiner
HDTargetInstrInfo.cpp1083 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel &SchedModel, in defaultDefLatency()
1109 bool TargetInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency()
HDMachineTraceMetrics.cpp895 const TargetSchedModel &SchedModel, in updatePhysDepsUpwards()
955 const TargetSchedModel &SchedModel, in pushDepHeight()
HDMachineLICM.cpp124 TargetSchedModel SchedModel; member in __anon1dabef250111::MachineLICMBase
HDMachineScheduler.cpp1885 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { in init()
2452 const TargetSchedModel *SchedModel) { in initResourceDelta()
HDIfConversion.cpp191 TargetSchedModel SchedModel; member in __anon8415e2c00111::IfConverter
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCInstrInfo.h223 bool hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency()
HDPPCTargetTransformInfo.cpp484 TargetSchedModel SchedModel; in isHardwareLoopProfitable() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/
HDMCSubtargetInfo.cpp310 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIInstrInfo.h50 TargetSchedModel SchedModel; variable
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMSubtarget.h490 MCSchedModel SchedModel; variable

12