1 /* $NetBSD: sljitNativeMIPS_common.c,v 1.5 2025/04/30 15:40:38 nia Exp $ */
2
3 /*
4 * Stack-less Just-In-Time compiler
5 *
6 * Copyright Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without modification, are
9 * permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright notice, this list of
12 * conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
15 * of conditions and the following disclaimer in the documentation and/or other materials
16 * provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
21 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /* Latest MIPS architecture. */
30 /* Automatically detect SLJIT_MIPS_R1 */
31
sljit_get_platform_name(void)32 SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void)
33 {
34 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
35 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
36 return "MIPS32-R1" SLJIT_CPUINFO;
37 #else
38 return "MIPS64-R1" SLJIT_CPUINFO;
39 #endif
40 #else /* SLJIT_MIPS_R1 */
41 return "MIPS III" SLJIT_CPUINFO;
42 #endif
43 }
44
45 /* Length of an instruction word
46 Both for mips-32 and mips-64 */
47 typedef sljit_u32 sljit_ins;
48
49 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
50 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
51 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
52
53 /* For position independent code, t9 must contain the function address. */
54 #define PIC_ADDR_REG TMP_REG2
55
56 /* Floating point status register. */
57 #define FCSR_REG 31
58 /* Return address register. */
59 #define RETURN_ADDR_REG 31
60
61 /* Flags are kept in volatile registers. */
62 #define EQUAL_FLAG 31
63 #define OTHER_FLAG 1
64
65 #define TMP_FREG1 (0)
66 #define TMP_FREG2 ((SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1) << 1)
67
68 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = {
69 0, 2, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 24, 23, 22, 21, 20, 19, 18, 17, 16, 29, 3, 25, 4
70 };
71
72 /* --------------------------------------------------------------------- */
73 /* Instrucion forms */
74 /* --------------------------------------------------------------------- */
75
76 #define S(s) (reg_map[s] << 21)
77 #define T(t) (reg_map[t] << 16)
78 #define D(d) (reg_map[d] << 11)
79 /* Absolute registers. */
80 #define SA(s) ((s) << 21)
81 #define TA(t) ((t) << 16)
82 #define DA(d) ((d) << 11)
83 #define FT(t) ((t) << 16)
84 #define FS(s) ((s) << 11)
85 #define FD(d) ((d) << 6)
86 #define IMM(imm) ((imm) & 0xffff)
87 #define SH_IMM(imm) ((imm) << 6)
88
89 #define DR(dr) (reg_map[dr])
90 #define HI(opcode) ((opcode) << 26)
91 #define LO(opcode) (opcode)
92 /* S = (16 << 21) D = (17 << 21) */
93 #define FMT_S (16 << 21)
94
95 #define ABS_S (HI(17) | FMT_S | LO(5))
96 #define ADD_S (HI(17) | FMT_S | LO(0))
97 #define ADDIU (HI(9))
98 #define ADDU (HI(0) | LO(33))
99 #define AND (HI(0) | LO(36))
100 #define ANDI (HI(12))
101 #define B (HI(4))
102 #define BAL (HI(1) | (17 << 16))
103 #define BC1F (HI(17) | (8 << 21))
104 #define BC1T (HI(17) | (8 << 21) | (1 << 16))
105 #define BEQ (HI(4))
106 #define BGEZ (HI(1) | (1 << 16))
107 #define BGTZ (HI(7))
108 #define BLEZ (HI(6))
109 #define BLTZ (HI(1) | (0 << 16))
110 #define BNE (HI(5))
111 #define BREAK (HI(0) | LO(13))
112 #define CFC1 (HI(17) | (2 << 21))
113 #define C_UN_S (HI(17) | FMT_S | LO(49))
114 #define C_UEQ_S (HI(17) | FMT_S | LO(51))
115 #define C_ULE_S (HI(17) | FMT_S | LO(55))
116 #define C_ULT_S (HI(17) | FMT_S | LO(53))
117 #define CVT_S_S (HI(17) | FMT_S | LO(32))
118 #define DADDIU (HI(25))
119 #define DADDU (HI(0) | LO(45))
120 #define DDIV (HI(0) | LO(30))
121 #define DDIVU (HI(0) | LO(31))
122 #define DIV (HI(0) | LO(26))
123 #define DIVU (HI(0) | LO(27))
124 #define DIV_S (HI(17) | FMT_S | LO(3))
125 #define DMULT (HI(0) | LO(28))
126 #define DMULTU (HI(0) | LO(29))
127 #define DSLL (HI(0) | LO(56))
128 #define DSLL32 (HI(0) | LO(60))
129 #define DSLLV (HI(0) | LO(20))
130 #define DSRA (HI(0) | LO(59))
131 #define DSRA32 (HI(0) | LO(63))
132 #define DSRAV (HI(0) | LO(23))
133 #define DSRL (HI(0) | LO(58))
134 #define DSRL32 (HI(0) | LO(62))
135 #define DSRLV (HI(0) | LO(22))
136 #define DSUBU (HI(0) | LO(47))
137 #define J (HI(2))
138 #define JAL (HI(3))
139 #define JALR (HI(0) | LO(9))
140 #define JR (HI(0) | LO(8))
141 #define LD (HI(55))
142 #define LUI (HI(15))
143 #define LW (HI(35))
144 #define MFC1 (HI(17))
145 #define MFHI (HI(0) | LO(16))
146 #define MFLO (HI(0) | LO(18))
147 #define MOV_S (HI(17) | FMT_S | LO(6))
148 #define MTC1 (HI(17) | (4 << 21))
149 #define MUL_S (HI(17) | FMT_S | LO(2))
150 #define MULT (HI(0) | LO(24))
151 #define MULTU (HI(0) | LO(25))
152 #define NEG_S (HI(17) | FMT_S | LO(7))
153 #define NOP (HI(0) | LO(0))
154 #define NOR (HI(0) | LO(39))
155 #define OR (HI(0) | LO(37))
156 #define ORI (HI(13))
157 #define SD (HI(63))
158 #define SLT (HI(0) | LO(42))
159 #define SLTI (HI(10))
160 #define SLTIU (HI(11))
161 #define SLTU (HI(0) | LO(43))
162 #define SLL (HI(0) | LO(0))
163 #define SLLV (HI(0) | LO(4))
164 #define SRL (HI(0) | LO(2))
165 #define SRLV (HI(0) | LO(6))
166 #define SRA (HI(0) | LO(3))
167 #define SRAV (HI(0) | LO(7))
168 #define SUB_S (HI(17) | FMT_S | LO(1))
169 #define SUBU (HI(0) | LO(35))
170 #define SW (HI(43))
171 #define TRUNC_W_S (HI(17) | FMT_S | LO(13))
172 #define XOR (HI(0) | LO(38))
173 #define XORI (HI(14))
174
175 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
176 #define CLZ (HI(28) | LO(32))
177 #define DCLZ (HI(28) | LO(36))
178 #define MUL (HI(28) | LO(2))
179 #define SEB (HI(31) | (16 << 6) | LO(32))
180 #define SEH (HI(31) | (24 << 6) | LO(32))
181 #endif
182
183 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
184 #define ADDU_W ADDU
185 #define ADDIU_W ADDIU
186 #define SLL_W SLL
187 #define SUBU_W SUBU
188 #else
189 #define ADDU_W DADDU
190 #define ADDIU_W DADDIU
191 #define SLL_W DSLL
192 #define SUBU_W DSUBU
193 #endif
194
195 #define SIMM_MAX (0x7fff)
196 #define SIMM_MIN (-0x8000)
197 #define UIMM_MAX (0xffff)
198
199 /* dest_reg is the absolute name of the register
200 Useful for reordering instructions in the delay slot. */
push_inst(struct sljit_compiler * compiler,sljit_ins ins,sljit_s32 delay_slot)201 static sljit_s32 push_inst(struct sljit_compiler *compiler, sljit_ins ins, sljit_s32 delay_slot)
202 {
203 SLJIT_ASSERT(delay_slot == MOVABLE_INS || delay_slot >= UNMOVABLE_INS
204 || delay_slot == ((ins >> 11) & 0x1f) || delay_slot == ((ins >> 16) & 0x1f));
205 sljit_ins *ptr = (sljit_ins*)ensure_buf(compiler, sizeof(sljit_ins));
206 FAIL_IF(!ptr);
207 *ptr = ins;
208 compiler->size++;
209 compiler->delay_slot = delay_slot;
210 return SLJIT_SUCCESS;
211 }
212
invert_branch(sljit_s32 flags)213 static SLJIT_INLINE sljit_ins invert_branch(sljit_s32 flags)
214 {
215 return (flags & IS_BIT26_COND) ? (1 << 26) : (1 << 16);
216 }
217
detect_jump_type(struct sljit_jump * jump,sljit_ins * code_ptr,sljit_ins * code,sljit_sw executable_offset)218 static SLJIT_INLINE sljit_ins* detect_jump_type(struct sljit_jump *jump, sljit_ins *code_ptr, sljit_ins *code, sljit_sw executable_offset)
219 {
220 sljit_sw diff;
221 sljit_uw target_addr;
222 sljit_ins *inst;
223 sljit_ins saved_inst;
224
225 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
226 if (jump->flags & (SLJIT_REWRITABLE_JUMP | IS_CALL))
227 return code_ptr;
228 #else
229 if (jump->flags & SLJIT_REWRITABLE_JUMP)
230 return code_ptr;
231 #endif
232
233 if (jump->flags & JUMP_ADDR)
234 target_addr = jump->u.target;
235 else {
236 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
237 target_addr = (sljit_uw)(code + jump->u.label->size) + (sljit_uw)executable_offset;
238 }
239
240 inst = (sljit_ins *)jump->addr;
241 if (jump->flags & IS_COND)
242 inst--;
243
244 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
245 if (jump->flags & IS_CALL)
246 goto keep_address;
247 #endif
248
249 /* B instructions. */
250 if (jump->flags & IS_MOVABLE) {
251 diff = ((sljit_sw)target_addr - (sljit_sw)inst - executable_offset) >> 2;
252 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
253 jump->flags |= PATCH_B;
254
255 if (!(jump->flags & IS_COND)) {
256 inst[0] = inst[-1];
257 inst[-1] = (jump->flags & IS_JAL) ? BAL : B;
258 jump->addr -= sizeof(sljit_ins);
259 return inst;
260 }
261 saved_inst = inst[0];
262 inst[0] = inst[-1];
263 inst[-1] = saved_inst ^ invert_branch(jump->flags);
264 jump->addr -= 2 * sizeof(sljit_ins);
265 return inst;
266 }
267 }
268 else {
269 diff = ((sljit_sw)target_addr - (sljit_sw)(inst + 1) - executable_offset) >> 2;
270 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
271 jump->flags |= PATCH_B;
272
273 if (!(jump->flags & IS_COND)) {
274 inst[0] = (jump->flags & IS_JAL) ? BAL : B;
275 inst[1] = NOP;
276 return inst + 1;
277 }
278 inst[0] = inst[0] ^ invert_branch(jump->flags);
279 inst[1] = NOP;
280 jump->addr -= sizeof(sljit_ins);
281 return inst + 1;
282 }
283 }
284
285 if (jump->flags & IS_COND) {
286 if ((jump->flags & IS_MOVABLE) && (target_addr & ~0xfffffff) == ((jump->addr + 2 * sizeof(sljit_ins)) & ~0xfffffff)) {
287 jump->flags |= PATCH_J;
288 saved_inst = inst[0];
289 inst[0] = inst[-1];
290 inst[-1] = (saved_inst & 0xffff0000) | 3;
291 inst[1] = J;
292 inst[2] = NOP;
293 return inst + 2;
294 }
295 else if ((target_addr & ~0xfffffff) == ((jump->addr + 3 * sizeof(sljit_ins)) & ~0xfffffff)) {
296 jump->flags |= PATCH_J;
297 inst[0] = (inst[0] & 0xffff0000) | 3;
298 inst[1] = NOP;
299 inst[2] = J;
300 inst[3] = NOP;
301 jump->addr += sizeof(sljit_ins);
302 return inst + 3;
303 }
304 }
305 else {
306 /* J instuctions. */
307 if ((jump->flags & IS_MOVABLE) && (target_addr & ~0xfffffff) == (jump->addr & ~0xfffffff)) {
308 jump->flags |= PATCH_J;
309 inst[0] = inst[-1];
310 inst[-1] = (jump->flags & IS_JAL) ? JAL : J;
311 jump->addr -= sizeof(sljit_ins);
312 return inst;
313 }
314
315 if ((target_addr & ~0xfffffff) == ((jump->addr + sizeof(sljit_ins)) & ~0xfffffff)) {
316 jump->flags |= PATCH_J;
317 inst[0] = (jump->flags & IS_JAL) ? JAL : J;
318 inst[1] = NOP;
319 return inst + 1;
320 }
321 }
322
323 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
324 keep_address:
325 if (target_addr <= 0x7fffffff) {
326 jump->flags |= PATCH_ABS32;
327 if (jump->flags & IS_COND) {
328 inst[0] -= 4;
329 inst++;
330 }
331 inst[2] = inst[6];
332 inst[3] = inst[7];
333 return inst + 3;
334 }
335 if (target_addr <= 0x7fffffffffffl) {
336 jump->flags |= PATCH_ABS48;
337 if (jump->flags & IS_COND) {
338 inst[0] -= 2;
339 inst++;
340 }
341 inst[4] = inst[6];
342 inst[5] = inst[7];
343 return inst + 5;
344 }
345 #endif
346
347 return code_ptr;
348 }
349
350 #ifdef __GNUC__
sljit_cache_flush(void * code,void * code_ptr)351 static __attribute__ ((noinline)) void sljit_cache_flush(void* code, void* code_ptr)
352 {
353 SLJIT_CACHE_FLUSH(code, code_ptr);
354 }
355 #endif
356
sljit_generate_code(struct sljit_compiler * compiler)357 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
358 {
359 struct sljit_memory_fragment *buf;
360 sljit_ins *code;
361 sljit_ins *code_ptr;
362 sljit_ins *buf_ptr;
363 sljit_ins *buf_end;
364 sljit_uw word_count;
365 sljit_sw executable_offset;
366 sljit_uw addr;
367
368 struct sljit_label *label;
369 struct sljit_jump *jump;
370 struct sljit_const *const_;
371
372 CHECK_ERROR_PTR();
373 CHECK_PTR(check_sljit_generate_code(compiler));
374 reverse_buf(compiler);
375
376 code = (sljit_ins*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_ins));
377 PTR_FAIL_WITH_EXEC_IF(code);
378 buf = compiler->buf;
379
380 code_ptr = code;
381 word_count = 0;
382 executable_offset = SLJIT_EXEC_OFFSET(code);
383
384 label = compiler->labels;
385 jump = compiler->jumps;
386 const_ = compiler->consts;
387
388 do {
389 buf_ptr = (sljit_ins*)buf->memory;
390 buf_end = buf_ptr + (buf->used_size >> 2);
391 do {
392 *code_ptr = *buf_ptr++;
393 SLJIT_ASSERT(!label || label->size >= word_count);
394 SLJIT_ASSERT(!jump || jump->addr >= word_count);
395 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
396 /* These structures are ordered by their address. */
397 if (label && label->size == word_count) {
398 label->addr = (sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
399 label->size = code_ptr - code;
400 label = label->next;
401 }
402 if (jump && jump->addr == word_count) {
403 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
404 jump->addr = (sljit_uw)(code_ptr - 3);
405 #else
406 jump->addr = (sljit_uw)(code_ptr - 7);
407 #endif
408 code_ptr = detect_jump_type(jump, code_ptr, code, executable_offset);
409 jump = jump->next;
410 }
411 if (const_ && const_->addr == word_count) {
412 /* Just recording the address. */
413 const_->addr = (sljit_uw)code_ptr;
414 const_ = const_->next;
415 }
416 code_ptr ++;
417 word_count ++;
418 } while (buf_ptr < buf_end);
419
420 buf = buf->next;
421 } while (buf);
422
423 if (label && label->size == word_count) {
424 label->addr = (sljit_uw)code_ptr;
425 label->size = code_ptr - code;
426 label = label->next;
427 }
428
429 SLJIT_ASSERT(!label);
430 SLJIT_ASSERT(!jump);
431 SLJIT_ASSERT(!const_);
432 SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
433
434 jump = compiler->jumps;
435 while (jump) {
436 do {
437 addr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
438 buf_ptr = (sljit_ins *)jump->addr;
439
440 if (jump->flags & PATCH_B) {
441 addr = (sljit_sw)(addr - ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(buf_ptr, executable_offset) + sizeof(sljit_ins))) >> 2;
442 SLJIT_ASSERT((sljit_sw)addr <= SIMM_MAX && (sljit_sw)addr >= SIMM_MIN);
443 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | (addr & 0xffff);
444 break;
445 }
446 if (jump->flags & PATCH_J) {
447 SLJIT_ASSERT((addr & ~0xfffffff) == (((sljit_uw)SLJIT_ADD_EXEC_OFFSET(buf_ptr, executable_offset) + sizeof(sljit_ins)) & ~0xfffffff));
448 buf_ptr[0] |= (addr >> 2) & 0x03ffffff;
449 break;
450 }
451
452 /* Set the fields of immediate loads. */
453 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
454 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 16) & 0xffff);
455 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | (addr & 0xffff);
456 #else
457 if (jump->flags & PATCH_ABS32) {
458 SLJIT_ASSERT(addr <= 0x7fffffff);
459 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 16) & 0xffff);
460 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | (addr & 0xffff);
461 }
462 else if (jump->flags & PATCH_ABS48) {
463 SLJIT_ASSERT(addr <= 0x7fffffffffffl);
464 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 32) & 0xffff);
465 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | ((addr >> 16) & 0xffff);
466 buf_ptr[3] = (buf_ptr[3] & 0xffff0000) | (addr & 0xffff);
467 }
468 else {
469 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 48) & 0xffff);
470 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | ((addr >> 32) & 0xffff);
471 buf_ptr[3] = (buf_ptr[3] & 0xffff0000) | ((addr >> 16) & 0xffff);
472 buf_ptr[5] = (buf_ptr[5] & 0xffff0000) | (addr & 0xffff);
473 }
474 #endif
475 } while (0);
476 jump = jump->next;
477 }
478
479 compiler->error = SLJIT_ERR_COMPILED;
480 compiler->executable_offset = executable_offset;
481 compiler->executable_size = (code_ptr - code) * sizeof(sljit_ins);
482
483 code = (sljit_ins *)SLJIT_ADD_EXEC_OFFSET(code, executable_offset);
484 code_ptr = (sljit_ins *)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
485
486 #ifndef __GNUC__
487 SLJIT_CACHE_FLUSH(code, code_ptr);
488 #else
489 /* GCC workaround for invalid code generation with -O2. */
490 sljit_cache_flush(code, code_ptr);
491 #endif
492 return code;
493 }
494
495 /* --------------------------------------------------------------------- */
496 /* Entry, exit */
497 /* --------------------------------------------------------------------- */
498
499 /* Creates an index in data_transfer_insts array. */
500 #define LOAD_DATA 0x01
501 #define WORD_DATA 0x00
502 #define BYTE_DATA 0x02
503 #define HALF_DATA 0x04
504 #define INT_DATA 0x06
505 #define SIGNED_DATA 0x08
506 /* Separates integer and floating point registers */
507 #define GPR_REG 0x0f
508 #define DOUBLE_DATA 0x10
509 #define SINGLE_DATA 0x12
510
511 #define MEM_MASK 0x1f
512
513 #define WRITE_BACK 0x00020
514 #define ARG_TEST 0x00040
515 #define ALT_KEEP_CACHE 0x00080
516 #define CUMULATIVE_OP 0x00100
517 #define LOGICAL_OP 0x00200
518 #define IMM_OP 0x00400
519 #define SRC2_IMM 0x00800
520
521 #define UNUSED_DEST 0x01000
522 #define REG_DEST 0x02000
523 #define REG1_SOURCE 0x04000
524 #define REG2_SOURCE 0x08000
525 #define SLOW_SRC1 0x10000
526 #define SLOW_SRC2 0x20000
527 #define SLOW_DEST 0x40000
528
529 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
530 #define STACK_STORE SW
531 #define STACK_LOAD LW
532 #else
533 #define STACK_STORE SD
534 #define STACK_LOAD LD
535 #endif
536
537 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
538 #include "sljitNativeMIPS_32.c"
539 #else
540 #include "sljitNativeMIPS_64.c"
541 #endif
542
sljit_emit_enter(struct sljit_compiler * compiler,sljit_s32 options,sljit_s32 args,sljit_s32 scratches,sljit_s32 saveds,sljit_s32 fscratches,sljit_s32 fsaveds,sljit_s32 local_size)543 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
544 sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
545 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
546 {
547 sljit_ins base;
548 sljit_s32 i, tmp, offs;
549
550 CHECK_ERROR();
551 CHECK(check_sljit_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
552 set_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
553
554 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1) + SLJIT_LOCALS_OFFSET;
555 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
556 local_size = (local_size + 15) & ~0xf;
557 #else
558 local_size = (local_size + 31) & ~0x1f;
559 #endif
560 compiler->local_size = local_size;
561
562 if (local_size <= SIMM_MAX) {
563 /* Frequent case. */
564 FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP)));
565 base = S(SLJIT_SP);
566 }
567 else {
568 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
569 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
570 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_SP)));
571 base = S(TMP_REG2);
572 local_size = 0;
573 }
574
575 offs = local_size - (sljit_sw)(sizeof(sljit_sw));
576 FAIL_IF(push_inst(compiler, STACK_STORE | base | TA(RETURN_ADDR_REG) | IMM(offs), MOVABLE_INS));
577
578 tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
579 for (i = SLJIT_S0; i >= tmp; i--) {
580 offs -= (sljit_s32)(sizeof(sljit_sw));
581 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
582 }
583
584 for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--) {
585 offs -= (sljit_s32)(sizeof(sljit_sw));
586 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
587 }
588
589 if (args >= 1)
590 FAIL_IF(push_inst(compiler, ADDU_W | SA(4) | TA(0) | D(SLJIT_S0), DR(SLJIT_S0)));
591 if (args >= 2)
592 FAIL_IF(push_inst(compiler, ADDU_W | SA(5) | TA(0) | D(SLJIT_S1), DR(SLJIT_S1)));
593 if (args >= 3)
594 FAIL_IF(push_inst(compiler, ADDU_W | SA(6) | TA(0) | D(SLJIT_S2), DR(SLJIT_S2)));
595
596 return SLJIT_SUCCESS;
597 }
598
sljit_set_context(struct sljit_compiler * compiler,sljit_s32 options,sljit_s32 args,sljit_s32 scratches,sljit_s32 saveds,sljit_s32 fscratches,sljit_s32 fsaveds,sljit_s32 local_size)599 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
600 sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
601 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
602 {
603 CHECK_ERROR();
604 CHECK(check_sljit_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
605 set_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
606
607 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1) + SLJIT_LOCALS_OFFSET;
608 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
609 compiler->local_size = (local_size + 15) & ~0xf;
610 #else
611 compiler->local_size = (local_size + 31) & ~0x1f;
612 #endif
613 return SLJIT_SUCCESS;
614 }
615
sljit_emit_return(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 src,sljit_sw srcw)616 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src, sljit_sw srcw)
617 {
618 sljit_s32 local_size, i, tmp, offs;
619 sljit_ins base;
620
621 CHECK_ERROR();
622 CHECK(check_sljit_emit_return(compiler, op, src, srcw));
623
624 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
625
626 local_size = compiler->local_size;
627 if (local_size <= SIMM_MAX)
628 base = S(SLJIT_SP);
629 else {
630 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
631 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
632 base = S(TMP_REG1);
633 local_size = 0;
634 }
635
636 FAIL_IF(push_inst(compiler, STACK_LOAD | base | TA(RETURN_ADDR_REG) | IMM(local_size - (sljit_s32)sizeof(sljit_sw)), RETURN_ADDR_REG));
637 offs = local_size - (sljit_s32)GET_SAVED_REGISTERS_SIZE(compiler->scratches, compiler->saveds, 1);
638
639 tmp = compiler->scratches;
640 for (i = SLJIT_FIRST_SAVED_REG; i <= tmp; i++) {
641 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
642 offs += (sljit_s32)(sizeof(sljit_sw));
643 }
644
645 tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
646 for (i = tmp; i <= SLJIT_S0; i++) {
647 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
648 offs += (sljit_s32)(sizeof(sljit_sw));
649 }
650
651 SLJIT_ASSERT(offs == local_size - (sljit_sw)(sizeof(sljit_sw)));
652
653 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
654 if (compiler->local_size <= SIMM_MAX)
655 return push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(compiler->local_size), UNMOVABLE_INS);
656 else
657 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_SP), UNMOVABLE_INS);
658 }
659
660 #undef STACK_STORE
661 #undef STACK_LOAD
662
663 /* --------------------------------------------------------------------- */
664 /* Operators */
665 /* --------------------------------------------------------------------- */
666
667 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
668 #define ARCH_32_64(a, b) a
669 #else
670 #define ARCH_32_64(a, b) b
671 #endif
672
673 static const sljit_ins data_transfer_insts[16 + 4] = {
674 /* u w s */ ARCH_32_64(HI(43) /* sw */, HI(63) /* sd */),
675 /* u w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */),
676 /* u b s */ HI(40) /* sb */,
677 /* u b l */ HI(36) /* lbu */,
678 /* u h s */ HI(41) /* sh */,
679 /* u h l */ HI(37) /* lhu */,
680 /* u i s */ HI(43) /* sw */,
681 /* u i l */ ARCH_32_64(HI(35) /* lw */, HI(39) /* lwu */),
682
683 /* s w s */ ARCH_32_64(HI(43) /* sw */, HI(63) /* sd */),
684 /* s w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */),
685 /* s b s */ HI(40) /* sb */,
686 /* s b l */ HI(32) /* lb */,
687 /* s h s */ HI(41) /* sh */,
688 /* s h l */ HI(33) /* lh */,
689 /* s i s */ HI(43) /* sw */,
690 /* s i l */ HI(35) /* lw */,
691
692 /* d s */ HI(61) /* sdc1 */,
693 /* d l */ HI(53) /* ldc1 */,
694 /* s s */ HI(57) /* swc1 */,
695 /* s l */ HI(49) /* lwc1 */,
696 };
697
698 #undef ARCH_32_64
699
700 /* reg_ar is an absoulute register! */
701
702 /* Can perform an operation using at most 1 instruction. */
getput_arg_fast(struct sljit_compiler * compiler,sljit_s32 flags,sljit_s32 reg_ar,sljit_s32 arg,sljit_sw argw)703 static sljit_s32 getput_arg_fast(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw)
704 {
705 SLJIT_ASSERT(arg & SLJIT_MEM);
706
707 if ((!(flags & WRITE_BACK) || !(arg & REG_MASK)) && !(arg & OFFS_REG_MASK) && argw <= SIMM_MAX && argw >= SIMM_MIN) {
708 /* Works for both absoulte and relative addresses. */
709 if (SLJIT_UNLIKELY(flags & ARG_TEST))
710 return 1;
711 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
712 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
713 return -1;
714 }
715 return 0;
716 }
717
718 /* See getput_arg below.
719 Note: can_cache is called only for binary operators. Those
720 operators always uses word arguments without write back. */
can_cache(sljit_s32 arg,sljit_sw argw,sljit_s32 next_arg,sljit_sw next_argw)721 static sljit_s32 can_cache(sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
722 {
723 SLJIT_ASSERT((arg & SLJIT_MEM) && (next_arg & SLJIT_MEM));
724
725 /* Simple operation except for updates. */
726 if (arg & OFFS_REG_MASK) {
727 argw &= 0x3;
728 next_argw &= 0x3;
729 if (argw && argw == next_argw && (arg == next_arg || (arg & OFFS_REG_MASK) == (next_arg & OFFS_REG_MASK)))
730 return 1;
731 return 0;
732 }
733
734 if (arg == next_arg) {
735 if (((next_argw - argw) <= SIMM_MAX && (next_argw - argw) >= SIMM_MIN))
736 return 1;
737 return 0;
738 }
739
740 return 0;
741 }
742
743 /* Emit the necessary instructions. See can_cache above. */
getput_arg(struct sljit_compiler * compiler,sljit_s32 flags,sljit_s32 reg_ar,sljit_s32 arg,sljit_sw argw,sljit_s32 next_arg,sljit_sw next_argw)744 static sljit_s32 getput_arg(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
745 {
746 sljit_s32 tmp_ar, base, delay_slot;
747
748 SLJIT_ASSERT(arg & SLJIT_MEM);
749 if (!(next_arg & SLJIT_MEM)) {
750 next_arg = 0;
751 next_argw = 0;
752 }
753
754 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
755 tmp_ar = reg_ar;
756 delay_slot = reg_ar;
757 } else {
758 tmp_ar = DR(TMP_REG1);
759 delay_slot = MOVABLE_INS;
760 }
761 base = arg & REG_MASK;
762
763 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
764 if (SLJIT_UNLIKELY(flags & WRITE_BACK)) {
765 SLJIT_ASSERT(argw == 0);
766 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(OFFS_REG(arg)) | D(base), DR(base)));
767 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
768 }
769
770 argw &= 0x3;
771
772 /* Using the cache. */
773 if (argw == compiler->cache_argw) {
774 if (arg == compiler->cache_arg)
775 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
776
777 if ((SLJIT_MEM | (arg & OFFS_REG_MASK)) == compiler->cache_arg) {
778 if (arg == next_arg && argw == (next_argw & 0x3)) {
779 compiler->cache_arg = arg;
780 compiler->cache_argw = argw;
781 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
782 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
783 }
784 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | DA(tmp_ar), tmp_ar));
785 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
786 }
787 }
788
789 if (SLJIT_UNLIKELY(argw)) {
790 compiler->cache_arg = SLJIT_MEM | (arg & OFFS_REG_MASK);
791 compiler->cache_argw = argw;
792 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3)));
793 }
794
795 if (arg == next_arg && argw == (next_argw & 0x3)) {
796 compiler->cache_arg = arg;
797 compiler->cache_argw = argw;
798 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
799 tmp_ar = DR(TMP_REG3);
800 }
801 else
802 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | DA(tmp_ar), tmp_ar));
803 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
804 }
805
806 if (SLJIT_UNLIKELY(flags & WRITE_BACK) && base) {
807 if (argw <= SIMM_MAX && argw >= SIMM_MIN) {
808 if (argw)
809 FAIL_IF(push_inst(compiler, ADDIU_W | S(base) | T(base) | IMM(argw), DR(base)));
810 }
811 else {
812 if (compiler->cache_arg == SLJIT_MEM && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
813 if (argw != compiler->cache_argw) {
814 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
815 compiler->cache_argw = argw;
816 }
817 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
818 }
819 else {
820 compiler->cache_arg = SLJIT_MEM;
821 compiler->cache_argw = argw;
822 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
823 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
824 }
825 }
826 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
827 }
828
829 if (compiler->cache_arg == arg && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
830 if (argw != compiler->cache_argw) {
831 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
832 compiler->cache_argw = argw;
833 }
834 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
835 }
836
837 if (compiler->cache_arg == SLJIT_MEM && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
838 if (argw != compiler->cache_argw)
839 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
840 }
841 else {
842 compiler->cache_arg = SLJIT_MEM;
843 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
844 }
845 compiler->cache_argw = argw;
846
847 if (!base)
848 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
849
850 if (arg == next_arg && next_argw - argw <= SIMM_MAX && next_argw - argw >= SIMM_MIN) {
851 compiler->cache_arg = arg;
852 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | D(TMP_REG3), DR(TMP_REG3)));
853 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
854 }
855
856 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | DA(tmp_ar), tmp_ar));
857 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
858 }
859
emit_op_mem(struct sljit_compiler * compiler,sljit_s32 flags,sljit_s32 reg_ar,sljit_s32 arg,sljit_sw argw)860 static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw)
861 {
862 if (getput_arg_fast(compiler, flags, reg_ar, arg, argw))
863 return compiler->error;
864 compiler->cache_arg = 0;
865 compiler->cache_argw = 0;
866 return getput_arg(compiler, flags, reg_ar, arg, argw, 0, 0);
867 }
868
emit_op_mem2(struct sljit_compiler * compiler,sljit_s32 flags,sljit_s32 reg,sljit_s32 arg1,sljit_sw arg1w,sljit_s32 arg2,sljit_sw arg2w)869 static SLJIT_INLINE sljit_s32 emit_op_mem2(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg1, sljit_sw arg1w, sljit_s32 arg2, sljit_sw arg2w)
870 {
871 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
872 return compiler->error;
873 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
874 }
875
emit_op(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 flags,sljit_s32 dst,sljit_sw dstw,sljit_s32 src1,sljit_sw src1w,sljit_s32 src2,sljit_sw src2w)876 static sljit_s32 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags,
877 sljit_s32 dst, sljit_sw dstw,
878 sljit_s32 src1, sljit_sw src1w,
879 sljit_s32 src2, sljit_sw src2w)
880 {
881 /* arg1 goes to TMP_REG1 or src reg
882 arg2 goes to TMP_REG2, imm or src reg
883 TMP_REG3 can be used for caching
884 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
885 sljit_s32 dst_r = TMP_REG2;
886 sljit_s32 src1_r;
887 sljit_sw src2_r = 0;
888 sljit_s32 sugg_src2_r = TMP_REG2;
889
890 if (!(flags & ALT_KEEP_CACHE)) {
891 compiler->cache_arg = 0;
892 compiler->cache_argw = 0;
893 }
894
895 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) {
896 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_S32 && !(src2 & SLJIT_MEM))
897 return SLJIT_SUCCESS;
898 if (HAS_FLAGS(op))
899 flags |= UNUSED_DEST;
900 }
901 else if (FAST_IS_REG(dst)) {
902 dst_r = dst;
903 flags |= REG_DEST;
904 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_S32)
905 sugg_src2_r = dst_r;
906 }
907 else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, DR(TMP_REG1), dst, dstw))
908 flags |= SLOW_DEST;
909
910 if (flags & IMM_OP) {
911 if ((src2 & SLJIT_IMM) && src2w) {
912 if ((!(flags & LOGICAL_OP) && (src2w <= SIMM_MAX && src2w >= SIMM_MIN))
913 || ((flags & LOGICAL_OP) && !(src2w & ~UIMM_MAX))) {
914 flags |= SRC2_IMM;
915 src2_r = src2w;
916 }
917 }
918 if (!(flags & SRC2_IMM) && (flags & CUMULATIVE_OP) && (src1 & SLJIT_IMM) && src1w) {
919 if ((!(flags & LOGICAL_OP) && (src1w <= SIMM_MAX && src1w >= SIMM_MIN))
920 || ((flags & LOGICAL_OP) && !(src1w & ~UIMM_MAX))) {
921 flags |= SRC2_IMM;
922 src2_r = src1w;
923
924 /* And swap arguments. */
925 src1 = src2;
926 src1w = src2w;
927 src2 = SLJIT_IMM;
928 /* src2w = src2_r unneeded. */
929 }
930 }
931 }
932
933 /* Source 1. */
934 if (FAST_IS_REG(src1)) {
935 src1_r = src1;
936 flags |= REG1_SOURCE;
937 }
938 else if (src1 & SLJIT_IMM) {
939 if (src1w) {
940 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w));
941 src1_r = TMP_REG1;
942 }
943 else
944 src1_r = 0;
945 }
946 else {
947 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w))
948 FAIL_IF(compiler->error);
949 else
950 flags |= SLOW_SRC1;
951 src1_r = TMP_REG1;
952 }
953
954 /* Source 2. */
955 if (FAST_IS_REG(src2)) {
956 src2_r = src2;
957 flags |= REG2_SOURCE;
958 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_S32)
959 dst_r = src2_r;
960 }
961 else if (src2 & SLJIT_IMM) {
962 if (!(flags & SRC2_IMM)) {
963 if (src2w) {
964 FAIL_IF(load_immediate(compiler, DR(sugg_src2_r), src2w));
965 src2_r = sugg_src2_r;
966 }
967 else {
968 src2_r = 0;
969 if ((op >= SLJIT_MOV && op <= SLJIT_MOVU_S32) && (dst & SLJIT_MEM))
970 dst_r = 0;
971 }
972 }
973 }
974 else {
975 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w))
976 FAIL_IF(compiler->error);
977 else
978 flags |= SLOW_SRC2;
979 src2_r = sugg_src2_r;
980 }
981
982 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
983 SLJIT_ASSERT(src2_r == TMP_REG2);
984 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
985 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, src1, src1w));
986 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
987 }
988 else {
989 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, src2, src2w));
990 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, dst, dstw));
991 }
992 }
993 else if (flags & SLOW_SRC1)
994 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
995 else if (flags & SLOW_SRC2)
996 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w, dst, dstw));
997
998 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
999
1000 if (dst & SLJIT_MEM) {
1001 if (!(flags & SLOW_DEST)) {
1002 getput_arg_fast(compiler, flags, DR(dst_r), dst, dstw);
1003 return compiler->error;
1004 }
1005 return getput_arg(compiler, flags, DR(dst_r), dst, dstw, 0, 0);
1006 }
1007
1008 return SLJIT_SUCCESS;
1009 }
1010
sljit_emit_op0(struct sljit_compiler * compiler,sljit_s32 op)1011 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op)
1012 {
1013 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1014 sljit_s32 int_op = op & SLJIT_I32_OP;
1015 #endif
1016
1017 CHECK_ERROR();
1018 CHECK(check_sljit_emit_op0(compiler, op));
1019
1020 op = GET_OPCODE(op);
1021 switch (op) {
1022 case SLJIT_BREAKPOINT:
1023 return push_inst(compiler, BREAK, UNMOVABLE_INS);
1024 case SLJIT_NOP:
1025 return push_inst(compiler, NOP, UNMOVABLE_INS);
1026 case SLJIT_LMUL_UW:
1027 case SLJIT_LMUL_SW:
1028 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1029 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? DMULTU : DMULT) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1030 #else
1031 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? MULTU : MULT) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1032 #endif
1033 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
1034 return push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
1035 case SLJIT_DIVMOD_UW:
1036 case SLJIT_DIVMOD_SW:
1037 case SLJIT_DIV_UW:
1038 case SLJIT_DIV_SW:
1039 SLJIT_COMPILE_ASSERT((SLJIT_DIVMOD_UW & 0x2) == 0 && SLJIT_DIV_UW - 0x2 == SLJIT_DIVMOD_UW, bad_div_opcode_assignments);
1040 #if !(defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
1041 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1042 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1043 #endif
1044
1045 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1046 if (int_op)
1047 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1048 else
1049 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DDIVU : DDIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1050 #else
1051 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1052 #endif
1053
1054 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
1055 return (op >= SLJIT_DIV_UW) ? SLJIT_SUCCESS : push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
1056 }
1057
1058 return SLJIT_SUCCESS;
1059 }
1060
sljit_emit_op1(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src,sljit_sw srcw)1061 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
1062 sljit_s32 dst, sljit_sw dstw,
1063 sljit_s32 src, sljit_sw srcw)
1064 {
1065 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1066 # define flags 0
1067 #else
1068 sljit_s32 flags = 0;
1069 #endif
1070
1071 CHECK_ERROR();
1072 CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
1073 ADJUST_LOCAL_OFFSET(dst, dstw);
1074 ADJUST_LOCAL_OFFSET(src, srcw);
1075
1076 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1077 if ((op & SLJIT_I32_OP) && GET_OPCODE(op) >= SLJIT_NOT) {
1078 flags |= INT_DATA | SIGNED_DATA;
1079 if (src & SLJIT_IMM)
1080 srcw = (sljit_s32)srcw;
1081 }
1082 #endif
1083
1084 switch (GET_OPCODE(op)) {
1085 case SLJIT_MOV:
1086 case SLJIT_MOV_P:
1087 return emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1088
1089 case SLJIT_MOV_U32:
1090 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1091 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1092 #else
1093 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u32)srcw : srcw);
1094 #endif
1095
1096 case SLJIT_MOV_S32:
1097 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1098 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1099 #else
1100 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s32)srcw : srcw);
1101 #endif
1102
1103 case SLJIT_MOV_U8:
1104 return emit_op(compiler, SLJIT_MOV_U8, BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u8)srcw : srcw);
1105
1106 case SLJIT_MOV_S8:
1107 return emit_op(compiler, SLJIT_MOV_S8, BYTE_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s8)srcw : srcw);
1108
1109 case SLJIT_MOV_U16:
1110 return emit_op(compiler, SLJIT_MOV_U16, HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u16)srcw : srcw);
1111
1112 case SLJIT_MOV_S16:
1113 return emit_op(compiler, SLJIT_MOV_S16, HALF_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s16)srcw : srcw);
1114
1115 case SLJIT_MOVU:
1116 case SLJIT_MOVU_P:
1117 return emit_op(compiler, SLJIT_MOV, WORD_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1118
1119 case SLJIT_MOVU_U32:
1120 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1121 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1122 #else
1123 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u32)srcw : srcw);
1124 #endif
1125
1126 case SLJIT_MOVU_S32:
1127 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1128 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1129 #else
1130 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s32)srcw : srcw);
1131 #endif
1132
1133 case SLJIT_MOVU_U8:
1134 return emit_op(compiler, SLJIT_MOV_U8, BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u8)srcw : srcw);
1135
1136 case SLJIT_MOVU_S8:
1137 return emit_op(compiler, SLJIT_MOV_S8, BYTE_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s8)srcw : srcw);
1138
1139 case SLJIT_MOVU_U16:
1140 return emit_op(compiler, SLJIT_MOV_U16, HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u16)srcw : srcw);
1141
1142 case SLJIT_MOVU_S16:
1143 return emit_op(compiler, SLJIT_MOV_S16, HALF_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s16)srcw : srcw);
1144
1145 case SLJIT_NOT:
1146 return emit_op(compiler, op, flags, dst, dstw, TMP_REG1, 0, src, srcw);
1147
1148 case SLJIT_NEG:
1149 return emit_op(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), flags | IMM_OP, dst, dstw, SLJIT_IMM, 0, src, srcw);
1150
1151 case SLJIT_CLZ:
1152 return emit_op(compiler, op, flags, dst, dstw, TMP_REG1, 0, src, srcw);
1153 }
1154
1155 return SLJIT_SUCCESS;
1156
1157 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1158 # undef flags
1159 #endif
1160 }
1161
sljit_emit_op2(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src1,sljit_sw src1w,sljit_s32 src2,sljit_sw src2w)1162 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
1163 sljit_s32 dst, sljit_sw dstw,
1164 sljit_s32 src1, sljit_sw src1w,
1165 sljit_s32 src2, sljit_sw src2w)
1166 {
1167 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1168 # define flags 0
1169 #else
1170 sljit_s32 flags = 0;
1171 #endif
1172
1173 CHECK_ERROR();
1174 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1175 ADJUST_LOCAL_OFFSET(dst, dstw);
1176 ADJUST_LOCAL_OFFSET(src1, src1w);
1177 ADJUST_LOCAL_OFFSET(src2, src2w);
1178
1179 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1180 if (op & SLJIT_I32_OP) {
1181 flags |= INT_DATA | SIGNED_DATA;
1182 if (src1 & SLJIT_IMM)
1183 src1w = (sljit_s32)src1w;
1184 if (src2 & SLJIT_IMM)
1185 src2w = (sljit_s32)src2w;
1186 }
1187 #endif
1188
1189 switch (GET_OPCODE(op)) {
1190 case SLJIT_ADD:
1191 case SLJIT_ADDC:
1192 return emit_op(compiler, op, flags | CUMULATIVE_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1193
1194 case SLJIT_SUB:
1195 case SLJIT_SUBC:
1196 return emit_op(compiler, op, flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1197
1198 case SLJIT_MUL:
1199 return emit_op(compiler, op, flags | CUMULATIVE_OP, dst, dstw, src1, src1w, src2, src2w);
1200
1201 case SLJIT_AND:
1202 case SLJIT_OR:
1203 case SLJIT_XOR:
1204 return emit_op(compiler, op, flags | CUMULATIVE_OP | LOGICAL_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1205
1206 case SLJIT_SHL:
1207 case SLJIT_LSHR:
1208 case SLJIT_ASHR:
1209 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1210 if (src2 & SLJIT_IMM)
1211 src2w &= 0x1f;
1212 #else
1213 if (src2 & SLJIT_IMM) {
1214 if (op & SLJIT_I32_OP)
1215 src2w &= 0x1f;
1216 else
1217 src2w &= 0x3f;
1218 }
1219 #endif
1220 return emit_op(compiler, op, flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1221 }
1222
1223 return SLJIT_SUCCESS;
1224
1225 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1226 # undef flags
1227 #endif
1228 }
1229
sljit_get_register_index(sljit_s32 reg)1230 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg)
1231 {
1232 CHECK_REG_INDEX(check_sljit_get_register_index(reg));
1233 return reg_map[reg];
1234 }
1235
sljit_get_float_register_index(sljit_s32 reg)1236 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg)
1237 {
1238 CHECK_REG_INDEX(check_sljit_get_float_register_index(reg));
1239 return reg << 1;
1240 }
1241
sljit_emit_op_custom(struct sljit_compiler * compiler,void * instruction,sljit_s32 size)1242 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1243 void *instruction, sljit_s32 size)
1244 {
1245 CHECK_ERROR();
1246 CHECK(check_sljit_emit_op_custom(compiler, instruction, size));
1247
1248 return push_inst(compiler, *(sljit_ins*)instruction, UNMOVABLE_INS);
1249 }
1250
1251 /* --------------------------------------------------------------------- */
1252 /* Floating point operators */
1253 /* --------------------------------------------------------------------- */
1254
sljit_is_fpu_available(void)1255 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void)
1256 {
1257 #ifdef SLJIT_IS_FPU_AVAILABLE
1258 return SLJIT_IS_FPU_AVAILABLE;
1259 #elif defined(__GNUC__)
1260 sljit_sw fir;
1261 asm ("cfc1 %0, $0" : "=r"(fir));
1262 return (fir >> 22) & 0x1;
1263 #else
1264 #error "FIR check is not implemented for this architecture"
1265 #endif
1266 }
1267
1268 #define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 7))
1269 #define FMT(op) (((op & SLJIT_F32_OP) ^ SLJIT_F32_OP) << (21 - 8))
1270
sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src,sljit_sw srcw)1271 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler *compiler, sljit_s32 op,
1272 sljit_s32 dst, sljit_sw dstw,
1273 sljit_s32 src, sljit_sw srcw)
1274 {
1275 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1276 # define flags 0
1277 #else
1278 sljit_s32 flags = (GET_OPCODE(op) == SLJIT_CONV_SW_FROM_F64) << 21;
1279 #endif
1280
1281 if (src & SLJIT_MEM) {
1282 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src, srcw, dst, dstw));
1283 src = TMP_FREG1;
1284 }
1285 else
1286 src <<= 1;
1287
1288 FAIL_IF(push_inst(compiler, (TRUNC_W_S ^ (flags >> 19)) | FMT(op) | FS(src) | FD(TMP_FREG1), MOVABLE_INS));
1289
1290 if (dst == SLJIT_UNUSED)
1291 return SLJIT_SUCCESS;
1292
1293 if (FAST_IS_REG(dst))
1294 return push_inst(compiler, MFC1 | flags | T(dst) | FS(TMP_FREG1), MOVABLE_INS);
1295
1296 /* Store the integer value from a VFP register. */
1297 return emit_op_mem2(compiler, flags ? DOUBLE_DATA : SINGLE_DATA, TMP_FREG1, dst, dstw, 0, 0);
1298
1299 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1300 # undef is_long
1301 #endif
1302 }
1303
sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src,sljit_sw srcw)1304 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler *compiler, sljit_s32 op,
1305 sljit_s32 dst, sljit_sw dstw,
1306 sljit_s32 src, sljit_sw srcw)
1307 {
1308 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1309 # define flags 0
1310 #else
1311 sljit_s32 flags = (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_SW) << 21;
1312 #endif
1313
1314 sljit_s32 dst_r = FAST_IS_REG(dst) ? (dst << 1) : TMP_FREG1;
1315
1316 if (FAST_IS_REG(src))
1317 FAIL_IF(push_inst(compiler, MTC1 | flags | T(src) | FS(TMP_FREG1), MOVABLE_INS));
1318 else if (src & SLJIT_MEM) {
1319 /* Load the integer value into a VFP register. */
1320 FAIL_IF(emit_op_mem2(compiler, ((flags) ? DOUBLE_DATA : SINGLE_DATA) | LOAD_DATA, TMP_FREG1, src, srcw, dst, dstw));
1321 }
1322 else {
1323 #if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
1324 if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32)
1325 srcw = (sljit_s32)srcw;
1326 #endif
1327 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), srcw));
1328 FAIL_IF(push_inst(compiler, MTC1 | flags | T(TMP_REG1) | FS(TMP_FREG1), MOVABLE_INS));
1329 }
1330
1331 FAIL_IF(push_inst(compiler, CVT_S_S | flags | (4 << 21) | (((op & SLJIT_F32_OP) ^ SLJIT_F32_OP) >> 8) | FS(TMP_FREG1) | FD(dst_r), MOVABLE_INS));
1332
1333 if (dst & SLJIT_MEM)
1334 return emit_op_mem2(compiler, FLOAT_DATA(op), TMP_FREG1, dst, dstw, 0, 0);
1335 return SLJIT_SUCCESS;
1336
1337 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1338 # undef flags
1339 #endif
1340 }
1341
sljit_emit_fop1_cmp(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 src1,sljit_sw src1w,sljit_s32 src2,sljit_sw src2w)1342 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op,
1343 sljit_s32 src1, sljit_sw src1w,
1344 sljit_s32 src2, sljit_sw src2w)
1345 {
1346 sljit_ins inst;
1347
1348 if (src1 & SLJIT_MEM) {
1349 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src1, src1w, src2, src2w));
1350 src1 = TMP_FREG1;
1351 }
1352 else
1353 src1 <<= 1;
1354
1355 if (src2 & SLJIT_MEM) {
1356 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG2, src2, src2w, 0, 0));
1357 src2 = TMP_FREG2;
1358 }
1359 else
1360 src2 <<= 1;
1361
1362 switch (GET_FLAG_TYPE(op)) {
1363 case SLJIT_EQUAL_F64:
1364 case SLJIT_NOT_EQUAL_F64:
1365 inst = C_UEQ_S;
1366 break;
1367 case SLJIT_LESS_F64:
1368 case SLJIT_GREATER_EQUAL_F64:
1369 inst = C_ULT_S;
1370 break;
1371 case SLJIT_GREATER_F64:
1372 case SLJIT_LESS_EQUAL_F64:
1373 inst = C_ULE_S;
1374 break;
1375 default:
1376 SLJIT_ASSERT(GET_FLAG_TYPE(op) == SLJIT_UNORDERED_F64 || GET_FLAG_TYPE(op) == SLJIT_ORDERED_F64);
1377 inst = C_UN_S;
1378 break;
1379 }
1380
1381 return push_inst(compiler, inst | FMT(op) | FT(src2) | FS(src1), UNMOVABLE_INS);
1382 }
1383
sljit_emit_fop1(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src,sljit_sw srcw)1384 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
1385 sljit_s32 dst, sljit_sw dstw,
1386 sljit_s32 src, sljit_sw srcw)
1387 {
1388 sljit_s32 dst_r;
1389
1390 CHECK_ERROR();
1391 compiler->cache_arg = 0;
1392 compiler->cache_argw = 0;
1393
1394 SLJIT_COMPILE_ASSERT((SLJIT_F32_OP == 0x100) && !(DOUBLE_DATA & 0x2), float_transfer_bit_error);
1395 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
1396
1397 if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_F32)
1398 op ^= SLJIT_F32_OP;
1399
1400 dst_r = FAST_IS_REG(dst) ? (dst << 1) : TMP_FREG1;
1401
1402 if (src & SLJIT_MEM) {
1403 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, dst_r, src, srcw, dst, dstw));
1404 src = dst_r;
1405 }
1406 else
1407 src <<= 1;
1408
1409 switch (GET_OPCODE(op)) {
1410 case SLJIT_MOV_F64:
1411 if (src != dst_r) {
1412 if (dst_r != TMP_FREG1)
1413 FAIL_IF(push_inst(compiler, MOV_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1414 else
1415 dst_r = src;
1416 }
1417 break;
1418 case SLJIT_NEG_F64:
1419 FAIL_IF(push_inst(compiler, NEG_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1420 break;
1421 case SLJIT_ABS_F64:
1422 FAIL_IF(push_inst(compiler, ABS_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1423 break;
1424 case SLJIT_CONV_F64_FROM_F32:
1425 FAIL_IF(push_inst(compiler, CVT_S_S | ((op & SLJIT_F32_OP) ? 1 : (1 << 21)) | FS(src) | FD(dst_r), MOVABLE_INS));
1426 op ^= SLJIT_F32_OP;
1427 break;
1428 }
1429
1430 if (dst & SLJIT_MEM)
1431 return emit_op_mem2(compiler, FLOAT_DATA(op), dst_r, dst, dstw, 0, 0);
1432 return SLJIT_SUCCESS;
1433 }
1434
sljit_emit_fop2(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src1,sljit_sw src1w,sljit_s32 src2,sljit_sw src2w)1435 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
1436 sljit_s32 dst, sljit_sw dstw,
1437 sljit_s32 src1, sljit_sw src1w,
1438 sljit_s32 src2, sljit_sw src2w)
1439 {
1440 sljit_s32 dst_r, flags = 0;
1441
1442 CHECK_ERROR();
1443 CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1444 ADJUST_LOCAL_OFFSET(dst, dstw);
1445 ADJUST_LOCAL_OFFSET(src1, src1w);
1446 ADJUST_LOCAL_OFFSET(src2, src2w);
1447
1448 compiler->cache_arg = 0;
1449 compiler->cache_argw = 0;
1450
1451 dst_r = FAST_IS_REG(dst) ? (dst << 1) : TMP_FREG2;
1452
1453 if (src1 & SLJIT_MEM) {
1454 if (getput_arg_fast(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src1, src1w)) {
1455 FAIL_IF(compiler->error);
1456 src1 = TMP_FREG1;
1457 } else
1458 flags |= SLOW_SRC1;
1459 }
1460 else
1461 src1 <<= 1;
1462
1463 if (src2 & SLJIT_MEM) {
1464 if (getput_arg_fast(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG2, src2, src2w)) {
1465 FAIL_IF(compiler->error);
1466 src2 = TMP_FREG2;
1467 } else
1468 flags |= SLOW_SRC2;
1469 }
1470 else
1471 src2 <<= 1;
1472
1473 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
1474 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1475 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG2, src2, src2w, src1, src1w));
1476 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src1, src1w, dst, dstw));
1477 }
1478 else {
1479 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src1, src1w, src2, src2w));
1480 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG2, src2, src2w, dst, dstw));
1481 }
1482 }
1483 else if (flags & SLOW_SRC1)
1484 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG1, src1, src1w, dst, dstw));
1485 else if (flags & SLOW_SRC2)
1486 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, TMP_FREG2, src2, src2w, dst, dstw));
1487
1488 if (flags & SLOW_SRC1)
1489 src1 = TMP_FREG1;
1490 if (flags & SLOW_SRC2)
1491 src2 = TMP_FREG2;
1492
1493 switch (GET_OPCODE(op)) {
1494 case SLJIT_ADD_F64:
1495 FAIL_IF(push_inst(compiler, ADD_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1496 break;
1497
1498 case SLJIT_SUB_F64:
1499 FAIL_IF(push_inst(compiler, SUB_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1500 break;
1501
1502 case SLJIT_MUL_F64:
1503 FAIL_IF(push_inst(compiler, MUL_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1504 break;
1505
1506 case SLJIT_DIV_F64:
1507 FAIL_IF(push_inst(compiler, DIV_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1508 break;
1509 }
1510
1511 if (dst_r == TMP_FREG2)
1512 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op), TMP_FREG2, dst, dstw, 0, 0));
1513
1514 return SLJIT_SUCCESS;
1515 }
1516
1517 /* --------------------------------------------------------------------- */
1518 /* Other instructions */
1519 /* --------------------------------------------------------------------- */
1520
sljit_emit_fast_enter(struct sljit_compiler * compiler,sljit_s32 dst,sljit_sw dstw)1521 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw)
1522 {
1523 CHECK_ERROR();
1524 CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw));
1525 ADJUST_LOCAL_OFFSET(dst, dstw);
1526
1527 /* For UNUSED dst. Uncommon, but possible. */
1528 if (dst == SLJIT_UNUSED)
1529 return SLJIT_SUCCESS;
1530
1531 if (FAST_IS_REG(dst))
1532 return push_inst(compiler, ADDU_W | SA(RETURN_ADDR_REG) | TA(0) | D(dst), DR(dst));
1533
1534 /* Memory. */
1535 return emit_op_mem(compiler, WORD_DATA, RETURN_ADDR_REG, dst, dstw);
1536 }
1537
sljit_emit_fast_return(struct sljit_compiler * compiler,sljit_s32 src,sljit_sw srcw)1538 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw)
1539 {
1540 CHECK_ERROR();
1541 CHECK(check_sljit_emit_fast_return(compiler, src, srcw));
1542 ADJUST_LOCAL_OFFSET(src, srcw);
1543
1544 if (FAST_IS_REG(src))
1545 FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | DA(RETURN_ADDR_REG), RETURN_ADDR_REG));
1546 else if (src & SLJIT_MEM)
1547 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, RETURN_ADDR_REG, src, srcw));
1548 else if (src & SLJIT_IMM)
1549 FAIL_IF(load_immediate(compiler, RETURN_ADDR_REG, srcw));
1550
1551 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
1552 return push_inst(compiler, NOP, UNMOVABLE_INS);
1553 }
1554
1555 /* --------------------------------------------------------------------- */
1556 /* Conditional instructions */
1557 /* --------------------------------------------------------------------- */
1558
sljit_emit_label(struct sljit_compiler * compiler)1559 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1560 {
1561 struct sljit_label *label;
1562
1563 CHECK_ERROR_PTR();
1564 CHECK_PTR(check_sljit_emit_label(compiler));
1565
1566 if (compiler->last_label && compiler->last_label->size == compiler->size)
1567 return compiler->last_label;
1568
1569 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1570 PTR_FAIL_IF(!label);
1571 set_label(label, compiler);
1572 compiler->delay_slot = UNMOVABLE_INS;
1573 return label;
1574 }
1575
1576 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1577 #define JUMP_LENGTH 4
1578 #else
1579 #define JUMP_LENGTH 8
1580 #endif
1581
1582 #define BR_Z(src) \
1583 inst = BEQ | SA(src) | TA(0) | JUMP_LENGTH; \
1584 flags = IS_BIT26_COND; \
1585 delay_check = src;
1586
1587 #define BR_NZ(src) \
1588 inst = BNE | SA(src) | TA(0) | JUMP_LENGTH; \
1589 flags = IS_BIT26_COND; \
1590 delay_check = src;
1591
1592 #define BR_T() \
1593 inst = BC1T | JUMP_LENGTH; \
1594 flags = IS_BIT16_COND; \
1595 delay_check = FCSR_FCC;
1596
1597 #define BR_F() \
1598 inst = BC1F | JUMP_LENGTH; \
1599 flags = IS_BIT16_COND; \
1600 delay_check = FCSR_FCC;
1601
sljit_emit_jump(struct sljit_compiler * compiler,sljit_s32 type)1602 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type)
1603 {
1604 struct sljit_jump *jump;
1605 sljit_ins inst;
1606 sljit_s32 flags = 0;
1607 sljit_s32 delay_check = UNMOVABLE_INS;
1608
1609 CHECK_ERROR_PTR();
1610 CHECK_PTR(check_sljit_emit_jump(compiler, type));
1611
1612 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1613 PTR_FAIL_IF(!jump);
1614 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1615 type &= 0xff;
1616
1617 switch (type) {
1618 case SLJIT_EQUAL:
1619 BR_NZ(EQUAL_FLAG);
1620 break;
1621 case SLJIT_NOT_EQUAL:
1622 BR_Z(EQUAL_FLAG);
1623 break;
1624 case SLJIT_LESS:
1625 case SLJIT_GREATER:
1626 case SLJIT_SIG_LESS:
1627 case SLJIT_SIG_GREATER:
1628 case SLJIT_OVERFLOW:
1629 case SLJIT_MUL_OVERFLOW:
1630 BR_Z(OTHER_FLAG);
1631 break;
1632 case SLJIT_GREATER_EQUAL:
1633 case SLJIT_LESS_EQUAL:
1634 case SLJIT_SIG_GREATER_EQUAL:
1635 case SLJIT_SIG_LESS_EQUAL:
1636 case SLJIT_NOT_OVERFLOW:
1637 case SLJIT_MUL_NOT_OVERFLOW:
1638 BR_NZ(OTHER_FLAG);
1639 break;
1640 case SLJIT_NOT_EQUAL_F64:
1641 case SLJIT_GREATER_EQUAL_F64:
1642 case SLJIT_GREATER_F64:
1643 case SLJIT_ORDERED_F64:
1644 BR_T();
1645 break;
1646 case SLJIT_EQUAL_F64:
1647 case SLJIT_LESS_F64:
1648 case SLJIT_LESS_EQUAL_F64:
1649 case SLJIT_UNORDERED_F64:
1650 BR_F();
1651 break;
1652 default:
1653 /* Not conditional branch. */
1654 inst = 0;
1655 break;
1656 }
1657
1658 jump->flags |= flags;
1659 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != delay_check))
1660 jump->flags |= IS_MOVABLE;
1661
1662 if (inst)
1663 PTR_FAIL_IF(push_inst(compiler, inst, UNMOVABLE_INS));
1664
1665 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1666 if (type <= SLJIT_JUMP) {
1667 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
1668 jump->addr = compiler->size;
1669 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1670 } else {
1671 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
1672 /* Cannot be optimized out if type is >= CALL0. */
1673 jump->flags |= IS_JAL | (type >= SLJIT_CALL0 ? IS_CALL : 0);
1674 PTR_FAIL_IF(push_inst(compiler, JALR | S(TMP_REG2) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1675 jump->addr = compiler->size;
1676 /* A NOP if type < CALL1. */
1677 PTR_FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_R0) | TA(0) | DA(4), UNMOVABLE_INS));
1678 }
1679 return jump;
1680 }
1681
1682 #define RESOLVE_IMM1() \
1683 if (src1 & SLJIT_IMM) { \
1684 if (src1w) { \
1685 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w)); \
1686 src1 = TMP_REG1; \
1687 } \
1688 else \
1689 src1 = 0; \
1690 }
1691
1692 #define RESOLVE_IMM2() \
1693 if (src2 & SLJIT_IMM) { \
1694 if (src2w) { \
1695 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG2), src2w)); \
1696 src2 = TMP_REG2; \
1697 } \
1698 else \
1699 src2 = 0; \
1700 }
1701
sljit_emit_cmp(struct sljit_compiler * compiler,sljit_s32 type,sljit_s32 src1,sljit_sw src1w,sljit_s32 src2,sljit_sw src2w)1702 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type,
1703 sljit_s32 src1, sljit_sw src1w,
1704 sljit_s32 src2, sljit_sw src2w)
1705 {
1706 struct sljit_jump *jump;
1707 sljit_s32 flags;
1708 sljit_ins inst;
1709
1710 CHECK_ERROR_PTR();
1711 CHECK_PTR(check_sljit_emit_cmp(compiler, type, src1, src1w, src2, src2w));
1712 ADJUST_LOCAL_OFFSET(src1, src1w);
1713 ADJUST_LOCAL_OFFSET(src2, src2w);
1714
1715 compiler->cache_arg = 0;
1716 compiler->cache_argw = 0;
1717 flags = ((type & SLJIT_I32_OP) ? INT_DATA : WORD_DATA) | LOAD_DATA;
1718 if (src1 & SLJIT_MEM) {
1719 PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG1), src1, src1w, src2, src2w));
1720 src1 = TMP_REG1;
1721 }
1722 if (src2 & SLJIT_MEM) {
1723 PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG2), src2, src2w, 0, 0));
1724 src2 = TMP_REG2;
1725 }
1726
1727 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1728 PTR_FAIL_IF(!jump);
1729 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1730 type &= 0xff;
1731
1732 if (type <= SLJIT_NOT_EQUAL) {
1733 RESOLVE_IMM1();
1734 RESOLVE_IMM2();
1735 jump->flags |= IS_BIT26_COND;
1736 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != DR(src1) && compiler->delay_slot != DR(src2)))
1737 jump->flags |= IS_MOVABLE;
1738 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_EQUAL ? BNE : BEQ) | S(src1) | T(src2) | JUMP_LENGTH, UNMOVABLE_INS));
1739 }
1740 else if (type >= SLJIT_SIG_LESS && (((src1 & SLJIT_IMM) && (src1w == 0)) || ((src2 & SLJIT_IMM) && (src2w == 0)))) {
1741 inst = NOP;
1742 if ((src1 & SLJIT_IMM) && (src1w == 0)) {
1743 RESOLVE_IMM2();
1744 switch (type) {
1745 case SLJIT_SIG_LESS:
1746 inst = BLEZ;
1747 jump->flags |= IS_BIT26_COND;
1748 break;
1749 case SLJIT_SIG_GREATER_EQUAL:
1750 inst = BGTZ;
1751 jump->flags |= IS_BIT26_COND;
1752 break;
1753 case SLJIT_SIG_GREATER:
1754 inst = BGEZ;
1755 jump->flags |= IS_BIT16_COND;
1756 break;
1757 case SLJIT_SIG_LESS_EQUAL:
1758 inst = BLTZ;
1759 jump->flags |= IS_BIT16_COND;
1760 break;
1761 }
1762 src1 = src2;
1763 }
1764 else {
1765 RESOLVE_IMM1();
1766 switch (type) {
1767 case SLJIT_SIG_LESS:
1768 inst = BGEZ;
1769 jump->flags |= IS_BIT16_COND;
1770 break;
1771 case SLJIT_SIG_GREATER_EQUAL:
1772 inst = BLTZ;
1773 jump->flags |= IS_BIT16_COND;
1774 break;
1775 case SLJIT_SIG_GREATER:
1776 inst = BLEZ;
1777 jump->flags |= IS_BIT26_COND;
1778 break;
1779 case SLJIT_SIG_LESS_EQUAL:
1780 inst = BGTZ;
1781 jump->flags |= IS_BIT26_COND;
1782 break;
1783 }
1784 }
1785 PTR_FAIL_IF(push_inst(compiler, inst | S(src1) | JUMP_LENGTH, UNMOVABLE_INS));
1786 }
1787 else {
1788 if (type == SLJIT_LESS || type == SLJIT_GREATER_EQUAL || type == SLJIT_SIG_LESS || type == SLJIT_SIG_GREATER_EQUAL) {
1789 RESOLVE_IMM1();
1790 if ((src2 & SLJIT_IMM) && src2w <= SIMM_MAX && src2w >= SIMM_MIN)
1791 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src1) | T(TMP_REG1) | IMM(src2w), DR(TMP_REG1)));
1792 else {
1793 RESOLVE_IMM2();
1794 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src1) | T(src2) | D(TMP_REG1), DR(TMP_REG1)));
1795 }
1796 type = (type == SLJIT_LESS || type == SLJIT_SIG_LESS) ? SLJIT_NOT_EQUAL : SLJIT_EQUAL;
1797 }
1798 else {
1799 RESOLVE_IMM2();
1800 if ((src1 & SLJIT_IMM) && src1w <= SIMM_MAX && src1w >= SIMM_MIN)
1801 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src2) | T(TMP_REG1) | IMM(src1w), DR(TMP_REG1)));
1802 else {
1803 RESOLVE_IMM1();
1804 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src2) | T(src1) | D(TMP_REG1), DR(TMP_REG1)));
1805 }
1806 type = (type == SLJIT_GREATER || type == SLJIT_SIG_GREATER) ? SLJIT_NOT_EQUAL : SLJIT_EQUAL;
1807 }
1808
1809 jump->flags |= IS_BIT26_COND;
1810 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_EQUAL ? BNE : BEQ) | S(TMP_REG1) | TA(0) | JUMP_LENGTH, UNMOVABLE_INS));
1811 }
1812
1813 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1814 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
1815 jump->addr = compiler->size;
1816 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1817 return jump;
1818 }
1819
1820 #undef RESOLVE_IMM1
1821 #undef RESOLVE_IMM2
1822
1823 #undef JUMP_LENGTH
1824 #undef BR_Z
1825 #undef BR_NZ
1826 #undef BR_T
1827 #undef BR_F
1828
1829 #undef FLOAT_DATA
1830 #undef FMT
1831
sljit_emit_ijump(struct sljit_compiler * compiler,sljit_s32 type,sljit_s32 src,sljit_sw srcw)1832 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw)
1833 {
1834 sljit_s32 src_r = TMP_REG2;
1835 struct sljit_jump *jump = NULL;
1836
1837 CHECK_ERROR();
1838 CHECK(check_sljit_emit_ijump(compiler, type, src, srcw));
1839 ADJUST_LOCAL_OFFSET(src, srcw);
1840
1841 if (FAST_IS_REG(src)) {
1842 if (DR(src) != 4)
1843 src_r = src;
1844 else
1845 FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
1846 }
1847
1848 if (type >= SLJIT_CALL0) {
1849 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
1850 if (src & (SLJIT_IMM | SLJIT_MEM)) {
1851 if (src & SLJIT_IMM)
1852 FAIL_IF(load_immediate(compiler, DR(PIC_ADDR_REG), srcw));
1853 else {
1854 SLJIT_ASSERT(src_r == TMP_REG2 && (src & SLJIT_MEM));
1855 FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, TMP_REG2, 0, TMP_REG1, 0, src, srcw));
1856 }
1857 FAIL_IF(push_inst(compiler, JALR | S(PIC_ADDR_REG) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1858 /* We need an extra instruction in any case. */
1859 return push_inst(compiler, ADDU_W | S(SLJIT_R0) | TA(0) | DA(4), UNMOVABLE_INS);
1860 }
1861
1862 /* Register input. */
1863 if (type >= SLJIT_CALL1)
1864 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_R0) | TA(0) | DA(4), 4));
1865 FAIL_IF(push_inst(compiler, JALR | S(src_r) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1866 return push_inst(compiler, ADDU_W | S(src_r) | TA(0) | D(PIC_ADDR_REG), UNMOVABLE_INS);
1867 }
1868
1869 if (src & SLJIT_IMM) {
1870 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1871 FAIL_IF(!jump);
1872 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_JAL : 0));
1873 jump->u.target = srcw;
1874
1875 if (compiler->delay_slot != UNMOVABLE_INS)
1876 jump->flags |= IS_MOVABLE;
1877
1878 FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1879 }
1880 else if (src & SLJIT_MEM)
1881 FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, TMP_REG2, 0, TMP_REG1, 0, src, srcw));
1882
1883 FAIL_IF(push_inst(compiler, JR | S(src_r), UNMOVABLE_INS));
1884 if (jump)
1885 jump->addr = compiler->size;
1886 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1887 return SLJIT_SUCCESS;
1888 }
1889
sljit_emit_op_flags(struct sljit_compiler * compiler,sljit_s32 op,sljit_s32 dst,sljit_sw dstw,sljit_s32 src,sljit_sw srcw,sljit_s32 type)1890 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
1891 sljit_s32 dst, sljit_sw dstw,
1892 sljit_s32 src, sljit_sw srcw,
1893 sljit_s32 type)
1894 {
1895 sljit_s32 sugg_dst_ar, dst_ar;
1896 sljit_s32 flags = GET_ALL_FLAGS(op);
1897 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1898 # define mem_type WORD_DATA
1899 #else
1900 sljit_s32 mem_type = (op & SLJIT_I32_OP) ? (INT_DATA | SIGNED_DATA) : WORD_DATA;
1901 #endif
1902
1903 CHECK_ERROR();
1904 CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));
1905 ADJUST_LOCAL_OFFSET(dst, dstw);
1906
1907 if (dst == SLJIT_UNUSED)
1908 return SLJIT_SUCCESS;
1909
1910 op = GET_OPCODE(op);
1911 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1912 if (op == SLJIT_MOV_S32 || op == SLJIT_MOV_U32)
1913 mem_type = INT_DATA | SIGNED_DATA;
1914 #endif
1915 sugg_dst_ar = DR((op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2);
1916
1917 compiler->cache_arg = 0;
1918 compiler->cache_argw = 0;
1919 if (op >= SLJIT_ADD && (src & SLJIT_MEM)) {
1920 ADJUST_LOCAL_OFFSET(src, srcw);
1921 FAIL_IF(emit_op_mem2(compiler, mem_type | LOAD_DATA, DR(TMP_REG1), src, srcw, dst, dstw));
1922 src = TMP_REG1;
1923 srcw = 0;
1924 }
1925
1926 switch (type & 0xff) {
1927 case SLJIT_EQUAL:
1928 case SLJIT_NOT_EQUAL:
1929 FAIL_IF(push_inst(compiler, SLTIU | SA(EQUAL_FLAG) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1930 dst_ar = sugg_dst_ar;
1931 break;
1932 case SLJIT_MUL_OVERFLOW:
1933 case SLJIT_MUL_NOT_OVERFLOW:
1934 FAIL_IF(push_inst(compiler, SLTIU | SA(OTHER_FLAG) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1935 dst_ar = sugg_dst_ar;
1936 type ^= 0x1; /* Flip type bit for the XORI below. */
1937 break;
1938 case SLJIT_GREATER_F64:
1939 case SLJIT_LESS_EQUAL_F64:
1940 type ^= 0x1; /* Flip type bit for the XORI below. */
1941 /* Fall through. */
1942 case SLJIT_EQUAL_F64:
1943 case SLJIT_NOT_EQUAL_F64:
1944 case SLJIT_LESS_F64:
1945 case SLJIT_GREATER_EQUAL_F64:
1946 case SLJIT_UNORDERED_F64:
1947 case SLJIT_ORDERED_F64:
1948 FAIL_IF(push_inst(compiler, CFC1 | TA(sugg_dst_ar) | DA(FCSR_REG), sugg_dst_ar));
1949 FAIL_IF(push_inst(compiler, SRL | TA(sugg_dst_ar) | DA(sugg_dst_ar) | SH_IMM(23), sugg_dst_ar));
1950 FAIL_IF(push_inst(compiler, ANDI | SA(sugg_dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1951 dst_ar = sugg_dst_ar;
1952 break;
1953
1954 default:
1955 dst_ar = OTHER_FLAG;
1956 break;
1957 }
1958
1959 if (type & 0x1) {
1960 FAIL_IF(push_inst(compiler, XORI | SA(dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1961 dst_ar = sugg_dst_ar;
1962 }
1963
1964 if (op >= SLJIT_ADD) {
1965 if (DR(TMP_REG2) != dst_ar)
1966 FAIL_IF(push_inst(compiler, ADDU_W | SA(dst_ar) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
1967 return emit_op(compiler, op | flags, mem_type | CUMULATIVE_OP | LOGICAL_OP | IMM_OP | ALT_KEEP_CACHE, dst, dstw, src, srcw, TMP_REG2, 0);
1968 }
1969
1970 if (dst & SLJIT_MEM)
1971 return emit_op_mem(compiler, mem_type, dst_ar, dst, dstw);
1972
1973 if (sugg_dst_ar != dst_ar)
1974 return push_inst(compiler, ADDU_W | SA(dst_ar) | TA(0) | DA(sugg_dst_ar), sugg_dst_ar);
1975 return SLJIT_SUCCESS;
1976
1977 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1978 # undef mem_type
1979 #endif
1980 }
1981
sljit_emit_const(struct sljit_compiler * compiler,sljit_s32 dst,sljit_sw dstw,sljit_sw init_value)1982 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value)
1983 {
1984 struct sljit_const *const_;
1985 sljit_s32 reg;
1986
1987 CHECK_ERROR_PTR();
1988 CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value));
1989 ADJUST_LOCAL_OFFSET(dst, dstw);
1990
1991 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
1992 PTR_FAIL_IF(!const_);
1993 set_const(const_, compiler);
1994
1995 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2;
1996
1997 PTR_FAIL_IF(emit_const(compiler, reg, init_value));
1998
1999 if (dst & SLJIT_MEM)
2000 PTR_FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, TMP_REG2, 0));
2001 return const_;
2002 }
2003