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Searched defs:ResVT (Results 1 – 23 of 23) sorted by relevance

/freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeVectorTypes.cpp347 EVT ResVT = N->getValueType(0); in ScalarizeVecRes_OverflowOp() local
1043 EVT ResVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecOp_CMP() local
1865 EVT ResVT = N->getValueType(0); in SplitVecRes_OverflowOp() local
3323 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE() local
3342 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE_SEQ() local
3368 EVT ResVT = N->getValueType(0); in SplitVecOp_VP_REDUCE() local
3392 EVT ResVT = N->getValueType(0); in SplitVecOp_UnaryOp() local
3435 EVT ResVT = N->getValueType(0); in SplitVecOp_BITCAST() local
3460 EVT ResVT = N->getValueType(0); in SplitVecOp_INSERT_SUBVECTOR() local
4157 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_ROUND() local
[all …]
HDLegalizeIntegerTypes.cpp368 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() local
2608 EVT ResVT = N->getValueType(0); in PromoteIntOp_VECREDUCE() local
5714 EVT ResVT = V0.getValueType(); in PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE() local
6113 EVT ResVT = N->getValueType(0); in PromoteIntOp_CONCAT_VECTORS() local
HDSelectionDAG.cpp2058 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT) { in getStepVector()
2063 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT, in getStepVector()
12485 EVT ResVT = N->getValueType(0); in UnrollVectorOverflowOp() local
HDTargetLowering.cpp9181 EVT ResVT = N->getValueType(0); in expandVPCTTZElements() local
10446 EVT ResVT = Node->getValueType(0); in expandCMP() local
HDDAGCombiner.cpp8163 EVT ResVT = ExtractFrom.getValueType(); in extractShiftForRotate() local
19449 EVT ResVT = Use->getValueType(0); in canMergeExpensiveCrossRegisterBankCopy() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/VE/
HDVVPISelLowering.cpp351 MVT ResVT = splitVectorType(Op.getValue(0).getSimpleValueType()); in splitVectorOp() local
HDVECustomDAG.cpp562 SDValue VECustomDAG::getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, in getLegalReductionOpVVP()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
HDWebAssemblyISelLowering.cpp2512 EVT ResVT = N->getValueType(0); in performVectorExtendToFPCombine() local
2546 EVT ResVT = N->getValueType(0); in performVectorExtendCombine() local
2615 EVT ResVT; in performVectorTruncZeroCombine() local
2662 EVT ResVT; in performVectorTruncZeroCombine() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMTargetTransformInfo.cpp1771 EVT ResVT = TLI->getValueType(DL, ResTy); in getExtendedReductionCost() local
1806 EVT ResVT = TLI->getValueType(DL, ResTy); in getMulAccReductionCost() local
HDARMISelLowering.cpp17101 EVT ResVT = N->getValueType(0); in PerformVECREDUCE_ADDCombine() local
21255 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
HDNVPTXISelLowering.cpp6053 EVT ResVT = N->getValueType(0); in ReplaceLoadVector() local
6213 EVT ResVT = N->getValueType(0); in ReplaceINTRINSIC_W_CHAIN() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.cpp1954 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT, in shouldExpandGetActiveLaneMask()
6052 EVT ResVT = Op.getValueType(); in LowerINTRINSIC_WO_CHAIN() local
14847 static bool canLowerSRLToRoundingShiftForVT(SDValue Shift, EVT ResVT, in canLowerSRLToRoundingShiftForVT()
17592 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
22083 EVT ResVT = N->getValueType(0); in tryCombineExtendRShTrunc() local
22125 EVT ResVT; in trySimplifySrlAddToRshrnb() local
22151 EVT ResVT = N->getValueType(0); in performUzpCombine() local
22341 EVT ResVT = N->getValueType(0); in performGLD1Combine() local
24254 EVT ResVT = N->getValueType(0); in performVSelectCombine() local
24277 EVT ResVT = N->getValueType(0); in performSelectCombine() local
[all …]
/freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDBasicTTIImpl.h1747 EVT ResVT = getTLI()->getValueType(DL, RetTy, true); in getIntrinsicInstrCost() local
HDTargetLowering.h3319 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86FastISel.cpp3618 EVT ResVT = VA.getValVT(); in fastLowerCall() local
HDX86ISelLowering.cpp3195 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
9217 MVT ResVT = Op.getSimpleValueType(); in LowerAVXCONCAT_VECTORS() local
9285 MVT ResVT = Op.getSimpleValueType(); in LowerCONCAT_VECTORSvXi1() local
20077 EVT ResVT = getSetCCResultType(DAG.getDataLayout(), in FP_TO_INTHelper() local
20881 MVT ResVT = MVT::v4i32; in LowerFP_TO_INT() local
20922 MVT ResVT = VT; in LowerFP_TO_INT() local
20998 MVT ResVT = SrcVT == MVT::v4f64 ? MVT::v8i32 : MVT::v16i32; in LowerFP_TO_INT() local
32702 EVT ResVT = getTypeToTransformTo(*DAG.getContext(), VT); in ReplaceNodeResults() local
32924 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in ReplaceNodeResults() local
44555 EVT ResVT = in combineVPDPBUSDPattern() local
[all …]
HDX86ISelDAGToDAG.cpp4958 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZISelLowering.cpp3834 EVT ResVT = Op.getValueType(); in lowerBITCAST() local
6526 SDValue SystemZTargetLowering::combineExtract(const SDLoc &DL, EVT ResVT, in combineExtract()
6659 EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); in combineTruncateExtract() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonISelLowering.cpp2180 bool HexagonTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVISelLowering.cpp2292 bool RISCVTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
9802 static SDValue lowerReductionSeq(unsigned RVVOpcode, MVT ResVT, in lowerReductionSeq()
9935 MVT ResVT = Op.getSimpleValueType(); in lowerFPVECREDUCE() local
10004 MVT ResVT = Res.getSimpleValueType(); in lowerVPREDUCE() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIISelLowering.cpp1928 bool SITargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
5741 auto ResVT = DAG.GetSplitDestVTs(VT); in splitTernaryVectorOp() local
13379 EVT ResVT = N->getValueType(0); in performExtractVectorEltCombine() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCISelDAGToDAG.cpp4581 EVT ResVT = VecVT.changeVectorElementTypeToInteger(); in trySETCC() local
HDPPCISelLowering.cpp8164 EVT ResVT = Op.getValueType(); in LowerSELECT_CC() local
15369 EVT ResVT = Val.getValueType(); in combineStoreFPToInt() local