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Searched defs:RegClassInfo (Results 1 – 17 of 17) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
DAllocationOrder.cpp30 const RegisterClassInfo &RegClassInfo, in create()
DCriticalAntiDepBreaker.h41 const RegisterClassInfo &RegClassInfo; variable
DRegAllocBase.h70 RegisterClassInfo RegClassInfo; variable
DAggressiveAntiDepBreaker.h122 const RegisterClassInfo &RegClassInfo; variable
DBreakFalseDeps.cpp38 RegisterClassInfo RegClassInfo; member in llvm::BreakFalseDeps
DPostRASchedulerList.cpp80 RegisterClassInfo RegClassInfo; member in __anoncd502b400111::PostRAScheduler
DMachineCombiner.cpp76 RegisterClassInfo RegClassInfo; member in __anond6c241300111::MachineCombiner
DMachineSink.cpp124 RegisterClassInfo RegClassInfo; member in __anonfd84ab360111::MachineSinking
DRegAllocFast.cpp86 RegisterClassInfo RegClassInfo; member in __anon27e2e4030111::RegAllocFast
DRegisterCoalescer.cpp134 RegisterClassInfo RegClassInfo; member in __anon045bf5a20111::RegisterCoalescer
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h235 struct RegClassInfo { struct
247 const RegClassInfo *const RCInfos; argument
DMachinePipeliner.h68 RegisterClassInfo RegClassInfo; variable
116 const RegisterClassInfo &RegClassInfo; variable
DMachineScheduler.h128 RegisterClassInfo *RegClassInfo; member
DTargetInstrInfo.h1125 RegisterClassInfo *RegClassInfo) const { in shouldReduceRegisterPressure()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DSIPreAllocateWWMRegs.cpp38 RegisterClassInfo RegClassInfo; member in __anon2ca6efff0111::SIPreAllocateWWMRegs
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp111 RegisterClassInfo RegClassInfo; member
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp306 auto RegClassInfo = Names2RegClasses.find(Name); in getRegClass() local