| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64LowerHomogeneousPrologEpilog.cpp | 200 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitStore()
223 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitLoad()
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| D | AArch64FrameLowering.cpp | 2448 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
2479 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
2499 unsigned Reg2 = AArch64::NoRegister; member
2749 unsigned Reg2 = RPI.Reg2; in spillCalleeSavedRegisters() local
2855 unsigned Reg2 = RPI.Reg2; in restoreCalleeSavedRegisters() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MicroMipsSizeReduction.cpp | 378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() local
479 Register Reg2 = MI2->getOperand(1).getReg(); in ReduceXWtoXWP() local
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| D | MipsAsmPrinter.cpp | 952 unsigned Reg2) { in EmitInstrRegReg()
972 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
983 unsigned Reg2, unsigned FPReg1, in EmitMovFPIntPair()
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| D | MipsISelLowering.cpp | 2969 unsigned Reg2 = State.AllocateReg(IntRegs); in CC_MipsO32() local
3703 unsigned Reg2 = in LowerFormalArguments() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 190 Register Reg2 = MI.getOperand(2).getReg(); in processBlock() local
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| D | PPCVSXSwapRemoval.cpp | 899 Register Reg2 = MI->getOperand(2).getReg(); in handleSpecialSwappables() local
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| D | PPCInstrInfo.cpp | 1168 Register Reg2 = MI.getOperand(2).getReg(); in commuteInstructionImpl() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 166 unsigned Reg2, bool isKill2) { in addRegReg()
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| D | X86InstrInfo.cpp | 2712 Register Reg2 = MI.getOperand(2).getReg(); in hasCommutePreference() local
6225 Register Reg2 = MI.getOperand(CommuteOpIdx2).getReg(); in foldMemoryOperandImpl() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 758 Register Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
793 Register Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
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| D | A15SDOptimizer.cpp | 446 const DebugLoc &DL, unsigned Reg1, unsigned Reg2) { in createRegSequence()
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| D | ARMFastISel.cpp | 2800 unsigned Reg2 = 0; in SelectShift() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 1004 bool &HaveReg2, Register &Reg2, in parseAddress()
1115 Register Reg1, Reg2; in parseAddress() local
1523 Register Reg1, Reg2; in parseOperand() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 644 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 227 unsigned Reg2, SMLoc IDLoc, in emitRRR()
233 unsigned Reg2, MCOperand Op3, SMLoc IDLoc, in emitRRRX()
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 89 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) { in UnionGroups()
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| D | TargetInstrInfo.cpp | 185 Register Reg2 = MI.getOperand(Idx2).getReg(); in commuteInstructionImpl() local
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| /openbsd/src/gnu/llvm/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 78 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1760 StringRef Reg2(R2); in processInstruction() local
1904 StringRef Reg2(R2); in processInstruction() local
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 105 bool contains(Register Reg1, Register Reg2) const { in contains()
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| /openbsd/src/gnu/llvm/llvm/lib/MC/ |
| D | MCDwarf.cpp | 1327 unsigned Reg2 = Instr.getRegister2(); in emitCFIInstruction() local
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| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1455 CodeGenRegister *Reg2 = I1.second; in computeComposites() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.cpp | 2542 Register Reg2; in parseCFIOperand() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 2602 bool Reg1 = Src1.isReg(), Reg2 = Src2.isReg(); in evaluateHexCompare2() local
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