1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright 2018 Emmanuel Vadot <manu@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: stable/12/sys/arm64/rockchip/clk/rk_clk_composite.h 364938 2020-08-28 20:25:03Z gonzo $ 29 */ 30 31 #ifndef _RK_CLK_COMPOSITE_H_ 32 #define _RK_CLK_COMPOSITE_H_ 33 34 #include <dev/extres/clk/clk.h> 35 36 struct rk_clk_composite_def { 37 struct clknode_init_def clkdef; 38 39 uint32_t muxdiv_offset; 40 41 uint32_t mux_shift; 42 uint32_t mux_width; 43 44 uint32_t div_shift; 45 uint32_t div_width; 46 47 uint32_t gate_offset; 48 uint32_t gate_shift; 49 50 uint32_t flags; 51 }; 52 53 #define RK_CLK_COMPOSITE_HAVE_MUX 0x0001 54 #define RK_CLK_COMPOSITE_HAVE_GATE 0x0002 55 #define RK_CLK_COMPOSITE_DIV_EXP 0x0004 /* Register 0, 1, 2, 2, ... */ 56 /* Divider 1, 2, 4, 8, ... */ 57 #define RK_CLK_COMPOSITE_GRF 0x0008 /* Use syscon registers instead of CRU's */ 58 int rk_clk_composite_register(struct clkdom *clkdom, 59 struct rk_clk_composite_def *clkdef); 60 61 #endif /* _RK_CLK_COMPOSITE_H_ */ 62