1 /*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ppbus/ppbconf.h,v 1.17.2.1 2000/05/24 00:20:57 n_hibma Exp $ 27 * $DragonFly: src/sys/bus/ppbus/ppbconf.h,v 1.3 2003/07/19 21:14:25 dillon Exp $ 28 * 29 */ 30 #ifndef __PPBCONF_H 31 #define __PPBCONF_H 32 33 #include <sys/queue.h> 34 35 /* 36 * Parallel Port Chipset mode masks. 37 * NIBBLE mode is supposed to be available under each other modes. 38 */ 39 #define PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 40 41 #define PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 42 #define PPB_PS2 0x2 /* PS/2 byte mode */ 43 #define PPB_EPP 0x4 /* EPP mode, 32 bit */ 44 #define PPB_ECP 0x8 /* ECP mode */ 45 46 /* mode aliases */ 47 #define PPB_SPP PPB_NIBBLE|PPB_PS2 48 #define PPB_BYTE PPB_PS2 49 50 #define PPB_MASK 0x0f 51 #define PPB_OPTIONS_MASK 0xf0 52 53 #define PPB_IS_EPP(mode) (mode & PPB_EPP) 54 #define PPB_IN_EPP_MODE(bus) (PPB_IS_EPP (ppb_get_mode (bus))) 55 #define PPB_IN_NIBBLE_MODE(bus) (ppb_get_mode (bus) & PPB_NIBBLE) 56 #define PPB_IN_PS2_MODE(bus) (ppb_get_mode (bus) & PPB_PS2) 57 58 #define n(flags) (~(flags) & (flags)) 59 60 /* 61 * Parallel Port Chipset control bits. 62 */ 63 #define STROBE 0x01 64 #define AUTOFEED 0x02 65 #define nINIT 0x04 66 #define SELECTIN 0x08 67 #define IRQENABLE 0x10 68 #define PCD 0x20 69 70 #define nSTROBE n(STROBE) 71 #define nAUTOFEED n(AUTOFEED) 72 #define INIT n(nINIT) 73 #define nSELECTIN n(SELECTIN) 74 #define nPCD n(PCD) 75 76 /* 77 * Parallel Port Chipset status bits. 78 */ 79 #define TIMEOUT 0x01 80 #define nFAULT 0x08 81 #define SELECT 0x10 82 #define PERROR 0x20 83 #define nACK 0x40 84 #define nBUSY 0x80 85 86 /* 87 * Structure to store status information. 88 */ 89 struct ppb_status { 90 unsigned char status; 91 92 unsigned int timeout:1; 93 unsigned int error:1; 94 unsigned int select:1; 95 unsigned int paper_end:1; 96 unsigned int ack:1; 97 unsigned int busy:1; 98 }; 99 100 /* Parallel port bus I/O opcodes */ 101 #define PPB_OUTSB_EPP 1 102 #define PPB_OUTSW_EPP 2 103 #define PPB_OUTSL_EPP 3 104 #define PPB_INSB_EPP 4 105 #define PPB_INSW_EPP 5 106 #define PPB_INSL_EPP 6 107 #define PPB_RDTR 7 108 #define PPB_RSTR 8 109 #define PPB_RCTR 9 110 #define PPB_REPP_A 10 111 #define PPB_REPP_D 11 112 #define PPB_RECR 12 113 #define PPB_RFIFO 13 114 #define PPB_WDTR 14 115 #define PPB_WSTR 15 116 #define PPB_WCTR 16 117 #define PPB_WEPP_A 17 118 #define PPB_WEPP_D 18 119 #define PPB_WECR 19 120 #define PPB_WFIFO 20 121 122 /* 123 * How tsleep() is called in ppb_request_bus(). 124 */ 125 #define PPB_DONTWAIT 0 126 #define PPB_NOINTR 0 127 #define PPB_WAIT 0x1 128 #define PPB_INTR 0x2 129 #define PPB_POLL 0x4 130 #define PPB_FOREVER -1 131 132 /* 133 * Microsequence stuff. 134 */ 135 #define PPB_MS_MAXLEN 64 /* XXX according to MS_INS_MASK */ 136 #define PPB_MS_MAXARGS 3 /* according to MS_ARG_MASK */ 137 138 /* maximum number of mode dependent 139 * submicrosequences for in/out operations 140 */ 141 #define PPB_MAX_XFER 6 142 143 union ppb_insarg { 144 int i; 145 void *p; 146 char *c; 147 int (* f)(void *, char *); 148 }; 149 150 struct ppb_microseq { 151 int opcode; /* microins. opcode */ 152 union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */ 153 }; 154 155 /* microseqences used for GET/PUT operations */ 156 struct ppb_xfer { 157 struct ppb_microseq *loop; /* the loop microsequence */ 158 }; 159 160 /* 161 * Parallel Port Bus Device structure. 162 */ 163 struct ppb_data; /* see below */ 164 165 struct ppb_context { 166 int valid; /* 1 if the struct is valid */ 167 int mode; /* XXX chipset operating mode */ 168 169 struct microseq *curpc; /* pc in curmsq */ 170 struct microseq *curmsq; /* currently executed microseqence */ 171 }; 172 173 /* 174 * List of IVARS available to ppb device drivers 175 */ 176 #define PPBUS_IVAR_MODE 0 177 #define PPBUS_IVAR_AVM 1 178 #define PPBUS_IVAR_IRQ 2 179 180 /* other fields are reserved to the ppbus internals */ 181 182 struct ppb_device { 183 184 const char *name; /* name of the device */ 185 186 ushort mode; /* current mode of the device */ 187 ushort avm; /* available IEEE1284 modes of 188 * the device */ 189 uint flags; /* flags */ 190 191 struct ppb_context ctx; /* context of the device */ 192 193 /* mode dependent get msq. If NULL, 194 * IEEE1284 code is used */ 195 struct ppb_xfer 196 get_xfer[PPB_MAX_XFER]; 197 198 /* mode dependent put msq. If NULL, 199 * IEEE1284 code is used */ 200 struct ppb_xfer 201 put_xfer[PPB_MAX_XFER]; 202 203 struct resource *intr_resource; 204 void *intr_cookie; 205 206 void *drv1, *drv2; /* drivers private data */ 207 }; 208 209 /* EPP standards */ 210 #define EPP_1_9 0x0 /* default */ 211 #define EPP_1_7 0x1 212 213 /* Parallel Port Chipset IVARS */ /* elsewhere XXX */ 214 #define PPC_IVAR_EPP_PROTO 0 215 #define PPC_IVAR_IRQ 1 216 217 /* 218 * Maximum size of the PnP info string 219 */ 220 #define PPB_PnP_STRING_SIZE 256 /* XXX */ 221 222 /* 223 * Parallel Port Bus structure. 224 */ 225 struct ppb_data { 226 227 #define PPB_PnP_PRINTER 0 228 #define PPB_PnP_MODEM 1 229 #define PPB_PnP_NET 2 230 #define PPB_PnP_HDC 3 231 #define PPB_PnP_PCMCIA 4 232 #define PPB_PnP_MEDIA 5 233 #define PPB_PnP_FDC 6 234 #define PPB_PnP_PORTS 7 235 #define PPB_PnP_SCANNER 8 236 #define PPB_PnP_DIGICAM 9 237 #define PPB_PnP_UNKNOWN 10 238 int class_id; /* not a PnP device if class_id < 0 */ 239 240 int state; /* current IEEE1284 state */ 241 int error; /* last IEEE1284 error */ 242 243 int mode; /* IEEE 1284-1994 mode 244 * NIBBLE, PS2, EPP or ECP */ 245 246 void *ppb_owner; /* device which owns the bus */ 247 }; 248 249 #ifdef _KERNEL 250 extern int ppb_attach_device(device_t); 251 extern int ppb_request_bus(device_t, device_t, int); 252 extern int ppb_release_bus(device_t, device_t); 253 254 /* bus related functions */ 255 extern int ppb_get_status(device_t, struct ppb_status *); 256 extern int ppb_poll_bus(device_t, int, char, char, int); 257 extern int ppb_reset_epp_timeout(device_t); 258 extern int ppb_ecp_sync(device_t); 259 extern int ppb_get_epp_protocol(device_t); 260 extern int ppb_set_mode(device_t, int); /* returns old mode */ 261 extern int ppb_get_mode(device_t); /* returns current mode */ 262 extern int ppb_write(device_t, char *, int, int); 263 #endif /* _KERNEL */ 264 265 /* 266 * These are defined as macros for speedup. 267 #define ppb_get_base_addr(dev) ((dev)->ppb->ppb_link->base) 268 #define ppb_get_epp_protocol(dev) ((dev)->ppb->ppb_link->epp_protocol) 269 #define ppb_get_irq(dev) ((dev)->ppb->ppb_link->id_irq) 270 */ 271 272 #endif 273