| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
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| D | TargetLoweringBase.cpp | 1184 SmallVectorImpl<ISD::OutputArg> &Outs, in GetReturnInfo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonCallingConvLower.cpp | 94 Hexagon_CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
132 &Outs, in AnalyzeCallOperands()
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| D | HexagonISelLowering.cpp | 315 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
398 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1688 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
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| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 270 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs()
355 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult()
399 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
527 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
582 &Outs, in LowerCCCCallTo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 881 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
913 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCCCCallTo()
1263 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
1273 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 173 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
184 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn_32()
247 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn_64()
686 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall_32() local
1007 ArrayRef<ISD::OutputArg> Outs) { in fixupVariableFloatArgs()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 68 SmallVector<ISD::OutputArg, 4> Outs; in set() local
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| D | SelectionDAGBuilder.cpp | 1203 SmallVector<ISD::OutputArg, 8> Outs; in visitRet() local
6945 SmallVector<ISD::OutputArg, 4> Outs; in LowerCallTo() local
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 348 const SmallVectorImpl<ISD::OutputArg> &Outs, in getPrototype()
523 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1697 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 368 SmallVectorImpl<MachineInstr*> &Outs) { in elideCopiesAndPHIs()
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| D | ARMISelLowering.cpp | 1439 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1962 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
2104 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
2148 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| D | ARMFastISel.cpp | 2164 SmallVector<ISD::OutputArg, 4> Outs; in SelectRet() local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 804 SmallVector<ISD::OutputArg, 4> Outs; in X86SelectRet() local
1912 SmallVector<ISD::OutputArg, 4> Outs; in DoSelectCall() local
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| D | X86ISelLowering.cpp | 1784 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
1800 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
2043 callIsStructReturn(const SmallVectorImpl<ISD::OutputArg> &Outs) { in callIsStructReturn()
2500 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
3052 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2868 &Outs, in CalculateParameterAndLinkageAreaSize()
3521 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
3554 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_32SVR4()
3789 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_64SVR4()
4170 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall_Darwin()
4518 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
4529 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| D | PPCFastISel.cpp | 1511 SmallVector<ISD::OutputArg, 4> Outs; in SelectRet() local
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 244 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2306 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
2697 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn()
2708 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
3339 analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsSoftFloat, in analyzeReturn()
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1247 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
1323 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1633 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 775 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
929 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1970 SmallVector<ISD::OutputArg, 32> Outs; member
|