1 /*-
2  * Copyright (c) 2000, 2001 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *	$FreeBSD: stable/9/sys/dev/mly/mlyvar.h 251874 2013-06-18 00:36:53Z scottl $
28  */
29 
30 /********************************************************************************
31  ********************************************************************************
32                                                      Driver Parameter Definitions
33  ********************************************************************************
34  ********************************************************************************/
35 
36 /*
37  * The firmware interface allows for a 16-bit command identifier.  A lookup
38  * table this size (256k) would be too expensive, so we cap ourselves at a
39  * reasonable limit.
40  */
41 #define MLY_MAX_COMMANDS	256	/* max commands per controller */
42 
43 /*
44  * The firmware interface allows for a 16-bit s/g list length.  We limit
45  * ourselves to a reasonable maximum and ensure alignment.
46  */
47 #define MLY_MAX_SGENTRIES	64	/* max S/G entries, limit 65535 */
48 
49 /*
50  * The interval at which we poke the controller for status updates (in seconds).
51  */
52 #define MLY_PERIODIC_INTERVAL	1
53 
54 /********************************************************************************
55  ********************************************************************************
56                                                       Cross-version Compatibility
57  ********************************************************************************
58  ********************************************************************************/
59 
60 # include <sys/taskqueue.h>
61 
62 #ifndef INTR_ENTROPY
63 # define INTR_ENTROPY 0
64 #endif
65 
66 /********************************************************************************
67  ********************************************************************************
68                                                       Driver Variable Definitions
69  ********************************************************************************
70  ********************************************************************************/
71 
72 /*
73  * Debugging levels:
74  *  0 - quiet, only emit warnings
75  *  1 - noisy, emit major function points and things done
76  *  2 - extremely noisy, emit trace items in loops, etc.
77  */
78 #ifdef MLY_DEBUG
79 # define debug(level, fmt, args...)	do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
80 # define debug_called(level)		do { if (level <= MLY_DEBUG) printf("%s: called\n", __func__); } while(0)
81 # define debug_struct(s)		printf("  SIZE %s: %d\n", #s, sizeof(struct s))
82 # define debug_union(s)			printf("  SIZE %s: %d\n", #s, sizeof(union s))
83 # define debug_field(s, f)		printf("  OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
84 extern void		mly_printstate0(void);
85 extern struct mly_softc	*mly_softc0;
86 #else
87 # define debug(level, fmt, args...)
88 # define debug_called(level)
89 # define debug_struct(s)
90 #endif
91 
92 #define mly_printf(sc, fmt, args...)	device_printf(sc->mly_dev, fmt , ##args)
93 
94 /*
95  * Per-device structure, used to save persistent state on devices.
96  *
97  * Note that this isn't really Bus/Target/Lun since we don't support
98  * lun != 0 at this time.
99  */
100 struct mly_btl {
101     int			mb_flags;
102 #define MLY_BTL_PHYSICAL	(1<<0)		/* physical device */
103 #define MLY_BTL_LOGICAL		(1<<1)		/* logical device */
104 #define MLY_BTL_PROTECTED	(1<<2)		/* device is protected - I/O not allowed */
105 #define MLY_BTL_RESCAN		(1<<3)		/* device needs to be rescanned */
106     char		mb_name[16];		/* peripheral attached to this device */
107     int			mb_state;		/* see 8.1 */
108     int			mb_type;		/* see 8.2 */
109 
110     /* physical devices only */
111     int			mb_speed;		/* interface transfer rate */
112     int			mb_width;		/* interface width */
113 };
114 
115 /*
116  * Per-command control structure.
117  */
118 struct mly_command {
119     TAILQ_ENTRY(mly_command)	mc_link;	/* list linkage */
120 
121     struct mly_softc		*mc_sc;		/* controller that owns us */
122     u_int16_t			mc_slot;	/* command slot we occupy */
123     int				mc_flags;
124 #define MLY_CMD_BUSY		(1<<0)		/* command is being run, or ready to run, or not completed */
125 #define MLY_CMD_COMPLETE	(1<<1)		/* command has been completed */
126 #define MLY_CMD_MAPPED		(1<<3)		/* command has had its data mapped */
127 #define MLY_CMD_DATAIN		(1<<4)		/* data moves controller->system */
128 #define MLY_CMD_DATAOUT		(1<<5)		/* data moves system->controller */
129 #define MLY_CMD_CCB		(1<<6)		/* data is ccb. */
130     u_int16_t			mc_status;	/* command completion status */
131     u_int8_t			mc_sense;	/* sense data length */
132     int32_t			mc_resid;	/* I/O residual count */
133 
134     union mly_command_packet	*mc_packet;	/* our controller command */
135     u_int64_t			mc_packetphys;	/* physical address of the mapped packet */
136 
137     void			*mc_data;	/* data buffer */
138     size_t			mc_length;	/* data length */
139     bus_dmamap_t		mc_datamap;	/* DMA map for data */
140 
141     void	(* mc_complete)(struct mly_command *mc);	/* completion handler */
142     void	*mc_private;					/* caller-private data */
143 
144     int				mc_timestamp;
145 };
146 
147 /*
148  * Command slot regulation.
149  *
150  * We can't use slot 0 due to the memory mailbox implementation.
151  */
152 #define MLY_SLOT_START		1
153 #define MLY_SLOT_MAX		(MLY_SLOT_START + MLY_MAX_COMMANDS)
154 
155 /*
156  * Per-controller structure.
157  */
158 struct mly_softc {
159     /* bus connections */
160     device_t		mly_dev;
161     struct cdev *mly_dev_t;
162     struct resource	*mly_regs_resource;	/* register interface window */
163     int			mly_regs_rid;		/* resource ID */
164     bus_space_handle_t	mly_bhandle;		/* bus space handle */
165     bus_space_tag_t	mly_btag;		/* bus space tag */
166     bus_dma_tag_t	mly_parent_dmat;	/* parent DMA tag */
167     bus_dma_tag_t	mly_buffer_dmat;	/* data buffer/command DMA tag */
168     struct resource	*mly_irq;		/* interrupt */
169     int			mly_irq_rid;
170     void		*mly_intr;		/* interrupt handle */
171 
172     /* scatter/gather lists and their controller-visible mappings */
173     struct mly_sg_entry	*mly_sg_table;		/* s/g lists */
174     u_int32_t		mly_sg_busaddr;		/* s/g table base address in bus space */
175     bus_dma_tag_t	mly_sg_dmat;		/* s/g buffer DMA tag */
176     bus_dmamap_t	mly_sg_dmamap;		/* map for s/g buffers */
177 
178     /* controller hardware interface */
179     int			mly_hwif;
180 #define MLY_HWIF_I960RX		0
181 #define MLY_HWIF_STRONGARM	1
182     u_int8_t		mly_doorbell_true;	/* xor map to make hardware doorbell 'true' bits into 1s */
183     u_int8_t		mly_command_mailbox;	/* register offsets */
184     u_int8_t		mly_status_mailbox;
185     u_int8_t		mly_idbr;
186     u_int8_t		mly_odbr;
187     u_int8_t		mly_error_status;
188     u_int8_t		mly_interrupt_status;
189     u_int8_t		mly_interrupt_mask;
190     struct mly_mmbox	*mly_mmbox;			/* kernel-space address of memory mailbox */
191     u_int64_t		mly_mmbox_busaddr;		/* bus-space address of memory mailbox */
192     bus_dma_tag_t	mly_mmbox_dmat;			/* memory mailbox DMA tag */
193     bus_dmamap_t	mly_mmbox_dmamap;		/* memory mailbox DMA map */
194     u_int32_t		mly_mmbox_command_index;	/* next index to use */
195     u_int32_t		mly_mmbox_status_index;		/* index we next expect status at */
196 
197     /* controller features, limits and status */
198     int			mly_state;
199 #define	MLY_STATE_OPEN		(1<<1)
200 #define MLY_STATE_INTERRUPTS_ON	(1<<2)
201 #define MLY_STATE_MMBOX_ACTIVE	(1<<3)
202 #define MLY_STATE_CAM_FROZEN	(1<<4)
203     struct mly_ioctl_getcontrollerinfo	*mly_controllerinfo;
204     struct mly_param_controller		*mly_controllerparam;
205     struct mly_btl			mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
206 
207     /* command management */
208     struct mly_command		mly_command[MLY_MAX_COMMANDS];	/* commands */
209     union mly_command_packet	*mly_packet;		/* command packets */
210     bus_dma_tag_t		mly_packet_dmat;	/* packet DMA tag */
211     bus_dmamap_t		mly_packetmap;		/* packet DMA map */
212     u_int64_t			mly_packetphys;		/* packet array base address */
213     TAILQ_HEAD(,mly_command)	mly_free;		/* commands available for reuse */
214     TAILQ_HEAD(,mly_command)	mly_busy;
215     TAILQ_HEAD(,mly_command)	mly_complete;		/* commands which have been returned by the controller */
216     struct mly_qstat		mly_qstat[MLYQ_COUNT];	/* queue statistics */
217 
218     /* health monitoring */
219     u_int32_t			mly_event_change;	/* event status change indicator */
220     u_int32_t			mly_event_counter;	/* next event for which we anticpiate status */
221     u_int32_t			mly_event_waiting;	/* next event the controller will post status for */
222     struct callout_handle	mly_periodic;		/* periodic event handling */
223 
224     /* CAM connection */
225     struct cam_devq		*mly_cam_devq;			/* CAM device queue */
226     struct cam_sim		*mly_cam_sim[MLY_MAX_CHANNELS];	/* CAM SIMs */
227     struct cam_path		*mly_cam_path;			/* rescan path */
228     int				mly_cam_channels;		/* total channel count */
229 
230     /* command-completion task */
231     struct task			mly_task_complete;	/* deferred-completion task */
232     int				mly_qfrzn_cnt;		/* Track simq freezes */
233 };
234 
235 /*
236  * Register access helpers.
237  */
238 #define MLY_SET_REG(sc, reg, val)	bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val)
239 #define MLY_GET_REG(sc, reg)		bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg)
240 #define MLY_GET_REG2(sc, reg)		bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg)
241 #define MLY_GET_REG4(sc, reg)		bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg)
242 
243 #define MLY_SET_MBOX(sc, mbox, ptr)									\
244 	do {												\
245 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox,      *((u_int32_t *)ptr));		\
246 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  4, *((u_int32_t *)ptr + 1));	\
247 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  8, *((u_int32_t *)ptr + 2));	\
248 	    bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3));	\
249 	} while(0);
250 #define MLY_GET_MBOX(sc, mbox, ptr)									\
251 	do {												\
252 	    *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox);		\
253 	    *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4);	\
254 	    *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8);	\
255 	    *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12);	\
256 	} while(0);
257 
258 #define MLY_IDBR_TRUE(sc, mask)								\
259 	((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
260 #define MLY_ODBR_TRUE(sc, mask)								\
261 	((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
262 #define MLY_ERROR_VALID(sc)								\
263 	((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
264 
265 #define MLY_MASK_INTERRUPTS(sc)								\
266 	do {										\
267 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);	\
268 	    sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON;					\
269 	} while(0);
270 #define MLY_UNMASK_INTERRUPTS(sc)							\
271 	do {										\
272 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);	\
273 	    sc->mly_state |= MLY_STATE_INTERRUPTS_ON;					\
274 	} while(0);
275 
276 /*
277  * Bus/target/logical ID-related macros.
278  */
279 #define MLY_LOGDEV_ID(sc, bus, target)	(((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
280 					 MLY_MAX_TARGETS + (target))
281 #define MLY_LOGDEV_BUS(sc, logdev)	(((logdev) / MLY_MAX_TARGETS) + \
282 					 (sc)->mly_controllerinfo->physical_channels_present)
283 #define MLY_LOGDEV_TARGET(sc, logdev)	((logdev) % MLY_MAX_TARGETS)
284 #define MLY_BUS_IS_VIRTUAL(sc, bus)	((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
285 #define MLY_BUS_IS_VALID(sc, bus)	(((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
286 
287 /********************************************************************************
288  * Queue primitives
289  */
290 
291 #define MLYQ_ADD(sc, qname)					\
292 	do {							\
293 	    struct mly_qstat *qs = &(sc)->mly_qstat[qname];	\
294 								\
295 	    qs->q_length++;					\
296 	    if (qs->q_length > qs->q_max)			\
297 		qs->q_max = qs->q_length;			\
298 	} while(0)
299 
300 #define MLYQ_REMOVE(sc, qname)    (sc)->mly_qstat[qname].q_length--
301 #define MLYQ_INIT(sc, qname)			\
302 	do {					\
303 	    sc->mly_qstat[qname].q_length = 0;	\
304 	    sc->mly_qstat[qname].q_max = 0;	\
305 	} while(0)
306 
307 
308 #define MLYQ_COMMAND_QUEUE(name, index)					\
309 static __inline void							\
310 mly_initq_ ## name (struct mly_softc *sc)				\
311 {									\
312     TAILQ_INIT(&sc->mly_ ## name);					\
313     MLYQ_INIT(sc, index);						\
314 }									\
315 static __inline void							\
316 mly_enqueue_ ## name (struct mly_command *mc)				\
317 {									\
318     int		s;							\
319 									\
320     s = splcam();							\
321     TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
322     MLYQ_ADD(mc->mc_sc, index);						\
323     splx(s);								\
324 }									\
325 static __inline void							\
326 mly_requeue_ ## name (struct mly_command *mc)				\
327 {									\
328     int		s;							\
329 									\
330     s = splcam();							\
331     TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
332     MLYQ_ADD(mc->mc_sc, index);						\
333     splx(s);								\
334 }									\
335 static __inline struct mly_command *					\
336 mly_dequeue_ ## name (struct mly_softc *sc)				\
337 {									\
338     struct mly_command	*mc;						\
339     int			s;						\
340 									\
341     s = splcam();							\
342     if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) {		\
343 	TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link);			\
344 	MLYQ_REMOVE(sc, index);						\
345     }									\
346     splx(s);								\
347     return(mc);								\
348 }									\
349 static __inline void							\
350 mly_remove_ ## name (struct mly_command *mc)				\
351 {									\
352     int			s;						\
353 									\
354     s = splcam();							\
355     TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
356     MLYQ_REMOVE(mc->mc_sc, index);					\
357     splx(s);								\
358 }									\
359 struct hack
360 
361 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
362 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
363 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
364 
365 /********************************************************************************
366  * space-fill a character string
367  */
368 static __inline void
padstr(char * targ,char * src,int len)369 padstr(char *targ, char *src, int len)
370 {
371     while (len-- > 0) {
372 	if (*src != 0) {
373 	    *targ++ = *src++;
374 	} else {
375 	    *targ++ = ' ';
376 	}
377     }
378 }
379