1 /******************************************************************************
2
3 Copyright (c) 2001-2015, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD$*/
34
35
36 #ifndef _IXGBE_H_
37 #define _IXGBE_H_
38
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
44 #endif
45 #include <sys/mbuf.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
52
53 #include <net/if.h>
54 #include <net/if_arp.h>
55 #include <net/bpf.h>
56 #include <net/ethernet.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
59
60 #include <net/bpf.h>
61 #include <net/if_types.h>
62 #include <net/if_vlan_var.h>
63
64 #include <netinet/in_systm.h>
65 #include <netinet/in.h>
66 #include <netinet/if_ether.h>
67 #include <netinet/ip.h>
68 #include <netinet/ip6.h>
69 #include <netinet/tcp.h>
70 #include <netinet/tcp_lro.h>
71 #include <netinet/udp.h>
72
73 #include <machine/in_cksum.h>
74
75 #include <sys/bus.h>
76 #include <machine/bus.h>
77 #include <sys/rman.h>
78 #include <machine/resource.h>
79 #include <vm/vm.h>
80 #include <vm/pmap.h>
81 #include <machine/clock.h>
82 #include <dev/pci/pcivar.h>
83 #include <dev/pci/pcireg.h>
84 #include <sys/proc.h>
85 #include <sys/sysctl.h>
86 #include <sys/endian.h>
87 #include <sys/taskqueue.h>
88 #include <sys/pcpu.h>
89 #include <sys/smp.h>
90 #include <machine/smp.h>
91 #include <sys/sbuf.h>
92
93 #include "ixgbe_api.h"
94 #include "ixgbe_common.h"
95 #include "ixgbe_phy.h"
96 #include "ixgbe_vf.h"
97
98 /* Tunables */
99
100 /*
101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
102 * number of transmit descriptors allocated by the driver. Increasing this
103 * value allows the driver to queue more transmits. Each descriptor is 16
104 * bytes. Performance tests have show the 2K value to be optimal for top
105 * performance.
106 */
107 #define DEFAULT_TXD 1024
108 #define PERFORM_TXD 2048
109 #define MAX_TXD 4096
110 #define MIN_TXD 64
111
112 /*
113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
114 * number of receive descriptors allocated for each RX queue. Increasing this
115 * value allows the driver to buffer more incoming packets. Each descriptor
116 * is 16 bytes. A receive buffer is also allocated for each descriptor.
117 *
118 * Note: with 8 rings and a dual port card, it is possible to bump up
119 * against the system mbuf pool limit, you can tune nmbclusters
120 * to adjust for this.
121 */
122 #define DEFAULT_RXD 1024
123 #define PERFORM_RXD 2048
124 #define MAX_RXD 4096
125 #define MIN_RXD 64
126
127 /* Alignment for rings */
128 #define DBA_ALIGN 128
129
130 /*
131 * This parameter controls the maximum no of times the driver will loop in
132 * the isr. Minimum Value = 1
133 */
134 #define MAX_LOOP 10
135
136 /*
137 * This is the max watchdog interval, ie. the time that can
138 * pass between any two TX clean operations, such only happening
139 * when the TX hardware is functioning.
140 */
141 #define IXGBE_WATCHDOG (10 * hz)
142
143 /*
144 * This parameters control when the driver calls the routine to reclaim
145 * transmit descriptors.
146 */
147 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
148 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
149
150 /* These defines are used in MTU calculations */
151 #define IXGBE_MAX_FRAME_SIZE 9728
152 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN + \
153 ETHER_VLAN_ENCAP_LEN)
154 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
155
156 /* Flow control constants */
157 #define IXGBE_FC_PAUSE 0xFFFF
158 #define IXGBE_FC_HI 0x20000
159 #define IXGBE_FC_LO 0x10000
160
161 /*
162 * Used for optimizing small rx mbufs. Effort is made to keep the copy
163 * small and aligned for the CPU L1 cache.
164 *
165 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
166 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
167 * wasted. Getting 64 byte alignment, which _should_ be ideal for
168 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
169 * in observed efficiency of the optimization, 97.9% -> 81.8%.
170 */
171 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
172 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
173 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
174
175 /* Keep older OS drivers building... */
176 #if !defined(SYSCTL_ADD_UQUAD)
177 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
178 #endif
179
180 /* Defines for printing debug information */
181 #define DEBUG_INIT 0
182 #define DEBUG_IOCTL 0
183 #define DEBUG_HW 0
184
185 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
186 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
187 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
188 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
189 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
190 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
191 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
192 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
193 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
194
195 #define MAX_NUM_MULTICAST_ADDRESSES 128
196 #define IXGBE_82598_SCATTER 100
197 #define IXGBE_82599_SCATTER 32
198 #define MSIX_82598_BAR 3
199 #define MSIX_82599_BAR 4
200 #define IXGBE_TSO_SIZE 262140
201 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
202 #define IXGBE_RX_HDR 128
203 #define IXGBE_VFTA_SIZE 128
204 #define IXGBE_BR_SIZE 4096
205 #define IXGBE_QUEUE_MIN_FREE 32
206 #define IXGBE_MAX_TX_BUSY 10
207 #define IXGBE_QUEUE_HUNG 0x80000000
208
209 #define IXV_EITR_DEFAULT 128
210
211 /* Offload bits in mbuf flag */
212 #if __FreeBSD_version >= 800000
213 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
214 #else
215 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
216 #endif
217
218 /* Backward compatibility items for very old versions */
219 #ifndef pci_find_cap
220 #define pci_find_cap pci_find_extcap
221 #endif
222
223 #ifndef DEVMETHOD_END
224 #define DEVMETHOD_END { NULL, NULL }
225 #endif
226
227 /*
228 * Interrupt Moderation parameters
229 */
230 #define IXGBE_LOW_LATENCY 128
231 #define IXGBE_AVE_LATENCY 400
232 #define IXGBE_BULK_LATENCY 1200
233 #define IXGBE_LINK_ITR 2000
234
235 /* MAC type macros */
236 #define IXGBE_IS_X550VF(_adapter) \
237 ((_adapter->hw.mac.type == ixgbe_mac_X550_vf) || \
238 (_adapter->hw.mac.type == ixgbe_mac_X550EM_x_vf))
239
240 #define IXGBE_IS_VF(_adapter) \
241 (IXGBE_IS_X550VF(_adapter) || \
242 (_adapter->hw.mac.type == ixgbe_mac_X540_vf) || \
243 (_adapter->hw.mac.type == ixgbe_mac_82599_vf))
244
245
246 /*
247 *****************************************************************************
248 * vendor_info_array
249 *
250 * This array contains the list of Subvendor/Subdevice IDs on which the driver
251 * should load.
252 *
253 *****************************************************************************
254 */
255 typedef struct _ixgbe_vendor_info_t {
256 unsigned int vendor_id;
257 unsigned int device_id;
258 unsigned int subvendor_id;
259 unsigned int subdevice_id;
260 unsigned int index;
261 } ixgbe_vendor_info_t;
262
263
264 /* This is used to get SFP+ module data */
265 struct ixgbe_i2c_req {
266 u8 dev_addr;
267 u8 offset;
268 u8 len;
269 u8 data[8];
270 };
271
272 struct ixgbe_tx_buf {
273 union ixgbe_adv_tx_desc *eop;
274 struct mbuf *m_head;
275 bus_dmamap_t map;
276 };
277
278 struct ixgbe_rx_buf {
279 struct mbuf *buf;
280 struct mbuf *fmp;
281 bus_dmamap_t pmap;
282 u_int flags;
283 #define IXGBE_RX_COPY 0x01
284 uint64_t addr;
285 };
286
287 /*
288 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
289 */
290 struct ixgbe_dma_alloc {
291 bus_addr_t dma_paddr;
292 caddr_t dma_vaddr;
293 bus_dma_tag_t dma_tag;
294 bus_dmamap_t dma_map;
295 bus_dma_segment_t dma_seg;
296 bus_size_t dma_size;
297 int dma_nseg;
298 };
299
300 /*
301 ** Driver queue struct: this is the interrupt container
302 ** for the associated tx and rx ring.
303 */
304 struct ix_queue {
305 struct adapter *adapter;
306 u32 msix; /* This queue's MSIX vector */
307 u32 eims; /* This queue's EIMS bit */
308 u32 eitr_setting;
309 u32 me;
310 struct resource *res;
311 void *tag;
312 int busy;
313 struct tx_ring *txr;
314 struct rx_ring *rxr;
315 struct task que_task;
316 struct taskqueue *tq;
317 u64 irqs;
318 };
319
320 /*
321 * The transmit ring, one per queue
322 */
323 struct tx_ring {
324 struct adapter *adapter;
325 struct mtx tx_mtx;
326 u32 me;
327 u32 tail;
328 int busy;
329 union ixgbe_adv_tx_desc *tx_base;
330 struct ixgbe_tx_buf *tx_buffers;
331 struct ixgbe_dma_alloc txdma;
332 volatile u16 tx_avail;
333 u16 next_avail_desc;
334 u16 next_to_clean;
335 u16 process_limit;
336 u16 num_desc;
337 u32 txd_cmd;
338 bus_dma_tag_t txtag;
339 char mtx_name[16];
340 #ifndef IXGBE_LEGACY_TX
341 struct buf_ring *br;
342 struct task txq_task;
343 #endif
344 #ifdef IXGBE_FDIR
345 u16 atr_sample;
346 u16 atr_count;
347 #endif
348 u32 bytes; /* used for AIM */
349 u32 packets;
350 /* Soft Stats */
351 unsigned long tso_tx;
352 unsigned long no_tx_map_avail;
353 unsigned long no_tx_dma_setup;
354 u64 no_desc_avail;
355 u64 total_packets;
356 };
357
358
359 /*
360 * The Receive ring, one per rx queue
361 */
362 struct rx_ring {
363 struct adapter *adapter;
364 struct mtx rx_mtx;
365 u32 me;
366 u32 tail;
367 union ixgbe_adv_rx_desc *rx_base;
368 struct ixgbe_dma_alloc rxdma;
369 struct lro_ctrl lro;
370 bool lro_enabled;
371 bool hw_rsc;
372 bool vtag_strip;
373 u16 next_to_refresh;
374 u16 next_to_check;
375 u16 num_desc;
376 u16 mbuf_sz;
377 u16 process_limit;
378 char mtx_name[16];
379 struct ixgbe_rx_buf *rx_buffers;
380 bus_dma_tag_t ptag;
381
382 u32 bytes; /* Used for AIM calc */
383 u32 packets;
384
385 /* Soft stats */
386 u64 rx_irq;
387 u64 rx_copies;
388 u64 rx_packets;
389 u64 rx_bytes;
390 u64 rx_discarded;
391 u64 rsc_num;
392 #ifdef IXGBE_FDIR
393 u64 flm;
394 #endif
395 };
396
397 /* Our adapter structure */
398 struct adapter {
399 struct ifnet *ifp;
400 struct ixgbe_hw hw;
401
402 struct ixgbe_osdep osdep;
403 struct device *dev;
404
405 struct resource *pci_mem;
406 struct resource *msix_mem;
407
408 /*
409 * Interrupt resources: this set is
410 * either used for legacy, or for Link
411 * when doing MSIX
412 */
413 void *tag;
414 struct resource *res;
415
416 struct ifmedia media;
417 struct callout timer;
418 int msix;
419 int if_flags;
420
421 struct mtx core_mtx;
422
423 eventhandler_tag vlan_attach;
424 eventhandler_tag vlan_detach;
425
426 u16 num_vlans;
427 u16 num_queues;
428
429 /*
430 ** Shadow VFTA table, this is needed because
431 ** the real vlan filter table gets cleared during
432 ** a soft reset and the driver needs to be able
433 ** to repopulate it.
434 */
435 u32 shadow_vfta[IXGBE_VFTA_SIZE];
436
437 /* Info about the interface */
438 u32 optics;
439 u32 fc; /* local flow ctrl setting */
440 int advertise; /* link speeds */
441 bool link_active;
442 u16 max_frame_size;
443 u16 num_segs;
444 u32 link_speed;
445 bool link_up;
446 u32 vector;
447 u16 dmac;
448 bool eee_support;
449 bool eee_enabled;
450
451 /* Power management-related */
452 bool wol_support;
453 u32 wufc;
454
455 /* Mbuf cluster size */
456 u32 rx_mbuf_sz;
457
458 /* Support for pluggable optics */
459 bool sfp_probe;
460 struct task link_task; /* Link tasklet */
461 struct task mod_task; /* SFP tasklet */
462 struct task msf_task; /* Multispeed Fiber */
463 #ifdef IXGBE_FDIR
464 int fdir_reinit;
465 struct task fdir_task;
466 #endif
467 struct task phy_task; /* PHY intr tasklet */
468 struct taskqueue *tq;
469
470 /*
471 ** Queues:
472 ** This is the irq holder, it has
473 ** and RX/TX pair or rings associated
474 ** with it.
475 */
476 struct ix_queue *queues;
477
478 /*
479 * Transmit rings:
480 * Allocated at run time, an array of rings.
481 */
482 struct tx_ring *tx_rings;
483 u32 num_tx_desc;
484
485 /*
486 * Receive rings:
487 * Allocated at run time, an array of rings.
488 */
489 struct rx_ring *rx_rings;
490 u64 active_queues;
491 u32 num_rx_desc;
492
493 /* Multicast array memory */
494 u8 *mta;
495
496
497 /* Misc stats maintained by the driver */
498 unsigned long dropped_pkts;
499 unsigned long mbuf_defrag_failed;
500 unsigned long mbuf_header_failed;
501 unsigned long mbuf_packet_failed;
502 unsigned long watchdog_events;
503 unsigned long link_irq;
504 union {
505 struct ixgbe_hw_stats pf;
506 struct ixgbevf_hw_stats vf;
507 } stats;
508 #if __FreeBSD_version >= 1100036
509 /* counter(9) stats */
510 u64 ipackets;
511 u64 ierrors;
512 u64 opackets;
513 u64 oerrors;
514 u64 ibytes;
515 u64 obytes;
516 u64 imcasts;
517 u64 omcasts;
518 u64 iqdrops;
519 u64 noproto;
520 #endif
521 };
522
523
524 /* Precision Time Sync (IEEE 1588) defines */
525 #define ETHERTYPE_IEEE1588 0x88F7
526 #define PICOSECS_PER_TICK 20833
527 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
528 #define IXGBE_ADVTXD_TSTAMP 0x00080000
529
530
531 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
532 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
533 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
534 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
535 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
536 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
537 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
538 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
539 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
540 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
541 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
542 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
543 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
544 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
545
546 /* For backward compatibility */
547 #if !defined(PCIER_LINK_STA)
548 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
549 #endif
550
551 /* Stats macros */
552 #if __FreeBSD_version >= 1100036
553 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
554 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
555 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
556 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
557 #define IXGBE_SET_COLLISIONS(sc, count)
558 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
559 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
560 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
561 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
562 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
563 #else
564 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count)
565 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count)
566 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count)
567 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count)
568 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count)
569 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count)
570 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count)
571 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count)
572 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count)
573 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count)
574 #endif
575
576 /* External PHY register addresses */
577 #define IXGBE_PHY_CURRENT_TEMP 0xC820
578 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
579
580 /* Sysctl help messages; displayed with sysctl -d */
581 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
582 "\nControl advertised link speed using these flags:\n" \
583 "\t0x1 - advertise 100M\n" \
584 "\t0x2 - advertise 1G\n" \
585 "\t0x4 - advertise 10G\n\n" \
586 "\t100M is only supported on certain 10GBaseT adapters.\n"
587
588 #define IXGBE_SYSCTL_DESC_SET_FC \
589 "\nSet flow control mode using these values:\n" \
590 "\t0 - off\n" \
591 "\t1 - rx pause\n" \
592 "\t2 - tx pause\n" \
593 "\t3 - tx and rx pause"
594
595 static inline bool
ixgbe_is_sfp(struct ixgbe_hw * hw)596 ixgbe_is_sfp(struct ixgbe_hw *hw)
597 {
598 switch (hw->phy.type) {
599 case ixgbe_phy_sfp_avago:
600 case ixgbe_phy_sfp_ftl:
601 case ixgbe_phy_sfp_intel:
602 case ixgbe_phy_sfp_unknown:
603 case ixgbe_phy_sfp_passive_tyco:
604 case ixgbe_phy_sfp_passive_unknown:
605 case ixgbe_phy_qsfp_passive_unknown:
606 case ixgbe_phy_qsfp_active_unknown:
607 case ixgbe_phy_qsfp_intel:
608 case ixgbe_phy_qsfp_unknown:
609 return TRUE;
610 default:
611 return FALSE;
612 }
613 }
614
615 /* Workaround to make 8.0 buildable */
616 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
617 static __inline int
drbr_needs_enqueue(struct ifnet * ifp,struct buf_ring * br)618 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
619 {
620 #ifdef ALTQ
621 if (ALTQ_IS_ENABLED(&ifp->if_snd))
622 return (1);
623 #endif
624 return (!buf_ring_empty(br));
625 }
626 #endif
627
628 /*
629 ** Find the number of unrefreshed RX descriptors
630 */
631 static inline u16
ixgbe_rx_unrefreshed(struct rx_ring * rxr)632 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
633 {
634 if (rxr->next_to_check > rxr->next_to_refresh)
635 return (rxr->next_to_check - rxr->next_to_refresh - 1);
636 else
637 return ((rxr->num_desc + rxr->next_to_check) -
638 rxr->next_to_refresh - 1);
639 }
640
641 /*
642 ** This checks for a zero mac addr, something that will be likely
643 ** unless the Admin on the Host has created one.
644 */
645 static inline bool
ixv_check_ether_addr(u8 * addr)646 ixv_check_ether_addr(u8 *addr)
647 {
648 bool status = TRUE;
649
650 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
651 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
652 status = FALSE;
653 return (status);
654 }
655
656 /* Shared Prototypes */
657
658 #ifdef IXGBE_LEGACY_TX
659 void ixgbe_start(struct ifnet *);
660 void ixgbe_start_locked(struct tx_ring *, struct ifnet *);
661 #else /* ! IXGBE_LEGACY_TX */
662 int ixgbe_mq_start(struct ifnet *, struct mbuf *);
663 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
664 void ixgbe_qflush(struct ifnet *);
665 void ixgbe_deferred_mq_start(void *, int);
666 #endif /* IXGBE_LEGACY_TX */
667
668 int ixgbe_allocate_queues(struct adapter *);
669 int ixgbe_allocate_transmit_buffers(struct tx_ring *);
670 int ixgbe_setup_transmit_structures(struct adapter *);
671 void ixgbe_free_transmit_structures(struct adapter *);
672 int ixgbe_allocate_receive_buffers(struct rx_ring *);
673 int ixgbe_setup_receive_structures(struct adapter *);
674 void ixgbe_free_receive_structures(struct adapter *);
675 void ixgbe_txeof(struct tx_ring *);
676 bool ixgbe_rxeof(struct ix_queue *);
677
678 int ixgbe_dma_malloc(struct adapter *,
679 bus_size_t, struct ixgbe_dma_alloc *, int);
680 void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
681 #endif /* _IXGBE_H_ */
682