1 /* $OpenBSD: pssreg.h,v 1.2 1997/11/07 08:07:09 niklas Exp $ */ 2 /* $NetBSD: pssreg.h,v 1.2 1995/05/08 22:02:09 brezak Exp $ */ 3 4 /* 5 * Copyright (c) 1994 John Brezak 6 * Copyright (c) 1991-1993 Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the Computer Systems 20 * Engineering Group at Lawrence Berkeley Laboratory. 21 * 4. Neither the name of the University nor of the Laboratory may be used 22 * to endorse or promote products derived from this software without 23 * specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 */ 38 /* 39 * Copyright (c) 1993 Analog Devices Inc. All rights reserved 40 */ 41 42 /* 43 * Macros to detect valid hardware configuration data. 44 */ 45 #define PSS_BASE_VALID(base) ((base) == 0x220 || (base) == 0x240) 46 47 /* 48 * ESC614 Interface chip 49 */ 50 #define ADDR_MASK 0x003f 51 52 #define INT_MASK 0xffc7 53 #define INT_3_BITS 0x0008 54 #define INT_5_BITS 0x0010 55 #define INT_7_BITS 0x0018 56 #define INT_9_BITS 0x0020 57 #define INT_10_BITS 0x0028 58 #define INT_11_BITS 0x0030 59 #define INT_12_BITS 0x0038 60 61 #define INT_TEST_BIT 0x0200 62 #define INT_TEST_PASS 0x0100 63 #define INT_TEST_BIT_MASK 0xFDFF 64 65 #define DMA_MASK 0xfff8 66 #define DMA_0_BITS 0x0001 67 #define DMA_1_BITS 0x0002 68 #define DMA_3_BITS 0x0003 69 #define DMA_5_BITS 0x0004 70 #define DMA_6_BITS 0x0005 71 #define DMA_7_BITS 0x0006 72 73 #define DMA_TEST_BIT 0x0080 74 #define DMA_TEST_PASS 0x0040 75 #define DMA_TEST_BIT_MASK 0xFF7F 76 77 /* Echo DSP Flags */ 78 #define DSP_FLAG3 0x10 79 #define DSP_FLAG2 0x08 80 #define DSP_FLAG1 0x80 81 #define DSP_FLAG0 0x40 82 83 /* ESC614 register offsets */ 84 #define PSS_NPORT 32 85 86 #define PSS_DATA 0x00 87 #define PSS_STATUS 0x02 88 #define PSS_CONTROL 0x02 89 #define PSS_ID_VERS 0x04 90 #define PSS_IRQ_ACK 0x04 91 92 #define PSS_CONFIG 0x10 93 #define PSS_WSS_CONFIG 0x12 94 #define SB_CONFIG 0x14 95 #define CD_CONFIG 0x16 96 #define MIDI_CONFIG 0x18 97 #define UART_CONFIG 0x1a 98 99 /* PSS control register */ 100 #define PSS_WEIE 0x8000 101 #define PSS_RFIE 0x4000 102 #define PSS_RESET 0x2000 103 #define PSS_FLAG1 0x1000 104 #define PSS_FLAG0 0x0800 105 106 /* PSS status register */ 107 #define PSS_WRITE_EMPTY 0x8000 108 #define PSS_READ_FULL 0x4000 109 #define PSS_IRQ 0x2000 110 #define PSS_DMQ_TC 0x1000 111 #define PSS_FLAG3 0x0800 112 #define PSS_FLAG2 0x0400 113 114 /* Game control register */ 115 #define GAME_BIT 0x0400 116 #define GAME_BIT_MASK 0xfbff 117 118 /* MPU registers */ 119 #define MIDI_NPORT 8 120 121 #define MIDI_DATA_REG 0x00 122 #define MIDI_STATUS_REG 0x01 123 #define MIDI_COMMAND_REG 0x01 124 125 #define MIDI_SR_RF 0x80 126 #define MIDI_SR_TE 0x40 127 128 /* CD Interface registers */ 129 #define CD_NPORT 16 130 131 #define CD_POL_MASK 0xFFBF 132 #define CD_POL_BIT 0x0040 133 134 /* Phillips amplifier controls: only via DSP */ 135 /* DSP commands */ 136 #define SET_MASTER_COMMAND 0x0010 137 #define MASTER_VOLUME_LEFT 0x0000 138 #define MASTER_VOLUME_RIGHT 0x0100 139 #define MASTER_BASS 0x0200 140 #define MASTER_TREBLE 0x0300 141 #define MASTER_SWITCH 0x0800 142 143 #define PSS_STEREO 0x00ce 144 #define PSS_PSEUDO 0x00d6 145 #define PSS_SPATIAL 0x00de 146 #define PSS_MONO 0x00c6 147 148 #define PHILLIPS_VOL_MIN -64 149 #define PHILLIPS_VOL_MAX 6 150 #define PHILLIPS_VOL_DELTA 70 151 #define PHILLIPS_VOL_INITIAL -20 152 #define PHILLIPS_VOL_CONSTANT 252 153 #define PHILLIPS_VOL_STEP 2 154 #define PHILLIPS_BASS_MIN -12 155 #define PHILLIPS_BASS_MAX 15 156 #define PHILLIPS_BASS_DELTA 27 157 #define PHILLIPS_BASS_INITIAL 0 158 #define PHILLIPS_BASS_CONSTANT 246 159 #define PHILLIPS_BASS_STEP 2 160 #define PHILLIPS_TREBLE_MIN -12 161 #define PHILLIPS_TREBLE_MAX 12 162 #define PHILLIPS_TREBLE_DELTA 24 163 #define PHILLIPS_TREBLE_INITIAL 0 164 #define PHILLIPS_TREBLE_CONSTANT 246 165 #define PHILLIPS_TREBLE_STEP 2 166