1 /*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 *
25 * $FreeBSD$
26 */
27
28 #ifndef DRM_INTEL_DRV_H
29 #define DRM_INTEL_DRV_H
30
31 #include <dev/drm2/i915/i915_drm.h>
32 #include <dev/drm2/i915/i915_drv.h>
33 #include <dev/drm2/drm_crtc.h>
34 #include <dev/drm2/drm_crtc_helper.h>
35 #include <dev/drm2/drm_fb_helper.h>
36
37 #define _intel_wait_for(DEV, COND, MS, W, WMSG) \
38 ({ \
39 int end, ret; \
40 \
41 end = ticks + (MS) * hz / 1000; \
42 ret = 0; \
43 \
44 while (!(COND)) { \
45 if (time_after(ticks, end)) { \
46 ret = -ETIMEDOUT; \
47 break; \
48 } \
49 if (W) \
50 pause((WMSG), 1); \
51 else \
52 DELAY(1000); \
53 } \
54 \
55 ret; \
56 })
57
58 #define wait_for_atomic_us(COND, US) ({ \
59 int i, ret__ = -ETIMEDOUT; \
60 for (i = 0; i < (US); i++) { \
61 if ((COND)) { \
62 ret__ = 0; \
63 break; \
64 } \
65 DELAY(1); \
66 } \
67 ret__; \
68 })
69
70 #define wait_for(COND, MS) _intel_wait_for(NULL, COND, MS, 1, "915wfi")
71 #define wait_for_atomic(COND, MS) _intel_wait_for(NULL, COND, MS, 0, "915wfa")
72
73 #define KHz(x) (1000*x)
74 #define MHz(x) KHz(1000*x)
75
76 /* store information about an Ixxx DVO */
77 /* The i830->i865 use multiple DVOs with multiple i2cs */
78 /* the i915, i945 have a single sDVO i2c bus - which is different */
79 #define MAX_OUTPUTS 6
80 /* maximum connectors per crtcs in the mode set */
81 #define INTELFB_CONN_LIMIT 4
82
83 #define INTEL_I2C_BUS_DVO 1
84 #define INTEL_I2C_BUS_SDVO 2
85
86 /* these are outputs from the chip - integrated only
87 external chips are via DVO or SDVO output */
88 #define INTEL_OUTPUT_UNUSED 0
89 #define INTEL_OUTPUT_ANALOG 1
90 #define INTEL_OUTPUT_DVO 2
91 #define INTEL_OUTPUT_SDVO 3
92 #define INTEL_OUTPUT_LVDS 4
93 #define INTEL_OUTPUT_TVOUT 5
94 #define INTEL_OUTPUT_HDMI 6
95 #define INTEL_OUTPUT_DISPLAYPORT 7
96 #define INTEL_OUTPUT_EDP 8
97
98 /* Intel Pipe Clone Bit */
99 #define INTEL_HDMIB_CLONE_BIT 1
100 #define INTEL_HDMIC_CLONE_BIT 2
101 #define INTEL_HDMID_CLONE_BIT 3
102 #define INTEL_HDMIE_CLONE_BIT 4
103 #define INTEL_HDMIF_CLONE_BIT 5
104 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
105 #define INTEL_SDVO_TV_CLONE_BIT 7
106 #define INTEL_SDVO_LVDS_CLONE_BIT 8
107 #define INTEL_ANALOG_CLONE_BIT 9
108 #define INTEL_TV_CLONE_BIT 10
109 #define INTEL_DP_B_CLONE_BIT 11
110 #define INTEL_DP_C_CLONE_BIT 12
111 #define INTEL_DP_D_CLONE_BIT 13
112 #define INTEL_LVDS_CLONE_BIT 14
113 #define INTEL_DVO_TMDS_CLONE_BIT 15
114 #define INTEL_DVO_LVDS_CLONE_BIT 16
115 #define INTEL_EDP_CLONE_BIT 17
116
117 #define INTEL_DVO_CHIP_NONE 0
118 #define INTEL_DVO_CHIP_LVDS 1
119 #define INTEL_DVO_CHIP_TMDS 2
120 #define INTEL_DVO_CHIP_TVOUT 4
121
122 /* drm_display_mode->private_flags */
123 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
124 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
125 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
126 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
127 * timings in the mode to prevent the crtc fixup from overwriting them.
128 * Currently only lvds needs that. */
129 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
130
131 static inline void
intel_mode_set_pixel_multiplier(struct drm_display_mode * mode,int multiplier)132 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
133 int multiplier)
134 {
135 mode->clock *= multiplier;
136 mode->private_flags |= multiplier;
137 }
138
139 static inline int
intel_mode_get_pixel_multiplier(const struct drm_display_mode * mode)140 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
141 {
142 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
143 }
144
145 struct intel_framebuffer {
146 struct drm_framebuffer base;
147 struct drm_i915_gem_object *obj;
148 };
149
150 struct intel_fbdev {
151 struct drm_fb_helper helper;
152 struct intel_framebuffer ifb;
153 struct list_head fbdev_list;
154 struct drm_display_mode *our_mode;
155 };
156
157 struct intel_encoder {
158 struct drm_encoder base;
159 int type;
160 bool needs_tv_clock;
161 void (*hot_plug)(struct intel_encoder *);
162 int crtc_mask;
163 int clone_mask;
164 };
165
166 struct intel_connector {
167 struct drm_connector base;
168 struct intel_encoder *encoder;
169 };
170
171 struct intel_crtc {
172 struct drm_crtc base;
173 enum pipe pipe;
174 enum plane plane;
175 u8 lut_r[256], lut_g[256], lut_b[256];
176 int dpms_mode;
177 bool active; /* is the crtc on? independent of the dpms mode */
178 bool busy; /* is scanout buffer being updated frequently? */
179 struct callout idle_callout;
180 bool lowfreq_avail;
181 struct intel_overlay *overlay;
182 struct intel_unpin_work *unpin_work;
183 int fdi_lanes;
184
185 struct drm_i915_gem_object *cursor_bo;
186 uint32_t cursor_addr;
187 int16_t cursor_x, cursor_y;
188 int16_t cursor_width, cursor_height;
189 bool cursor_visible;
190 unsigned int bpp;
191
192 /* We can share PLLs across outputs if the timings match */
193 struct intel_pch_pll *pch_pll;
194 };
195
196 struct intel_plane {
197 struct drm_plane base;
198 enum pipe pipe;
199 struct drm_i915_gem_object *obj;
200 bool primary_disabled;
201 int max_downscale;
202 u32 lut_r[1024], lut_g[1024], lut_b[1024];
203 void (*update_plane)(struct drm_plane *plane,
204 struct drm_framebuffer *fb,
205 struct drm_i915_gem_object *obj,
206 int crtc_x, int crtc_y,
207 unsigned int crtc_w, unsigned int crtc_h,
208 uint32_t x, uint32_t y,
209 uint32_t src_w, uint32_t src_h);
210 void (*disable_plane)(struct drm_plane *plane);
211 int (*update_colorkey)(struct drm_plane *plane,
212 struct drm_intel_sprite_colorkey *key);
213 void (*get_colorkey)(struct drm_plane *plane,
214 struct drm_intel_sprite_colorkey *key);
215 };
216
217 struct intel_watermark_params {
218 unsigned long fifo_size;
219 unsigned long max_wm;
220 unsigned long default_wm;
221 unsigned long guard_size;
222 unsigned long cacheline_size;
223 };
224
225 struct cxsr_latency {
226 int is_desktop;
227 int is_ddr3;
228 unsigned long fsb_freq;
229 unsigned long mem_freq;
230 unsigned long display_sr;
231 unsigned long display_hpll_disable;
232 unsigned long cursor_sr;
233 unsigned long cursor_hpll_disable;
234 };
235
236 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
237 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
238 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
239 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
240 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
241
242 #define DIP_HEADER_SIZE 5
243
244 #define DIP_TYPE_AVI 0x82
245 #define DIP_VERSION_AVI 0x2
246 #define DIP_LEN_AVI 13
247 #define DIP_AVI_PR_1 0
248 #define DIP_AVI_PR_2 1
249
250 #define DIP_TYPE_SPD 0x83
251 #define DIP_VERSION_SPD 0x1
252 #define DIP_LEN_SPD 25
253 #define DIP_SPD_UNKNOWN 0
254 #define DIP_SPD_DSTB 0x1
255 #define DIP_SPD_DVDP 0x2
256 #define DIP_SPD_DVHS 0x3
257 #define DIP_SPD_HDDVR 0x4
258 #define DIP_SPD_DVC 0x5
259 #define DIP_SPD_DSC 0x6
260 #define DIP_SPD_VCD 0x7
261 #define DIP_SPD_GAME 0x8
262 #define DIP_SPD_PC 0x9
263 #define DIP_SPD_BD 0xa
264 #define DIP_SPD_SCD 0xb
265
266 struct dip_infoframe {
267 uint8_t type; /* HB0 */
268 uint8_t ver; /* HB1 */
269 uint8_t len; /* HB2 - body len, not including checksum */
270 uint8_t ecc; /* Header ECC */
271 uint8_t checksum; /* PB0 */
272 union {
273 struct {
274 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
275 uint8_t Y_A_B_S;
276 /* PB2 - C 7:6, M 5:4, R 3:0 */
277 uint8_t C_M_R;
278 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
279 uint8_t ITC_EC_Q_SC;
280 /* PB4 - VIC 6:0 */
281 uint8_t VIC;
282 /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
283 uint8_t YQ_CN_PR;
284 /* PB6 to PB13 */
285 uint16_t top_bar_end;
286 uint16_t bottom_bar_start;
287 uint16_t left_bar_end;
288 uint16_t right_bar_start;
289 } __attribute__ ((packed)) avi;
290 struct {
291 uint8_t vn[8];
292 uint8_t pd[16];
293 uint8_t sdi;
294 } __attribute__ ((packed)) spd;
295 uint8_t payload[27];
296 } __attribute__ ((packed)) body;
297 } __attribute__((packed));
298
299 struct intel_hdmi {
300 struct intel_encoder base;
301 u32 sdvox_reg;
302 int ddc_bus;
303 int ddi_port;
304 uint32_t color_range;
305 bool has_hdmi_sink;
306 bool has_audio;
307 enum hdmi_force_audio force_audio;
308 void (*write_infoframe)(struct drm_encoder *encoder,
309 struct dip_infoframe *frame);
310 };
311
312 static inline struct drm_crtc *
intel_get_crtc_for_pipe(struct drm_device * dev,int pipe)313 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
314 {
315 struct drm_i915_private *dev_priv = dev->dev_private;
316 return dev_priv->pipe_to_crtc_mapping[pipe];
317 }
318
319 static inline struct drm_crtc *
intel_get_crtc_for_plane(struct drm_device * dev,int plane)320 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
321 {
322 struct drm_i915_private *dev_priv = dev->dev_private;
323 return dev_priv->plane_to_crtc_mapping[plane];
324 }
325
326 struct intel_unpin_work {
327 struct task task;
328 struct drm_device *dev;
329 struct drm_i915_gem_object *old_fb_obj;
330 struct drm_i915_gem_object *pending_flip_obj;
331 struct drm_pending_vblank_event *event;
332 int pending;
333 bool enable_stall_check;
334 };
335
336 struct intel_fbc_work {
337 struct timeout_task task;
338 struct drm_crtc *crtc;
339 struct drm_framebuffer *fb;
340 int interval;
341 };
342
343 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
344 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
345
346 extern void intel_attach_force_audio_property(struct drm_connector *connector);
347 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
348
349 extern void intel_crt_init(struct drm_device *dev);
350 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
351 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
352 extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
353 struct drm_display_mode *adjusted_mode);
354 extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
355 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
356 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
357 bool is_sdvob);
358 extern void intel_dvo_init(struct drm_device *dev);
359 extern void intel_tv_init(struct drm_device *dev);
360 extern void intel_mark_busy(struct drm_device *dev,
361 struct drm_i915_gem_object *obj);
362 extern bool intel_lvds_init(struct drm_device *dev);
363 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
364 void
365 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
366 struct drm_display_mode *adjusted_mode);
367 extern bool intel_dpd_is_edp(struct drm_device *dev);
368 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
369 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
370 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
371 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
372 enum plane plane);
373
374 void intel_sanitize_pm(struct drm_device *dev);
375
376 /* intel_panel.c */
377 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
378 struct drm_display_mode *adjusted_mode);
379 extern void intel_pch_panel_fitting(struct drm_device *dev,
380 int fitting_mode,
381 const struct drm_display_mode *mode,
382 struct drm_display_mode *adjusted_mode);
383 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
384 extern u32 intel_panel_get_backlight(struct drm_device *dev);
385 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
386 extern int intel_panel_setup_backlight(struct drm_device *dev);
387 extern void intel_panel_enable_backlight(struct drm_device *dev);
388 extern void intel_panel_disable_backlight(struct drm_device *dev);
389 extern void intel_panel_destroy_backlight(struct drm_device *dev);
390 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
391
392 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
393 extern void intel_encoder_prepare(struct drm_encoder *encoder);
394 extern void intel_encoder_commit(struct drm_encoder *encoder);
395 extern void intel_encoder_destroy(struct drm_encoder *encoder);
396
intel_attached_encoder(struct drm_connector * connector)397 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
398 {
399 return to_intel_connector(connector)->encoder;
400 }
401
402 extern void intel_connector_attach_encoder(struct intel_connector *connector,
403 struct intel_encoder *encoder);
404 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
405
406 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
407 struct drm_crtc *crtc);
408 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
409 struct drm_file *file_priv);
410 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
411 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
412
413 struct intel_load_detect_pipe {
414 struct drm_framebuffer *release_fb;
415 bool load_detect_temp;
416 int dpms_mode;
417 };
418 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
419 struct drm_connector *connector,
420 struct drm_display_mode *mode,
421 struct intel_load_detect_pipe *old);
422 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
423 struct drm_connector *connector,
424 struct intel_load_detect_pipe *old);
425
426 extern void intelfb_restore(void);
427 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
428 u16 blue, int regno);
429 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
430 u16 *blue, int regno);
431 extern void intel_enable_clock_gating(struct drm_device *dev);
432 extern void ironlake_disable_rc6(struct drm_device *dev);
433 extern void ironlake_enable_drps(struct drm_device *dev);
434 extern void ironlake_disable_drps(struct drm_device *dev);
435 extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
436 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
437 extern void gen6_disable_rps(struct drm_device *dev);
438 extern void intel_init_emon(struct drm_device *dev);
439 extern int intel_enable_rc6(const struct drm_device *dev);
440
441 extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
442 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
443 struct drm_display_mode *mode,
444 struct drm_display_mode *adjusted_mode);
445
446 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
447 struct drm_i915_gem_object *obj,
448 struct intel_ring_buffer *pipelined);
449 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
450
451 extern int intel_framebuffer_init(struct drm_device *dev,
452 struct intel_framebuffer *ifb,
453 struct drm_mode_fb_cmd2 *mode_cmd,
454 struct drm_i915_gem_object *obj);
455 extern int intel_fbdev_init(struct drm_device *dev);
456 extern void intel_fbdev_fini(struct drm_device *dev);
457
458 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
459 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
460 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
461
462 extern void intel_setup_overlay(struct drm_device *dev);
463 extern void intel_cleanup_overlay(struct drm_device *dev);
464 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
465 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
466 struct drm_file *file_priv);
467 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
468 struct drm_file *file_priv);
469
470 extern void intel_fb_output_poll_changed(struct drm_device *dev);
471 extern void intel_fb_restore_mode(struct drm_device *dev);
472
473 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
474 bool state);
475 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
476 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
477
478 extern void intel_init_clock_gating(struct drm_device *dev);
479 extern void intel_write_eld(struct drm_encoder *encoder,
480 struct drm_display_mode *mode);
481 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
482 extern void intel_prepare_ddi(struct drm_device *dev);
483 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
484 extern void intel_ddi_init(struct drm_device *dev, enum port port);
485
486 /* For use by IVB LP watermark workaround in intel_sprite.c */
487 extern void intel_update_watermarks(struct drm_device *dev);
488 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
489 uint32_t sprite_width,
490 int pixel_size);
491 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
492 struct drm_display_mode *mode);
493
494 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
495 struct drm_file *file_priv);
496 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
497 struct drm_file *file_priv);
498
499 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
500
501 /* Power-related functions, located in intel_pm.c */
502 extern void intel_init_pm(struct drm_device *dev);
503 /* FBC */
504 extern bool intel_fbc_enabled(struct drm_device *dev);
505 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
506 extern void intel_update_fbc(struct drm_device *dev);
507
508 #endif /* __INTEL_DRV_H__ */
509