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Searched defs:Ins (Results 1 – 25 of 69) sorted by relevance

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/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsCCState.h131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
HDMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
HDMipsCallLowering.cpp386 SmallVector<ISD::InputArg, 8> Ins; in lowerFormalArguments() local
556 SmallVector<ISD::InputArg, 8> Ins; in lowerCall() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
HDPPCCCState.h50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDCallingConvLower.cpp85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
264 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
HDMSP430ISelLowering.cpp447 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
551 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
592 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
620 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
809 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
937 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/ARC/
HDARCISelLowering.cpp269 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
471 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
486 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
HDLanaiISelLowering.cpp396 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
413 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
437 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments()
606 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCCallTo()
778 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/BPF/
HDBPFISelLowering.cpp327 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
410 auto &Ins = CLI.Ins; in LowerCall() local
585 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDMVETailPredication.cpp441 Instruction *Ins = L->getLoopPreheader()->getTerminator(); in TryConvertActiveLaneMask() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86ISelLoweringCall.cpp1095 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
1294 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument()
1672 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1998 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
2736 const SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in IsEligibleForTailCallOptimization() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonCommonGEP.cpp568 std::pair<NodeSymRel::iterator, bool> Ins = EqRel.insert(C); in common() local
597 std::pair<ProjMap::iterator,bool> Ins = PM.insert(std::make_pair(&S, Min)); in common() local
1239 ValueVect Ins; in removeDeadCode() local
HDHexagonISelLowering.cpp351 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
409 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
794 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
2831 SDValue Ins = in insertVectorPred() local
2852 SDValue Ins = in insertVectorPred() local
3731 const SmallVectorImpl<ISD::InputArg> &Ins, in IsEligibleForTailCallOptimization()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Xtensa/
HDXtensaISelLowering.cpp206 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
301 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; in LowerCall() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/XCore/
HDXCoreISelLowering.cpp946 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1019 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
1149 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1168 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/TableGen/
HDTGParser.h134 bool Ins = Vars.insert(std::make_pair(std::string(Name), I)).second; in addVar() local
/freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
HDSSAUpdaterImpl.h86 SmallVectorImpl<PhiT *> *Ins) : in SSAUpdaterImpl()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/M68k/
HDM68kISelLowering.cpp248 argsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) { in argsAreStructReturn()
431 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument()
526 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
885 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
920 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
1228 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const { in IsEligibleForTailCallOptimization() argument
/freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDFastISel.h97 SmallVector<ISD::InputArg, 4> Ins; member
HDCallingConvLower.h266 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
/freebsd-14-stable/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/
HDPatternParser.cpp344 const DagInit *Ins = Def->getValueAsDag("InOperands"); in parsePatFragImpl() local
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
HDWebAssemblyAsmParser.cpp312 bool pop(StringRef Ins, NestingType NT1, NestingType NT2 = Undefined) { in pop()
326 bool popAndPushWithSameSignature(StringRef Ins, NestingType PopNT, in popAndPushWithSameSignature()
/freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AVR/
HDAVRISelLowering.cpp1369 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1473 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1647 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()

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