1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This implements routines for translating functions from LLVM IR into 11 // Machine IR. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 17 18 #include "llvm/ADT/APInt.h" 19 #include "llvm/ADT/DenseMap.h" 20 #include "llvm/ADT/IndexedMap.h" 21 #include "llvm/ADT/Optional.h" 22 #include "llvm/ADT/SmallPtrSet.h" 23 #include "llvm/ADT/SmallVector.h" 24 #include "llvm/CodeGen/ISDOpcodes.h" 25 #include "llvm/CodeGen/MachineBasicBlock.h" 26 #include "llvm/IR/InlineAsm.h" 27 #include "llvm/IR/Instructions.h" 28 #include "llvm/Target/TargetRegisterInfo.h" 29 #include <vector> 30 31 namespace llvm { 32 33 class AllocaInst; 34 class BasicBlock; 35 class BranchProbabilityInfo; 36 class CallInst; 37 class Function; 38 class GlobalVariable; 39 class Instruction; 40 class MachineInstr; 41 class MachineBasicBlock; 42 class MachineFunction; 43 class MachineModuleInfo; 44 class MachineRegisterInfo; 45 class SelectionDAG; 46 class MVT; 47 class TargetLowering; 48 class Value; 49 50 //===--------------------------------------------------------------------===// 51 /// FunctionLoweringInfo - This contains information that is global to a 52 /// function that is used when lowering a region of the function. 53 /// 54 class FunctionLoweringInfo { 55 public: 56 const Function *Fn; 57 MachineFunction *MF; 58 const TargetLowering *TLI; 59 MachineRegisterInfo *RegInfo; 60 BranchProbabilityInfo *BPI; 61 /// CanLowerReturn - true iff the function's return value can be lowered to 62 /// registers. 63 bool CanLowerReturn; 64 65 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg 66 /// allocated to hold a pointer to the hidden sret parameter. 67 unsigned DemoteRegister; 68 69 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry. 70 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap; 71 72 /// ValueMap - Since we emit code for the function a basic block at a time, 73 /// we must remember which virtual registers hold the values for 74 /// cross-basic-block values. 75 DenseMap<const Value*, unsigned> ValueMap; 76 77 // Keep track of frame indices allocated for statepoints as they could be used 78 // across basic block boundaries. 79 // Key of the map is statepoint instruction, value is a map from spilled 80 // llvm Value to the optional stack stack slot index. 81 // If optional is unspecified it means that we have visited this value 82 // but didn't spill it. 83 typedef DenseMap<const Value*, Optional<int>> StatepointSpilledValueMapTy; 84 DenseMap<const Instruction*, StatepointSpilledValueMapTy> 85 StatepointRelocatedValues; 86 87 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in 88 /// the entry block. This allows the allocas to be efficiently referenced 89 /// anywhere in the function. 90 DenseMap<const AllocaInst*, int> StaticAllocaMap; 91 92 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments. 93 DenseMap<const Argument*, int> ByValArgFrameIndexMap; 94 95 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for 96 /// function arguments that are inserted after scheduling is completed. 97 SmallVector<MachineInstr*, 8> ArgDbgValues; 98 99 /// RegFixups - Registers which need to be replaced after isel is done. 100 DenseMap<unsigned, unsigned> RegFixups; 101 102 /// StatepointStackSlots - A list of temporary stack slots (frame indices) 103 /// used to spill values at a statepoint. We store them here to enable 104 /// reuse of the same stack slots across different statepoints in different 105 /// basic blocks. 106 SmallVector<unsigned, 50> StatepointStackSlots; 107 108 /// MBB - The current block. 109 MachineBasicBlock *MBB; 110 111 /// MBB - The current insert position inside the current block. 112 MachineBasicBlock::iterator InsertPt; 113 114 #ifndef NDEBUG 115 SmallPtrSet<const Instruction *, 8> CatchInfoLost; 116 SmallPtrSet<const Instruction *, 8> CatchInfoFound; 117 #endif 118 119 struct LiveOutInfo { 120 unsigned NumSignBits : 31; 121 bool IsValid : 1; 122 APInt KnownOne, KnownZero; LiveOutInfoLiveOutInfo123 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 124 KnownZero(1, 0) {} 125 }; 126 127 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) 128 /// for a value. 129 DenseMap<const Value *, ISD::NodeType> PreferredExtendType; 130 131 /// VisitedBBs - The set of basic blocks visited thus far by instruction 132 /// selection. 133 SmallPtrSet<const BasicBlock*, 4> VisitedBBs; 134 135 /// PHINodesToUpdate - A list of phi instructions whose operand list will 136 /// be updated after processing the current basic block. 137 /// TODO: This isn't per-function state, it's per-basic-block state. But 138 /// there's no other convenient place for it to live right now. 139 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; 140 unsigned OrigNumPHINodesToUpdate; 141 142 /// If the current MBB is a landing pad, the exception pointer and exception 143 /// selector registers are copied into these virtual registers by 144 /// SelectionDAGISel::PrepareEHLandingPad(). 145 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg; 146 147 /// set - Initialize this FunctionLoweringInfo with the given Function 148 /// and its associated MachineFunction. 149 /// 150 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG); 151 152 /// clear - Clear out all the function-specific state. This returns this 153 /// FunctionLoweringInfo to an empty state, ready to be used for a 154 /// different function. 155 void clear(); 156 157 /// isExportedInst - Return true if the specified value is an instruction 158 /// exported from its block. isExportedInst(const Value * V)159 bool isExportedInst(const Value *V) { 160 return ValueMap.count(V); 161 } 162 163 unsigned CreateReg(MVT VT); 164 165 unsigned CreateRegs(Type *Ty); 166 InitializeRegForValue(const Value * V)167 unsigned InitializeRegForValue(const Value *V) { 168 unsigned &R = ValueMap[V]; 169 assert(R == 0 && "Already initialized this value register!"); 170 return R = CreateRegs(V->getType()); 171 } 172 173 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 174 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. GetLiveOutRegInfo(unsigned Reg)175 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { 176 if (!LiveOutRegInfo.inBounds(Reg)) 177 return nullptr; 178 179 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; 180 if (!LOI->IsValid) 181 return nullptr; 182 183 return LOI; 184 } 185 186 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 187 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If 188 /// the register's LiveOutInfo is for a smaller bit width, it is extended to 189 /// the larger bit width by zero extension. The bit width must be no smaller 190 /// than the LiveOutInfo's existing bit width. 191 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); 192 193 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. AddLiveOutRegInfo(unsigned Reg,unsigned NumSignBits,const APInt & KnownZero,const APInt & KnownOne)194 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, 195 const APInt &KnownZero, const APInt &KnownOne) { 196 // Only install this information if it tells us something. 197 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 198 return; 199 200 LiveOutRegInfo.grow(Reg); 201 LiveOutInfo &LOI = LiveOutRegInfo[Reg]; 202 LOI.NumSignBits = NumSignBits; 203 LOI.KnownOne = KnownOne; 204 LOI.KnownZero = KnownZero; 205 } 206 207 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination 208 /// register based on the LiveOutInfo of its operands. 209 void ComputePHILiveOutRegInfo(const PHINode*); 210 211 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be 212 /// called when a block is visited before all of its predecessors. InvalidatePHILiveOutRegInfo(const PHINode * PN)213 void InvalidatePHILiveOutRegInfo(const PHINode *PN) { 214 // PHIs with no uses have no ValueMap entry. 215 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN); 216 if (It == ValueMap.end()) 217 return; 218 219 unsigned Reg = It->second; 220 if (Reg == 0) 221 return; 222 223 LiveOutRegInfo.grow(Reg); 224 LiveOutRegInfo[Reg].IsValid = false; 225 } 226 227 /// setArgumentFrameIndex - Record frame index for the byval 228 /// argument. 229 void setArgumentFrameIndex(const Argument *A, int FI); 230 231 /// getArgumentFrameIndex - Get frame index for the byval argument. 232 int getArgumentFrameIndex(const Argument *A); 233 234 private: 235 void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads); 236 237 /// LiveOutRegInfo - Information about live out vregs. 238 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo; 239 }; 240 241 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are 242 /// being passed to this variadic function, and set the MachineModuleInfo's 243 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined 244 /// reference to _fltused on Windows, which will link in MSVCRT's 245 /// floating-point support. 246 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI); 247 248 /// AddLandingPadInfo - Extract the exception handling information from the 249 /// landingpad instruction and add them to the specified machine module info. 250 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI, 251 MachineBasicBlock *MBB); 252 253 } // end namespace llvm 254 255 #endif 256