Searched defs:Imm1 (Results 1 – 12 of 12) sorted by relevance
| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64MIPeepholeOpt.cpp | 206 T &Imm1) -> std::optional<OpcodePair> { in visitAND()
213 Register NewDstReg) { in visitAND()
332 static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) { in splitAddSubImm()
377 T &Imm1) -> std::optional<OpcodePair> { in visitADDSUB()
386 Register NewDstReg) { in visitADDSUB()
414 T &Imm1) -> std::optional<OpcodePair> { in visitADDSSUBS()
432 Register NewDstReg) { in visitADDSSUBS()
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| HD | AArch64ExpandImm.cpp | 321 uint64_t Imm1 = MaybeDecomposition->first; in tryOrrOfLogicalImmediates() local
347 uint64_t Imm1 = MaybeDecomposition->first; in tryAndOfLogicalImmediates() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| HD | aarch32.cpp | 113 uint32_t Imm1 = (Value >> 11) & 0x01; in encodeImmMovtT1MovwT3() local
126 uint32_t Imm1 = (Hi >> 10) & 0x01; in decodeImmMovtT1MovwT3() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsTargetStreamer.cpp | 204 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, in emitII()
252 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| HD | PPCMIPeephole.cpp | 1680 int16_t Imm1 = 0, NewImm1 = 0, Imm2 = 0, NewImm2 = 0; in eliminateRedundantCompare() local
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| HD | PPCInstrInfo.cpp | 3253 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc, in selectReg()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | FastISel.cpp | 2147 uint64_t Imm1, uint64_t Imm2) { in fastEmitInst_rii()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| HD | HexagonConstPropagation.cpp | 2602 bool Imm1 = Src1.isImm(), Imm2 = Src2.isImm(); in evaluateHexCompare2() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | CombinerHelper.cpp | 1713 Register Imm1 = MI.getOperand(2).getReg(); in matchPtrAddImmedChain() local
1792 Register Imm1 = MI.getOperand(2).getReg(); in matchShiftImmedChain() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| HD | LoongArchISelLowering.cpp | 2381 unsigned Imm1 = Op2->getAsZExtVal(); in lowerINTRINSIC_VOID() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| HD | ARMAsmParser.cpp | 5499 int64_t Imm1, Imm2; in parseModImm() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 56369 unsigned Imm1 = Ops[1].getConstantOperandVal(2); in combineConcatVectorOps() local
56391 unsigned Imm1 = Ops[1].getConstantOperandVal(2); in combineConcatVectorOps() local
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