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33 /*$FreeBSD: stable/9/sys/dev/ixgbe/ixgbe_osdep.h 252898 2013-07-06 21:38:55Z jfv $*/
34
35 #ifndef _IXGBE_OS_H_
36 #define _IXGBE_OS_H_
37
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
56
57 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
58 #define EWARN(H, W, S) printf(W)
59
60 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
61 #define usec_delay(x) DELAY(x)
62 #define msec_delay(x) DELAY(1000*(x))
63
64 #define DBG 0
65 #define MSGOUT(S, A, B) printf(S "\n", A, B)
66 #define DEBUGFUNC(F) DEBUGOUT(F);
67 #if DBG
68 #define DEBUGOUT(S) printf(S "\n")
69 #define DEBUGOUT1(S,A) printf(S "\n",A)
70 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
71 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
72 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D)
73 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E)
74 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F)
75 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
76 #define ERROR_REPORT1(S,A) printf(S "\n",A)
77 #define ERROR_REPORT2(S,A,B) printf(S "\n",A,B)
78 #define ERROR_REPORT3(S,A,B,C) printf(S "\n",A,B,C)
79 #else
80 #define DEBUGOUT(S)
81 #define DEBUGOUT1(S,A)
82 #define DEBUGOUT2(S,A,B)
83 #define DEBUGOUT3(S,A,B,C)
84 #define DEBUGOUT4(S,A,B,C,D)
85 #define DEBUGOUT5(S,A,B,C,D,E)
86 #define DEBUGOUT6(S,A,B,C,D,E,F)
87 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
88
89 #define ERROR_REPORT1(S,A)
90 #define ERROR_REPORT2(S,A,B)
91 #define ERROR_REPORT3(S,A,B,C)
92 #endif
93
94 #define FALSE 0
95 #define false 0 /* shared code requires this */
96 #define TRUE 1
97 #define true 1
98 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
99 #define PCI_COMMAND_REGISTER PCIR_COMMAND
100
101 /* Shared code dropped this define.. */
102 #define IXGBE_INTEL_VENDOR_ID 0x8086
103
104 /* Bunch of defines for shared code bogosity */
105 #define UNREFERENCED_PARAMETER(_p)
106 #define UNREFERENCED_1PARAMETER(_p)
107 #define UNREFERENCED_2PARAMETER(_p, _q)
108 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
109 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
110
111
112 #define IXGBE_NTOHL(_i) ntohl(_i)
113 #define IXGBE_NTOHS(_i) ntohs(_i)
114
115 /* XXX these need to be revisited */
116 #define IXGBE_CPU_TO_LE32 le32toh
117 #define IXGBE_LE32_TO_CPUS le32dec
118
119 typedef uint8_t u8;
120 typedef int8_t s8;
121 typedef uint16_t u16;
122 typedef int16_t s16;
123 typedef uint32_t u32;
124 typedef int32_t s32;
125 typedef uint64_t u64;
126 #ifndef __bool_true_false_are_defined
127 typedef boolean_t bool;
128 #endif
129
130 /* shared code requires this */
131 #define __le16 u16
132 #define __le32 u32
133 #define __le64 u64
134 #define __be16 u16
135 #define __be32 u32
136 #define __be64 u64
137
138 #define le16_to_cpu
139
140 #if __FreeBSD_version < 800000
141 #if defined(__i386__) || defined(__amd64__)
142 #define mb() __asm volatile("mfence" ::: "memory")
143 #define wmb() __asm volatile("sfence" ::: "memory")
144 #define rmb() __asm volatile("lfence" ::: "memory")
145 #else
146 #define mb()
147 #define rmb()
148 #define wmb()
149 #endif
150 #endif
151
152 #if defined(__i386__) || defined(__amd64__)
153 static __inline
prefetch(void * x)154 void prefetch(void *x)
155 {
156 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
157 }
158 #else
159 #define prefetch(x)
160 #endif
161
162 /*
163 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes
164 * non-overlapping regions and 32-byte padding on both src and dst.
165 */
166 static __inline int
ixgbe_bcopy(void * _src,void * _dst,int l)167 ixgbe_bcopy(void *_src, void *_dst, int l)
168 {
169 uint64_t *src = _src;
170 uint64_t *dst = _dst;
171
172 for (; l > 0; l -= 32) {
173 *dst++ = *src++;
174 *dst++ = *src++;
175 *dst++ = *src++;
176 *dst++ = *src++;
177 }
178 return (0);
179 }
180
181 struct ixgbe_osdep
182 {
183 bus_space_tag_t mem_bus_space_tag;
184 bus_space_handle_t mem_bus_space_handle;
185 struct device *dev;
186 };
187
188 /* These routines are needed by the shared code */
189 struct ixgbe_hw;
190 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
191 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
192
193 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
194 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
195
196 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
197
198 #define IXGBE_READ_REG(a, reg) (\
199 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
200 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
201 reg))
202
203 #define IXGBE_WRITE_REG(a, reg, value) (\
204 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
205 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
206 reg, value))
207
208
209 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
210 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
211 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
212 (reg + ((offset) << 2))))
213
214 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
215 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
216 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
217 (reg + ((offset) << 2)), value))
218
219
220 #endif /* _IXGBE_OS_H_ */
221