xref: /freebsd-13-stable/sys/dev/ipmi/ipmivars.h (revision f8167e0404dab9ffeaca95853dd237ab7c587f82)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2006 IronPort Systems Inc. <ambrisko@ironport.com>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef __IPMIVARS_H__
30 #define	__IPMIVARS_H__
31 
32 struct ipmi_get_info {
33 	int		iface_type;
34 	uint64_t	address;
35 	int		offset;
36 	int		io_mode;
37 	int		irq;
38 };
39 
40 struct ipmi_device;
41 
42 struct ipmi_request {
43 	TAILQ_ENTRY(ipmi_request) ir_link;
44 	struct ipmi_device *ir_owner;	/* Driver uses NULL. */
45 	u_char		*ir_request;	/* Request is data to send to BMC. */
46 	size_t		ir_requestlen;
47 	u_char		*ir_reply;	/* Reply is data read from BMC. */
48 	size_t		ir_replybuflen;	/* Length of ir_reply[] buffer. */
49 	int		ir_replylen;	/* Length of reply from BMC. */
50 	int		ir_error;
51 	long		ir_msgid;
52 	uint8_t		ir_addr;
53 	uint8_t		ir_command;
54 	uint8_t		ir_compcode;
55 	bool		ir_ipmb;
56 	uint8_t		ir_ipmb_addr;
57 	uint8_t		ir_ipmb_command;
58 };
59 
60 #define	IPMI_IF_KCS_NRES		2
61 #define	IPMI_IF_SMIC_NRES		3
62 #define	IPMI_IF_BT_NRES			3
63 
64 #define	MAX_RES				3
65 #define KCS_DATA			0
66 #define KCS_CTL_STS			1
67 #define SMIC_DATA			0
68 #define SMIC_CTL_STS			1
69 #define SMIC_FLAGS			2
70 
71 struct ipmi_softc;
72 
73 /* Per file descriptor data. */
74 struct ipmi_device {
75 	TAILQ_ENTRY(ipmi_device) ipmi_link;
76 	TAILQ_HEAD(,ipmi_request) ipmi_completed_requests;
77 	struct selinfo		ipmi_select;
78 	struct ipmi_softc	*ipmi_softc;
79 	int			ipmi_closing;
80 	int			ipmi_requests;
81 	u_char			ipmi_address;	/* IPMB address. */
82 	u_char			ipmi_lun;
83 };
84 
85 struct ipmi_bt {
86 	uint8_t	seq;
87 };
88 
89 struct ipmi_kcs {
90 };
91 
92 struct ipmi_smic {
93 };
94 
95 struct ipmi_ssif {
96 	device_t smbus;
97 	int	smbus_address;
98 };
99 
100 struct ipmi_softc {
101 	device_t		ipmi_dev;
102 	union {
103 		struct ipmi_bt bt;
104 		struct ipmi_kcs kcs;
105 		struct ipmi_smic smic;
106 		struct ipmi_ssif ssif;
107 	} _iface;
108 	int			ipmi_io_rid;
109 	int			ipmi_io_type;
110 	struct mtx		ipmi_io_lock;
111 	struct resource		*ipmi_io_res[MAX_RES];
112 	int			ipmi_io_spacing;
113 	int			ipmi_irq_rid;
114 	struct resource		*ipmi_irq_res;
115 	void			*ipmi_irq;
116 	int			ipmi_detaching;
117 	int			ipmi_opened;
118 	uint8_t			ipmi_dev_support;	/* IPMI_ADS_* */
119 	struct cdev		*ipmi_cdev;
120 	TAILQ_HEAD(,ipmi_request) ipmi_pending_requests;
121 	int			ipmi_driver_requests_polled;
122 	eventhandler_tag	ipmi_power_cycle_tag;
123 	eventhandler_tag	ipmi_watchdog_tag;
124 	eventhandler_tag	ipmi_shutdown_tag;
125 	int			ipmi_watchdog_active;
126 	int			ipmi_watchdog_actions;
127 	int			ipmi_watchdog_pretimeout;
128 	struct intr_config_hook	ipmi_ich;
129 	struct mtx		ipmi_requests_lock;
130 	struct cv		ipmi_request_added;
131 	struct proc		*ipmi_kthread;
132 	driver_intr_t		*ipmi_intr;
133 	int			(*ipmi_startup)(struct ipmi_softc *);
134 	int			(*ipmi_enqueue_request)(struct ipmi_softc *, struct ipmi_request *);
135 	int			(*ipmi_driver_request)(struct ipmi_softc *, struct ipmi_request *, int);
136 };
137 
138 #define	ipmi_ssif_smbus_address		_iface.ssif.smbus_address
139 #define	ipmi_ssif_smbus			_iface.ssif.smbus
140 #define	ipmi_bt_seq			_iface.bt.seq
141 
142 #define	KCS_MODE			0x01
143 #define	SMIC_MODE			0x02
144 #define	BT_MODE				0x03
145 #define	SSIF_MODE			0x04
146 
147 /* KCS status flags */
148 #define KCS_STATUS_OBF			0x01 /* Data Out ready from BMC */
149 #define KCS_STATUS_IBF			0x02 /* Data In from System */
150 #define KCS_STATUS_SMS_ATN		0x04 /* Ready in RX queue */
151 #define KCS_STATUS_C_D			0x08 /* Command/Data register write*/
152 #define KCS_STATUS_OEM1			0x10
153 #define KCS_STATUS_OEM2			0x20
154 #define KCS_STATUS_S0			0x40
155 #define KCS_STATUS_S1			0x80
156  #define KCS_STATUS_STATE(x)		((x)>>6)
157  #define KCS_STATUS_STATE_IDLE		0x0
158  #define KCS_STATUS_STATE_READ		0x1
159  #define KCS_STATUS_STATE_WRITE		0x2
160  #define KCS_STATUS_STATE_ERROR		0x3
161 #define	KCS_IFACE_STATUS_OK		0x00
162 #define KCS_IFACE_STATUS_ABORT		0x01
163 #define KCS_IFACE_STATUS_ILLEGAL	0x02
164 #define KCS_IFACE_STATUS_LENGTH_ERR	0x06
165 #define	KCS_IFACE_STATUS_UNKNOWN_ERR	0xff
166 
167 /* KCS control codes */
168 #define KCS_CONTROL_GET_STATUS_ABORT	0x60
169 #define KCS_CONTROL_WRITE_START		0x61
170 #define KCS_CONTROL_WRITE_END		0x62
171 #define KCS_DATA_IN_READ		0x68
172 
173 /* SMIC status flags */
174 #define SMIC_STATUS_BUSY		0x01 /* System set and BMC clears it */
175 #define SMIC_STATUS_SMS_ATN		0x04 /* BMC has a message */
176 #define SMIC_STATUS_EVT_ATN		0x08 /* Event has been RX */
177 #define SMIC_STATUS_SMI			0x10 /* asserted SMI */
178 #define SMIC_STATUS_TX_RDY		0x40 /* Ready to accept WRITE */
179 #define SMIC_STATUS_RX_RDY		0x80 /* Ready to read */
180 #define	SMIC_STATUS_RESERVED		0x22
181 
182 /* SMIC control codes */
183 #define SMIC_CC_SMS_GET_STATUS		0x40
184 #define SMIC_CC_SMS_WR_START		0x41
185 #define SMIC_CC_SMS_WR_NEXT		0x42
186 #define SMIC_CC_SMS_WR_END		0x43
187 #define SMIC_CC_SMS_RD_START		0x44
188 #define SMIC_CC_SMS_RD_NEXT		0x45
189 #define SMIC_CC_SMS_RD_END		0x46
190 
191 /* SMIC status codes */
192 #define SMIC_SC_SMS_RDY			0xc0
193 #define SMIC_SC_SMS_WR_START		0xc1
194 #define SMIC_SC_SMS_WR_NEXT		0xc2
195 #define SMIC_SC_SMS_WR_END		0xc3
196 #define SMIC_SC_SMS_RD_START		0xc4
197 #define SMIC_SC_SMS_RD_NEXT		0xc5
198 #define SMIC_SC_SMS_RD_END		0xc6
199 
200 #define	IPMI_ADDR(netfn, lun)		((netfn) << 2 | (lun))
201 #define	IPMI_REPLY_ADDR(addr)		((addr) + 0x4)
202 
203 #define	IPMI_LOCK(sc)		mtx_lock(&(sc)->ipmi_requests_lock)
204 #define	IPMI_UNLOCK(sc)		mtx_unlock(&(sc)->ipmi_requests_lock)
205 #define	IPMI_LOCK_ASSERT(sc)	mtx_assert(&(sc)->ipmi_requests_lock, MA_OWNED)
206 
207 #define	IPMI_IO_LOCK(sc)	mtx_lock(&(sc)->ipmi_io_lock)
208 #define	IPMI_IO_UNLOCK(sc)	mtx_unlock(&(sc)->ipmi_io_lock)
209 #define	IPMI_IO_LOCK_ASSERT(sc)	mtx_assert(&(sc)->ipmi_io_lock, MA_OWNED)
210 
211 /* I/O to a single I/O resource. */
212 #define INB_SINGLE(sc, x)						\
213 	bus_read_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x))
214 #define OUTB_SINGLE(sc, x, value)					\
215 	bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)
216 
217 /* I/O with each register in its in I/O resource. */
218 #define INB_MULTIPLE(sc, x)			\
219 	bus_read_1((sc)->ipmi_io_res[(x)], 0)
220 #define OUTB_MULTIPLE(sc, x, value)					\
221 	bus_write_1((sc)->ipmi_io_res[(x)], 0, value)
222 
223 /*
224  * Determine I/O method based on whether or not we have more than one I/O
225  * resource.
226  */
227 #define	INB(sc, x)							\
228 	((sc)->ipmi_io_res[1] != NULL ? INB_MULTIPLE(sc, x) : INB_SINGLE(sc, x))
229 #define	OUTB(sc, x, value)						\
230 	((sc)->ipmi_io_res[1] != NULL ? OUTB_MULTIPLE(sc, x, value) :	\
231 	    OUTB_SINGLE(sc, x, value))
232 
233 #define MAX_TIMEOUT 6 * hz
234 
235 int	ipmi_attach(device_t);
236 int	ipmi_detach(device_t);
237 void	ipmi_release_resources(device_t);
238 
239 /* Manage requests. */
240 void ipmi_init_request(struct ipmi_request *, struct ipmi_device *, long,
241 	    uint8_t, uint8_t, size_t, size_t);
242 struct ipmi_request *ipmi_alloc_request(struct ipmi_device *, long, uint8_t,
243 	    uint8_t, size_t, size_t);
244 void	ipmi_complete_request(struct ipmi_softc *, struct ipmi_request *);
245 struct ipmi_request *ipmi_dequeue_request(struct ipmi_softc *);
246 void	ipmi_free_request(struct ipmi_request *);
247 int	ipmi_polled_enqueue_request(struct ipmi_softc *, struct ipmi_request *);
248 int	ipmi_submit_driver_request(struct ipmi_softc *, struct ipmi_request *,
249 	    int);
250 
251 /* Identify BMC interface via SMBIOS. */
252 int	ipmi_smbios_identify(struct ipmi_get_info *);
253 
254 /* Match BMC PCI device listed in SMBIOS. */
255 const char *ipmi_pci_match(uint16_t, uint16_t);
256 
257 /* Interface attach routines. */
258 int	ipmi_kcs_attach(struct ipmi_softc *);
259 int	ipmi_kcs_probe_align(struct ipmi_softc *);
260 int	ipmi_smic_attach(struct ipmi_softc *);
261 int	ipmi_bt_attach(struct ipmi_softc *);
262 int	ipmi_ssif_attach(struct ipmi_softc *, device_t, int);
263 
264 extern devclass_t ipmi_devclass;
265 extern int ipmi_attached;
266 
267 #endif	/* !__IPMIVARS_H__ */
268