1 /*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 *
25 * $FreeBSD$
26 */
27
28 #ifndef DRM_INTEL_DRV_H
29 #define DRM_INTEL_DRV_H
30
31 #include <dev/drm2/i915/i915_drm.h>
32 #include <dev/drm2/i915/i915_drv.h>
33 #include <dev/drm2/drm_crtc.h>
34 #include <dev/drm2/drm_crtc_helper.h>
35 #include <dev/drm2/drm_fb_helper.h>
36
37 #define _intel_wait_for(DEV, COND, MS, W, WMSG) \
38 ({ \
39 int end, ret; \
40 \
41 end = ticks + (MS) * hz / 1000; \
42 ret = 0; \
43 \
44 while (!(COND)) { \
45 if (time_after(ticks, end)) { \
46 ret = -ETIMEDOUT; \
47 break; \
48 } \
49 if (W) \
50 pause((WMSG), 1); \
51 else \
52 DELAY(1000); \
53 } \
54 \
55 ret; \
56 })
57
58 #define wait_for_atomic_us(COND, US) ({ \
59 int i, ret__ = -ETIMEDOUT; \
60 for (i = 0; i < (US); i++) { \
61 if ((COND)) { \
62 ret__ = 0; \
63 break; \
64 } \
65 DELAY(1); \
66 } \
67 ret__; \
68 })
69
70 #define wait_for(COND, MS) _intel_wait_for(NULL, COND, MS, 1, "915wfi")
71 #define wait_for_atomic(COND, MS) _intel_wait_for(NULL, COND, MS, 0, "915wfa")
72
73 #define KHz(x) (1000*x)
74 #define MHz(x) KHz(1000*x)
75
76 /*
77 * Display related stuff
78 */
79
80 /* store information about an Ixxx DVO */
81 /* The i830->i865 use multiple DVOs with multiple i2cs */
82 /* the i915, i945 have a single sDVO i2c bus - which is different */
83 #define MAX_OUTPUTS 6
84 /* maximum connectors per crtcs in the mode set */
85 #define INTELFB_CONN_LIMIT 4
86
87 #define INTEL_I2C_BUS_DVO 1
88 #define INTEL_I2C_BUS_SDVO 2
89
90 /* these are outputs from the chip - integrated only
91 external chips are via DVO or SDVO output */
92 #define INTEL_OUTPUT_UNUSED 0
93 #define INTEL_OUTPUT_ANALOG 1
94 #define INTEL_OUTPUT_DVO 2
95 #define INTEL_OUTPUT_SDVO 3
96 #define INTEL_OUTPUT_LVDS 4
97 #define INTEL_OUTPUT_TVOUT 5
98 #define INTEL_OUTPUT_HDMI 6
99 #define INTEL_OUTPUT_DISPLAYPORT 7
100 #define INTEL_OUTPUT_EDP 8
101 #define INTEL_OUTPUT_UNKNOWN 9
102
103 /* Intel Pipe Clone Bit */
104 #define INTEL_HDMIB_CLONE_BIT 1
105 #define INTEL_HDMIC_CLONE_BIT 2
106 #define INTEL_HDMID_CLONE_BIT 3
107 #define INTEL_HDMIE_CLONE_BIT 4
108 #define INTEL_HDMIF_CLONE_BIT 5
109 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
110 #define INTEL_SDVO_TV_CLONE_BIT 7
111 #define INTEL_SDVO_LVDS_CLONE_BIT 8
112 #define INTEL_ANALOG_CLONE_BIT 9
113 #define INTEL_TV_CLONE_BIT 10
114 #define INTEL_DP_B_CLONE_BIT 11
115 #define INTEL_DP_C_CLONE_BIT 12
116 #define INTEL_DP_D_CLONE_BIT 13
117 #define INTEL_LVDS_CLONE_BIT 14
118 #define INTEL_DVO_TMDS_CLONE_BIT 15
119 #define INTEL_DVO_LVDS_CLONE_BIT 16
120 #define INTEL_EDP_CLONE_BIT 17
121
122 #define INTEL_DVO_CHIP_NONE 0
123 #define INTEL_DVO_CHIP_LVDS 1
124 #define INTEL_DVO_CHIP_TMDS 2
125 #define INTEL_DVO_CHIP_TVOUT 4
126
127 /* drm_display_mode->private_flags */
128 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
129 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
130 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
131 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
132 * timings in the mode to prevent the crtc fixup from overwriting them.
133 * Currently only lvds needs that. */
134 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
135
136 static inline void
intel_mode_set_pixel_multiplier(struct drm_display_mode * mode,int multiplier)137 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
138 int multiplier)
139 {
140 mode->clock *= multiplier;
141 mode->private_flags |= multiplier;
142 }
143
144 static inline int
intel_mode_get_pixel_multiplier(const struct drm_display_mode * mode)145 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
146 {
147 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
148 }
149
150 struct intel_framebuffer {
151 struct drm_framebuffer base;
152 struct drm_i915_gem_object *obj;
153 };
154
155 struct intel_fbdev {
156 struct drm_fb_helper helper;
157 struct intel_framebuffer ifb;
158 struct list_head fbdev_list;
159 struct drm_display_mode *our_mode;
160 };
161
162 struct intel_encoder {
163 struct drm_encoder base;
164 int type;
165 bool needs_tv_clock;
166 void (*hot_plug)(struct intel_encoder *);
167 int crtc_mask;
168 int clone_mask;
169 };
170
171 struct intel_connector {
172 struct drm_connector base;
173 struct intel_encoder *encoder;
174 };
175
176 struct intel_crtc {
177 struct drm_crtc base;
178 enum pipe pipe;
179 enum plane plane;
180 u8 lut_r[256], lut_g[256], lut_b[256];
181 int dpms_mode;
182 bool active; /* is the crtc on? independent of the dpms mode */
183 bool busy; /* is scanout buffer being updated frequently? */
184 struct callout idle_callout;
185 bool lowfreq_avail;
186 struct intel_overlay *overlay;
187 struct intel_unpin_work *unpin_work;
188 int fdi_lanes;
189
190 struct drm_i915_gem_object *cursor_bo;
191 uint32_t cursor_addr;
192 int16_t cursor_x, cursor_y;
193 int16_t cursor_width, cursor_height;
194 bool cursor_visible;
195 unsigned int bpp;
196
197 /* We can share PLLs across outputs if the timings match */
198 struct intel_pch_pll *pch_pll;
199 };
200
201 struct intel_plane {
202 struct drm_plane base;
203 enum pipe pipe;
204 struct drm_i915_gem_object *obj;
205 bool primary_disabled;
206 int max_downscale;
207 u32 lut_r[1024], lut_g[1024], lut_b[1024];
208 void (*update_plane)(struct drm_plane *plane,
209 struct drm_framebuffer *fb,
210 struct drm_i915_gem_object *obj,
211 int crtc_x, int crtc_y,
212 unsigned int crtc_w, unsigned int crtc_h,
213 uint32_t x, uint32_t y,
214 uint32_t src_w, uint32_t src_h);
215 void (*disable_plane)(struct drm_plane *plane);
216 int (*update_colorkey)(struct drm_plane *plane,
217 struct drm_intel_sprite_colorkey *key);
218 void (*get_colorkey)(struct drm_plane *plane,
219 struct drm_intel_sprite_colorkey *key);
220 };
221
222 struct intel_watermark_params {
223 unsigned long fifo_size;
224 unsigned long max_wm;
225 unsigned long default_wm;
226 unsigned long guard_size;
227 unsigned long cacheline_size;
228 };
229
230 struct cxsr_latency {
231 int is_desktop;
232 int is_ddr3;
233 unsigned long fsb_freq;
234 unsigned long mem_freq;
235 unsigned long display_sr;
236 unsigned long display_hpll_disable;
237 unsigned long cursor_sr;
238 unsigned long cursor_hpll_disable;
239 };
240
241 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
242 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
243 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
244 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
245 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
246
247 #define DIP_HEADER_SIZE 5
248
249 #define DIP_TYPE_AVI 0x82
250 #define DIP_VERSION_AVI 0x2
251 #define DIP_LEN_AVI 13
252 #define DIP_AVI_PR_1 0
253 #define DIP_AVI_PR_2 1
254
255 #define DIP_TYPE_SPD 0x83
256 #define DIP_VERSION_SPD 0x1
257 #define DIP_LEN_SPD 25
258 #define DIP_SPD_UNKNOWN 0
259 #define DIP_SPD_DSTB 0x1
260 #define DIP_SPD_DVDP 0x2
261 #define DIP_SPD_DVHS 0x3
262 #define DIP_SPD_HDDVR 0x4
263 #define DIP_SPD_DVC 0x5
264 #define DIP_SPD_DSC 0x6
265 #define DIP_SPD_VCD 0x7
266 #define DIP_SPD_GAME 0x8
267 #define DIP_SPD_PC 0x9
268 #define DIP_SPD_BD 0xa
269 #define DIP_SPD_SCD 0xb
270
271 struct dip_infoframe {
272 uint8_t type; /* HB0 */
273 uint8_t ver; /* HB1 */
274 uint8_t len; /* HB2 - body len, not including checksum */
275 uint8_t ecc; /* Header ECC */
276 uint8_t checksum; /* PB0 */
277 union {
278 struct {
279 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
280 uint8_t Y_A_B_S;
281 /* PB2 - C 7:6, M 5:4, R 3:0 */
282 uint8_t C_M_R;
283 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
284 uint8_t ITC_EC_Q_SC;
285 /* PB4 - VIC 6:0 */
286 uint8_t VIC;
287 /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
288 uint8_t YQ_CN_PR;
289 /* PB6 to PB13 */
290 uint16_t top_bar_end;
291 uint16_t bottom_bar_start;
292 uint16_t left_bar_end;
293 uint16_t right_bar_start;
294 } __attribute__ ((packed)) avi;
295 struct {
296 uint8_t vn[8];
297 uint8_t pd[16];
298 uint8_t sdi;
299 } __attribute__ ((packed)) spd;
300 uint8_t payload[27];
301 } __attribute__ ((packed)) body;
302 } __attribute__((packed));
303
304 struct intel_hdmi {
305 struct intel_encoder base;
306 u32 sdvox_reg;
307 int ddc_bus;
308 int ddi_port;
309 uint32_t color_range;
310 bool has_hdmi_sink;
311 bool has_audio;
312 enum hdmi_force_audio force_audio;
313 void (*write_infoframe)(struct drm_encoder *encoder,
314 struct dip_infoframe *frame);
315 };
316
317 static inline struct drm_crtc *
intel_get_crtc_for_pipe(struct drm_device * dev,int pipe)318 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
319 {
320 struct drm_i915_private *dev_priv = dev->dev_private;
321 return dev_priv->pipe_to_crtc_mapping[pipe];
322 }
323
324 static inline struct drm_crtc *
intel_get_crtc_for_plane(struct drm_device * dev,int plane)325 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
326 {
327 struct drm_i915_private *dev_priv = dev->dev_private;
328 return dev_priv->plane_to_crtc_mapping[plane];
329 }
330
331 struct intel_unpin_work {
332 struct task task;
333 struct drm_device *dev;
334 struct drm_i915_gem_object *old_fb_obj;
335 struct drm_i915_gem_object *pending_flip_obj;
336 struct drm_pending_vblank_event *event;
337 int pending;
338 bool enable_stall_check;
339 };
340
341 struct intel_fbc_work {
342 struct timeout_task task;
343 struct drm_crtc *crtc;
344 struct drm_framebuffer *fb;
345 int interval;
346 };
347
348 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
349 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
350
351 extern void intel_attach_force_audio_property(struct drm_connector *connector);
352 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
353
354 extern void intel_crt_init(struct drm_device *dev);
355 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
356 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
357 extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
358 struct drm_display_mode *adjusted_mode);
359 extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
360 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
361 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
362 bool is_sdvob);
363 extern void intel_dvo_init(struct drm_device *dev);
364 extern void intel_tv_init(struct drm_device *dev);
365 extern void intel_mark_busy(struct drm_device *dev,
366 struct drm_i915_gem_object *obj);
367 extern bool intel_lvds_init(struct drm_device *dev);
368 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
369 void
370 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
371 struct drm_display_mode *adjusted_mode);
372 extern bool intel_dpd_is_edp(struct drm_device *dev);
373 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
374 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
375 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
376 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
377 enum plane plane);
378
379 void intel_sanitize_pm(struct drm_device *dev);
380
381 /* intel_panel.c */
382 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
383 struct drm_display_mode *adjusted_mode);
384 extern void intel_pch_panel_fitting(struct drm_device *dev,
385 int fitting_mode,
386 const struct drm_display_mode *mode,
387 struct drm_display_mode *adjusted_mode);
388 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
389 extern u32 intel_panel_get_backlight(struct drm_device *dev);
390 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
391 extern int intel_panel_setup_backlight(struct drm_device *dev);
392 extern void intel_panel_enable_backlight(struct drm_device *dev);
393 extern void intel_panel_disable_backlight(struct drm_device *dev);
394 extern void intel_panel_destroy_backlight(struct drm_device *dev);
395 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
396
397 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
398 extern void intel_encoder_prepare(struct drm_encoder *encoder);
399 extern void intel_encoder_commit(struct drm_encoder *encoder);
400 extern void intel_encoder_destroy(struct drm_encoder *encoder);
401
intel_attached_encoder(struct drm_connector * connector)402 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
403 {
404 return to_intel_connector(connector)->encoder;
405 }
406
407 extern void intel_connector_attach_encoder(struct intel_connector *connector,
408 struct intel_encoder *encoder);
409 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
410
411 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
412 struct drm_crtc *crtc);
413 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
414 struct drm_file *file_priv);
415 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
416 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
417
418 struct intel_load_detect_pipe {
419 struct drm_framebuffer *release_fb;
420 bool load_detect_temp;
421 int dpms_mode;
422 };
423 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
424 struct drm_connector *connector,
425 struct drm_display_mode *mode,
426 struct intel_load_detect_pipe *old);
427 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
428 struct drm_connector *connector,
429 struct intel_load_detect_pipe *old);
430
431 extern void intelfb_restore(void);
432 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
433 u16 blue, int regno);
434 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
435 u16 *blue, int regno);
436 extern void intel_enable_clock_gating(struct drm_device *dev);
437 extern void ironlake_disable_rc6(struct drm_device *dev);
438 extern void ironlake_enable_drps(struct drm_device *dev);
439 extern void ironlake_disable_drps(struct drm_device *dev);
440 extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
441 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
442 extern void gen6_disable_rps(struct drm_device *dev);
443 extern void intel_init_emon(struct drm_device *dev);
444 extern int intel_enable_rc6(const struct drm_device *dev);
445
446 extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
447 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
448 struct drm_display_mode *mode,
449 struct drm_display_mode *adjusted_mode);
450
451 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
452 struct drm_i915_gem_object *obj,
453 struct intel_ring_buffer *pipelined);
454 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
455
456 extern int intel_framebuffer_init(struct drm_device *dev,
457 struct intel_framebuffer *ifb,
458 struct drm_mode_fb_cmd2 *mode_cmd,
459 struct drm_i915_gem_object *obj);
460 extern int intel_fbdev_init(struct drm_device *dev);
461 extern void intel_fbdev_fini(struct drm_device *dev);
462
463 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
464 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
465 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
466
467 extern void intel_setup_overlay(struct drm_device *dev);
468 extern void intel_cleanup_overlay(struct drm_device *dev);
469 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
470 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
471 struct drm_file *file_priv);
472 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
473 struct drm_file *file_priv);
474
475 extern void intel_fb_output_poll_changed(struct drm_device *dev);
476 extern void intel_fb_restore_mode(struct drm_device *dev);
477
478 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
479 bool state);
480 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
481 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
482
483 extern void intel_init_clock_gating(struct drm_device *dev);
484 extern void intel_write_eld(struct drm_encoder *encoder,
485 struct drm_display_mode *mode);
486 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
487 extern void intel_prepare_ddi(struct drm_device *dev);
488 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
489 extern void intel_ddi_init(struct drm_device *dev, enum port port);
490
491 /* For use by IVB LP watermark workaround in intel_sprite.c */
492 extern void intel_update_watermarks(struct drm_device *dev);
493 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
494 uint32_t sprite_width,
495 int pixel_size);
496 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
497 struct drm_display_mode *mode);
498
499 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
500 struct drm_file *file_priv);
501 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
502 struct drm_file *file_priv);
503
504 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
505
506 /* Power-related functions, located in intel_pm.c */
507 extern void intel_init_pm(struct drm_device *dev);
508 /* FBC */
509 extern bool intel_fbc_enabled(struct drm_device *dev);
510 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
511 extern void intel_update_fbc(struct drm_device *dev);
512
513 #endif /* __INTEL_DRV_H__ */
514