1 /*- 2 * Copyright (c) 1993, 1994, 1995 3 * Rodney W. Grimes, Milwaukie, Oregon 97222. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer as 10 * the first lines of this file unmodified. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Rodney W. Grimes. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 /* 35 * Definitions for EtherExpress 16 36 */ 37 38 #define IEE16_DATAPORT 0x00 /* shared memory data port */ 39 #define IEE16_WRITEPTR 0x02 /* shared memory write pointer */ 40 #define IEE16_READPTR 0x04 /* shared memory read pointer */ 41 42 #define IEE16_ATTN 0x06 /* channel attention control */ 43 #define IEE16_IRQ 0x07 /* IRQ configuration */ 44 #define IEE16_IRQ_DISABLE 0x00 /* disable board interrupts */ 45 #define IEE16_IRQ_ENABLE 0x08 /* enable board interrupts */ 46 47 #define IEE16_SHADOWPTR 0x08 /* shadow memory pointer */ 48 49 #define IEE16_MEMDEC 0x0a /* memory decode */ 50 #define IEE16_MCTRL 0x0b /* memory control */ 51 #define IEE16_MCTRL_FMCS16 0x10 /* MEMCS16- for F000 */ 52 53 #define IEE16_MPCTRL 0x0c /* memory page control */ 54 #define IEE16_CONFIG 0x0d /* config register */ 55 #define IEE16_BART_LOOPBACK 0x02 /* loopback, 0=none, 1=loopback */ 56 #define IEE16_BART_IOCHRDY_LATE 0x10 /* iochrdy late control bit */ 57 #define IEE16_BART_IO_TEST_EN 0x20 /* enable iochrdy timing test */ 58 #define IEE16_BART_IO_RESULT 0x40 /* result of the iochrdy test */ 59 #define IEE16_BART_MCS16_TEST 0x80 /* enable memcs16 select test */ 60 61 #define IEE16_ECTRL 0x0e /* eeprom control */ 62 #define IEE16_ECTRL_EESK 0x01 /* EEPROM clock bit */ 63 #define IEE16_ECTRL_EECS 0x02 /* EEPROM chip select */ 64 #define IEE16_ECTRL_EEDI 0x04 /* EEPROM data in bit */ 65 #define IEE16_ECTRL_EEDO 0x08 /* EEPROM data out bit */ 66 #define IEE16_RESET_ASIC 0x40 /* reset ASIC (bart) pin */ 67 #define IEE16_RESET_586 0x80 /* reset 82586 pin */ 68 #define IEE16_ECTRL_MASK 0xb2 /* and'ed with ECTRL to enable read */ 69 70 #define IEE16_MECTRL 0x0f /* memory control, 0xe000 seg 'W' */ 71 #define IEE16_ID_PORT 0x0f /* auto-id port 'R' */ 72 73 #define IEE16_ID 0xbaba /* known id of EE16 */ 74 75 #define IEE16_EEPROM_READ 0x06 /* EEPROM read opcode */ 76 #define IEE16_EEPROM_OPSIZE1 0x03 /* size of EEPROM opcodes */ 77 #define IEE16_EEPROM_ADDR_SIZE 0x06 /* size of EEPROM address */ 78 79 /* Locations in the EEPROM */ 80 #define IEE16_EEPROM_CONFIG1 0x00 /* Configuration register 1 */ 81 #define IEE16_EEPROM_MEDIA_EXT 0x1000 /* Using external transceiver 0 = AUI */ 82 83 #define IEE16_EEPROM_IRQ 0xE000 /* Encoded IRQ */ 84 #define IEE16_EEPROM_IRQ_SHIFT 13 /* To shift IRQ to lower bits */ 85 #define IEE16_EEPROM_LOCK_ADDR 0x01 /* contains the lock bit */ 86 #define IEE16_EEPROM_LOCKED 0x01 /* means that it is locked */ 87 88 #define IEE16_EEPROM_ENET_LOW 0x02 /* Ethernet address, low word */ 89 #define IEE16_EEPROM_ENET_MID 0x03 /* Ethernet address, middle word */ 90 #define IEE16_EEPROM_ENET_HIGH 0x04 /* Ethernet address, high word */ 91 92 #define IEE16_EEPROM_MEDIA 0x05 /* Selects between TP/BNC */ 93 #define IEE16_EEPROM_MEDIA_TP 0x01 /* if ON, using TP, else BNC */ 94