1 /* $OpenBSD: if_fereg.h,v 1.2 1997/11/07 08:06:55 niklas Exp $ */ 2 3 /* 4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 5 * 6 * This software may be used, modified, copied, distributed, and sold, 7 * in both source and binary form provided that the above copyright, 8 * these terms and the following disclaimer are retained. The name of 9 * the author and/or the contributor may not be used to endorse or 10 * promote products derived from this software without specific prior 11 * written permission. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #define FE_REG_VERSION "if_fereg.h ver. 0.8" 27 28 /* 29 * Hardware specification of various 86960/86965 based Ethernet cards. 30 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp> 31 */ 32 33 /* 34 * Registers on FMV-180 series' ISA bus interface ASIC. 35 * I'm not sure the following register names are appropriate. 36 * Doesn't it look silly, eh? FIXME. 37 */ 38 39 #define FE_FMV0 16 /* Hardware status. */ 40 #define FE_FMV1 17 /* Hardrare type? Always 0 */ 41 #define FE_FMV2 18 /* Hardware configuration. */ 42 #define FE_FMV3 19 /* Hardware enable. */ 43 #define FE_FMV4 20 /* Station address #1 */ 44 #define FE_FMV5 21 /* Station address #2 */ 45 #define FE_FMV6 22 /* Station address #3 */ 46 #define FE_FMV7 23 /* Station address #4 */ 47 #define FE_FMV8 24 /* Station address #5 */ 48 #define FE_FMV9 25 /* Station address #6 */ 49 #define FE_FMV10 26 /* Unknown; to be set to 0. */ 50 51 /* 52 * FMV-180 series' ASIC register values. 53 */ 54 55 /* Magic value in FMV0 register. */ 56 #define FE_FMV0_MAGIC_MASK 0x78 57 #define FE_FMV0_MAGIC_VALUE 0x50 58 59 /* Model identification. */ 60 #define FE_FMV0_MODEL 0x07 61 #define FE_FMV0_MODEL_FMV181 0x05 62 #define FE_FMV0_MODEL_FMV182 0x03 63 64 /* Card type ID? Always 0? */ 65 #define FE_FMV1_CARDID_MASK 0xFF 66 #define FE_FMV1_CARDID_ID 0x00 67 68 /* I/O port address assignment. */ 69 #define FE_FMV2_ADDR 0x07 70 #define FE_FMV2_ADDR_SHIFT 0 71 72 /* Boot ROM address assignment. */ 73 #define FE_FMV2_ROM 0x38 74 #define FE_FMV2_ROM_SHIFT 3 75 76 /* IRQ assignment. */ 77 #define FE_FMV2_IRQ 0xC0 78 #define FE_FMV2_IRQ_SHIFT 6 79 80 /* Hardware(?) enable flag. */ 81 #define FE_FMV3_ENABLE_FLAG 0x80 82 83 /* Extra bits in FMV3 register. Always 0? */ 84 #define FE_FMV3_EXTRA_MASK 0x7F 85 #define FE_FMV3_EXTRA_VALUE 0x00 86 87 /* 88 * EEPROM allocation of AT1700/RE2000. 89 */ 90 #define FE_ATI_EEP_ADDR 0x08 /* Station address. (8-13) */ 91 #define FE_ATI_EEP_MEDIA 0x18 /* Media type. */ 92 #define FE_ATI_EEP_MAGIC 0x19 /* XXX Magic. */ 93 #define FE_ATI_EEP_MODEL 0x1e /* Hardware type. */ 94 #define FE_ATI_EEP_REVISION 0x1f /* Hardware revision. */ 95 96 #define FE_ATI_MODEL_AT1700T 0x00 97 #define FE_ATI_MODEL_AT1700BT 0x01 98 #define FE_ATI_MODEL_AT1700FT 0x02 99 #define FE_ATI_MODEL_AT1700AT 0x03 100 101 /* 102 * Registers on MBH10302. 103 */ 104 105 #define FE_MBH0 0x10 /* ??? Including interrupt. */ 106 #define FE_MBH1 0x11 /* ??? */ 107 #define FE_MBH10 0x1A /* Station address. (10 - 15) */ 108 109 /* Values to be set in MBH0 register. */ 110 #define FE_MBH0_MAGIC 0x0D /* Just a magic constant? */ 111 #define FE_MBH0_INTR 0x10 /* Master interrupt control. */ 112 113 #define FE_MBH0_INTR_ENABLE 0x10 /* Enable interrupts. */ 114 #define FE_MBH0_INTR_DISABLE 0x00 /* Disable interrupts. */ 115