Searched defs:ExtVal (Results 1 – 12 of 12) sorted by relevance
| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | InlineAsmLowering.cpp | 640 int64_t ExtVal = IsBool ? CI->getZExtValue() : CI->getSExtValue(); in lowerAsmOperandForConstraint() local
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| HD | LegalizerHelper.cpp | 3682 auto ExtVal = MIRBuilder.buildAnyExtOrTrunc(NewSrcTy, SrcReg); in lowerStore() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86ISelDAGToDAG.cpp | 2388 SDValue ExtVal = CurDAG->getConstant(Offset, DL, VT); in matchIndexRecursively() local
2438 SDValue ExtVal = CurDAG->getConstant(Offset, DL, VT); in matchIndexRecursively() local
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| HD | X86ISelLowering.cpp | 58669 int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? CST->getZExtValue() in LowerAsmOperandForConstraint() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| HD | CodeGenPrepare.cpp | 2485 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0)); in optimizeCallInst() local
4648 Value *ExtVal = SExt; in promoteOperandForTruncAndAnyExt() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| HD | NVPTXISelLowering.cpp | 3068 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val, in LowerSTOREVector() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| HD | PPCISelDAGToDAG.cpp | 2141 SDValue ExtVal = SDValue(CurDAG->getMachineNode(PPC::INSERT_SUBREG, dl, in ExtendToInt64() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| HD | TargetLowering.h | 3203 virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; } in isVectorLoadExtDesirable()
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 5573 int64_t ExtVal = in LowerAsmOperandForConstraint() local
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| HD | DAGCombiner.cpp | 14964 SDValue ExtVal = N0.getOperand(1); in visitTRUNCATE() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | SIISelLowering.cpp | 7259 SDValue ExtVal = DAG.getNode(ISD::BITCAST, SL, IntVT, in lowerINSERT_VECTOR_ELT() local
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| /freebsd-14-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 18903 uint64_t ExtVal = C->getZExtValue(); in performSVEAndCombine() local
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