1 /*- 2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 3 * reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * NETLOGIC_BSD 29 * $FreeBSD: stable/10/sys/mips/nlm/board.h 255368 2013-09-07 18:26:16Z jchandra $ 30 */ 31 32 #ifndef __NLM_BOARD_H__ 33 #define __NLM_BOARD_H__ 34 35 #define XLP_NAE_NBLOCKS 5 36 #define XLP_NAE_NPORTS 4 37 38 /* 39 * EVP board EEPROM info 40 */ 41 #define EEPROM_I2CBUS 1 42 #define EEPROM_I2CADDR 0xAE 43 #define EEPROM_SIZE 48 44 #define EEPROM_MACADDR_OFFSET 2 45 46 /* used if there is no FDT */ 47 #define BOARD_CONSOLE_SPEED 115200 48 #define BOARD_CONSOLE_UART 0 49 50 /* 51 * EVP board CPLD chip select and daughter card info field 52 */ 53 #define XLP_EVB_CPLD_CHIPSELECT 2 54 55 #define DCARD_ILAKEN 0x0 56 #define DCARD_SGMII 0x1 57 #define DCARD_XAUI 0x2 58 #define DCARD_NOT_PRSNT 0x3 59 60 #if !defined(LOCORE) && !defined(__ASSEMBLY__) 61 /* 62 * NAE configuration 63 */ 64 65 struct xlp_port_ivars { 66 int port; 67 int block; 68 int node; 69 int type; 70 int phy_addr; 71 int mdio_bus; 72 int loopback_mode; 73 int num_channels; 74 int free_desc_sizes; 75 int num_free_descs; 76 int pseq_fifo_size; 77 int iface_fifo_size; 78 int rxbuf_size; 79 int rx_slots_reqd; 80 int tx_slots_reqd; 81 int vlan_pri_en; 82 int stg2_fifo_size; 83 int eh_fifo_size; 84 int frout_fifo_size; 85 int ms_fifo_size; 86 int pkt_fifo_size; 87 int pktlen_fifo_size; 88 int max_stg2_offset; 89 int max_eh_offset; 90 int max_frout_offset; 91 int max_ms_offset; 92 int max_pmem_offset; 93 int stg1_2_credit; 94 int stg2_eh_credit; 95 int stg2_frout_credit; 96 int stg2_ms_credit; 97 int hw_parser_en; 98 u_int ieee1588_inc_intg; 99 u_int ieee1588_inc_den; 100 u_int ieee1588_inc_num; 101 uint64_t ieee1588_userval; 102 uint64_t ieee1588_ptpoff; 103 uint64_t ieee1588_tmr1; 104 uint64_t ieee1588_tmr2; 105 uint64_t ieee1588_tmr3; 106 }; 107 108 struct xlp_block_ivars { 109 int block; 110 int type; 111 u_int portmask; 112 struct xlp_port_ivars port_ivars[XLP_NAE_NPORTS]; 113 }; 114 115 struct xlp_nae_ivars { 116 int node; 117 int nblocks; 118 u_int blockmask; 119 u_int ilmask; 120 u_int xauimask; 121 u_int sgmiimask; 122 int freq; 123 u_int flow_crc_poly; 124 u_int hw_parser_en; 125 u_int prepad_en; 126 u_int prepad_size; /* size in 16 byte units */ 127 u_int ieee_1588_en; 128 struct xlp_block_ivars block_ivars[XLP_NAE_NBLOCKS]; 129 }; 130 131 struct xlp_board_info { 132 u_int nodemask; 133 struct xlp_node_info { 134 struct xlp_nae_ivars nae_ivars; 135 } nodes[XLP_MAX_NODES]; 136 }; 137 138 extern struct xlp_board_info xlp_board_info; 139 140 /* Network configuration */ 141 int nlm_get_vfbid_mapping(int); 142 int nlm_get_poe_distvec(int vec, uint32_t *distvec); 143 void xlpge_get_macaddr(uint8_t *macaddr); 144 145 int nlm_board_info_setup(void); 146 147 /* EEPROM & CPLD */ 148 int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs, 149 uint8_t *buf,int sz); 150 uint64_t nlm_board_cpld_base(int node, int chipselect); 151 int nlm_board_cpld_majorversion(uint64_t cpldbase); 152 int nlm_board_cpld_minorversion(uint64_t cpldbase); 153 void nlm_board_cpld_reset(uint64_t cpldbase); 154 int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot); 155 156 #endif 157 #endif 158