Searched defs:DReg (Results 1 – 6 of 6) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| HD | A15SDOptimizer.cpp | 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR() local
434 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg()
479 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg()
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| HD | ARMBaseInstrInfo.cpp | 4868 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); in getCorrespondingDRegAndLane() local
4897 MachineInstr &MI, unsigned DReg, in getImplicitSPRUseForDPRUse()
4925 unsigned DstReg, SrcReg, DReg; in setExecutionDomain() local
5179 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, in getPartialRegUpdateClearance() local
5201 unsigned DReg = Reg; in breakPartialRegDependency() local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| HD | Mips16FrameLowering.cpp | 79 unsigned DReg = MRI->getDwarfRegNum(Reg, true); in emitPrologue() local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86FloatingPoint.cpp | 907 unsigned DReg = countTrailingZeros(Defs); in adjustLiveRegs() local
939 unsigned DReg = countTrailingZeros(Defs); in adjustLiveRegs() local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| HD | HexagonSubtarget.cpp | 347 Register DReg = DstInst->getOperand(0).getReg(); in adjustSchedDependency() local
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| HD | MipsAsmParser.cpp | 4750 unsigned DReg = Inst.getOperand(0).getReg(); in expandRotation() local
4813 unsigned DReg = Inst.getOperand(0).getReg(); in expandRotationImm() local
4875 unsigned DReg = Inst.getOperand(0).getReg(); in expandDRotation() local
4938 unsigned DReg = Inst.getOperand(0).getReg(); in expandDRotationImm() local
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