1 /*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29 #ifndef _LINUX_DMA_MAPPING_H_
30 #define _LINUX_DMA_MAPPING_H_
31
32 #include <linux/types.h>
33 #include <linux/device.h>
34 #include <linux/err.h>
35 #include <linux/dma-attrs.h>
36 #include <linux/scatterlist.h>
37 #include <linux/mm.h>
38 #include <linux/page.h>
39
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42
43 #include <vm/vm.h>
44 #include <vm/vm_page.h>
45 #include <vm/pmap.h>
46
47 #include <machine/bus.h>
48 #include <machine/pmap.h>
49
50 enum dma_data_direction {
51 DMA_BIDIRECTIONAL = 0,
52 DMA_TO_DEVICE = 1,
53 DMA_FROM_DEVICE = 2,
54 DMA_NONE = 3,
55 };
56
57 struct dma_map_ops {
58 void* (*alloc_coherent)(struct device *dev, size_t size,
59 dma_addr_t *dma_handle, gfp_t gfp);
60 void (*free_coherent)(struct device *dev, size_t size,
61 void *vaddr, dma_addr_t dma_handle);
62 dma_addr_t (*map_page)(struct device *dev, struct page *page,
63 unsigned long offset, size_t size, enum dma_data_direction dir,
64 struct dma_attrs *attrs);
65 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
66 size_t size, enum dma_data_direction dir, struct dma_attrs *attrs);
67 int (*map_sg)(struct device *dev, struct scatterlist *sg,
68 int nents, enum dma_data_direction dir, struct dma_attrs *attrs);
69 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
70 enum dma_data_direction dir, struct dma_attrs *attrs);
71 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
72 size_t size, enum dma_data_direction dir);
73 void (*sync_single_for_device)(struct device *dev,
74 dma_addr_t dma_handle, size_t size, enum dma_data_direction dir);
75 void (*sync_single_range_for_cpu)(struct device *dev,
76 dma_addr_t dma_handle, unsigned long offset, size_t size,
77 enum dma_data_direction dir);
78 void (*sync_single_range_for_device)(struct device *dev,
79 dma_addr_t dma_handle, unsigned long offset, size_t size,
80 enum dma_data_direction dir);
81 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
82 int nents, enum dma_data_direction dir);
83 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
84 int nents, enum dma_data_direction dir);
85 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
86 int (*dma_supported)(struct device *dev, u64 mask);
87 int is_phys;
88 };
89
90 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL << (n)) - 1))
91
92 static inline int
dma_supported(struct device * dev,u64 mask)93 dma_supported(struct device *dev, u64 mask)
94 {
95
96 /* XXX busdma takes care of this elsewhere. */
97 return (1);
98 }
99
100 static inline int
dma_set_mask(struct device * dev,u64 dma_mask)101 dma_set_mask(struct device *dev, u64 dma_mask)
102 {
103
104 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
105 return -EIO;
106
107 *dev->dma_mask = dma_mask;
108 return (0);
109 }
110
111 static inline int
dma_set_coherent_mask(struct device * dev,u64 mask)112 dma_set_coherent_mask(struct device *dev, u64 mask)
113 {
114
115 if (!dma_supported(dev, mask))
116 return -EIO;
117 /* XXX Currently we don't support a seperate coherent mask. */
118 return 0;
119 }
120
121 static inline void *
dma_alloc_coherent(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t flag)122 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
123 gfp_t flag)
124 {
125 vm_paddr_t high;
126 size_t align;
127 void *mem;
128
129 if (dev != NULL && dev->dma_mask)
130 high = *dev->dma_mask;
131 else
132 high = BUS_SPACE_MAXADDR_32BIT;
133 align = PAGE_SIZE << get_order(size);
134 mem = (void *)kmem_alloc_contig(kmem_arena, size, flag, 0, high, align,
135 0, VM_MEMATTR_DEFAULT);
136 if (mem)
137 *dma_handle = vtophys(mem);
138 else
139 *dma_handle = 0;
140 return (mem);
141 }
142
143 static inline void *
dma_zalloc_coherent(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t flag)144 dma_zalloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
145 gfp_t flag)
146 {
147
148 return (dma_alloc_coherent(dev, size, dma_handle, flag | __GFP_ZERO));
149 }
150
151 static inline void
dma_free_coherent(struct device * dev,size_t size,void * cpu_addr,dma_addr_t dma_handle)152 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
153 dma_addr_t dma_handle)
154 {
155
156 kmem_free(kmem_arena, (vm_offset_t)cpu_addr, size);
157 }
158
159 /* XXX This only works with no iommu. */
160 static inline dma_addr_t
dma_map_single_attrs(struct device * dev,void * ptr,size_t size,enum dma_data_direction dir,struct dma_attrs * attrs)161 dma_map_single_attrs(struct device *dev, void *ptr, size_t size,
162 enum dma_data_direction dir, struct dma_attrs *attrs)
163 {
164
165 return vtophys(ptr);
166 }
167
168 static inline void
dma_unmap_single_attrs(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir,struct dma_attrs * attrs)169 dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, size_t size,
170 enum dma_data_direction dir, struct dma_attrs *attrs)
171 {
172 }
173
174 static inline int
dma_map_sg_attrs(struct device * dev,struct scatterlist * sgl,int nents,enum dma_data_direction dir,struct dma_attrs * attrs)175 dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl, int nents,
176 enum dma_data_direction dir, struct dma_attrs *attrs)
177 {
178 struct scatterlist *sg;
179 int i;
180
181 for_each_sg(sgl, sg, nents, i)
182 sg_dma_address(sg) = sg_phys(sg);
183
184 return (nents);
185 }
186
187 static inline void
dma_unmap_sg_attrs(struct device * dev,struct scatterlist * sg,int nents,enum dma_data_direction dir,struct dma_attrs * attrs)188 dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents,
189 enum dma_data_direction dir, struct dma_attrs *attrs)
190 {
191 }
192
193 static inline dma_addr_t
dma_map_page(struct device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction direction)194 dma_map_page(struct device *dev, struct page *page,
195 unsigned long offset, size_t size, enum dma_data_direction direction)
196 {
197
198 return VM_PAGE_TO_PHYS(page) + offset;
199 }
200
201 static inline void
dma_unmap_page(struct device * dev,dma_addr_t dma_address,size_t size,enum dma_data_direction direction)202 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
203 enum dma_data_direction direction)
204 {
205 }
206
207 static inline void
dma_sync_single_for_cpu(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)208 dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
209 enum dma_data_direction direction)
210 {
211 }
212
213 static inline void
dma_sync_single(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir)214 dma_sync_single(struct device *dev, dma_addr_t addr, size_t size,
215 enum dma_data_direction dir)
216 {
217 dma_sync_single_for_cpu(dev, addr, size, dir);
218 }
219
220 static inline void
dma_sync_single_for_device(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)221 dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
222 size_t size, enum dma_data_direction direction)
223 {
224 }
225
226 static inline void
dma_sync_sg_for_cpu(struct device * dev,struct scatterlist * sg,int nelems,enum dma_data_direction direction)227 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
228 enum dma_data_direction direction)
229 {
230 }
231
232 static inline void
dma_sync_sg_for_device(struct device * dev,struct scatterlist * sg,int nelems,enum dma_data_direction direction)233 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
234 enum dma_data_direction direction)
235 {
236 }
237
238 static inline void
dma_sync_single_range_for_cpu(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,int direction)239 dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
240 unsigned long offset, size_t size, int direction)
241 {
242 }
243
244 static inline void
dma_sync_single_range_for_device(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,int direction)245 dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
246 unsigned long offset, size_t size, int direction)
247 {
248 }
249
250 static inline int
dma_mapping_error(struct device * dev,dma_addr_t dma_addr)251 dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
252 {
253
254 return (0);
255 }
256
dma_set_max_seg_size(struct device * dev,unsigned int size)257 static inline unsigned int dma_set_max_seg_size(struct device *dev,
258 unsigned int size)
259 {
260 return (0);
261 }
262
263
264 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
265 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
266 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
267 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
268
269 #define DEFINE_DMA_UNMAP_ADDR(name) dma_addr_t name
270 #define DEFINE_DMA_UNMAP_LEN(name) __u32 name
271 #define dma_unmap_addr(p, name) ((p)->name)
272 #define dma_unmap_addr_set(p, name, v) (((p)->name) = (v))
273 #define dma_unmap_len(p, name) ((p)->name)
274 #define dma_unmap_len_set(p, name, v) (((p)->name) = (v))
275
276 extern int uma_align_cache;
277 #define dma_get_cache_alignment() uma_align_cache
278
279 #endif /* _LINUX_DMA_MAPPING_H_ */
280