1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
5 * reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * NETLOGIC_BSD
31 */
32
33 #ifndef __NLM_XLP_H__
34 #define __NLM_XLP_H__
35 #include <mips/nlm/hal/mips-extns.h>
36 #include <mips/nlm/hal/iomap.h>
37
38 /* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
39 #define CHIP_PROCESSOR_ID_XLP_8XX 0x10
40 #define CHIP_PROCESSOR_ID_XLP_3XX 0x11
41 #define CHIP_PROCESSOR_ID_XLP_416 0x94
42 #define CHIP_PROCESSOR_ID_XLP_432 0x14
43
44 /* Revision id's */
45 #define XLP_REVISION_A0 0x00
46 #define XLP_REVISION_A1 0x01
47 #define XLP_REVISION_A2 0x02
48 #define XLP_REVISION_B0 0x03
49 #define XLP_REVISION_B1 0x04
50
51 #ifndef LOCORE
52 /*
53 * FreeBSD can be started with few threads and cores turned off,
54 * so have a hardware thread id to FreeBSD cpuid mapping.
55 */
56 extern int xlp_ncores;
57 extern int xlp_threads_per_core;
58 extern uint32_t xlp_hw_thread_mask;
59 extern int xlp_cpuid_to_hwtid[];
60 extern int xlp_hwtid_to_cpuid[];
61 #ifdef SMP
62 extern void xlp_enable_threads(int code);
63 #endif
64 uint32_t xlp_get_cpu_frequency(int node, int core);
65 int nlm_set_device_frequency(int node, int devtype, int frequency);
66 int xlp_irq_to_irt(int irq);
67
nlm_processor_id(void)68 static __inline int nlm_processor_id(void)
69 {
70 return ((mips_rd_prid() >> 8) & 0xff);
71 }
72
nlm_is_xlp3xx(void)73 static __inline int nlm_is_xlp3xx(void)
74 {
75
76 return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX);
77 }
78
nlm_is_xlp3xx_ax(void)79 static __inline int nlm_is_xlp3xx_ax(void)
80 {
81 uint32_t procid = mips_rd_prid();
82 int prid = (procid >> 8) & 0xff;
83 int rev = procid & 0xff;
84
85 return (prid == CHIP_PROCESSOR_ID_XLP_3XX &&
86 rev < XLP_REVISION_B0);
87 }
88
nlm_is_xlp4xx(void)89 static __inline int nlm_is_xlp4xx(void)
90 {
91 int prid = nlm_processor_id();
92
93 return (prid == CHIP_PROCESSOR_ID_XLP_432 ||
94 prid == CHIP_PROCESSOR_ID_XLP_416);
95 }
96
nlm_is_xlp8xx(void)97 static __inline int nlm_is_xlp8xx(void)
98 {
99 int prid = nlm_processor_id();
100
101 return (prid == CHIP_PROCESSOR_ID_XLP_8XX ||
102 prid == CHIP_PROCESSOR_ID_XLP_432 ||
103 prid == CHIP_PROCESSOR_ID_XLP_416);
104 }
105
nlm_is_xlp8xx_ax(void)106 static __inline int nlm_is_xlp8xx_ax(void)
107 {
108 uint32_t procid = mips_rd_prid();
109 int prid = (procid >> 8) & 0xff;
110 int rev = procid & 0xff;
111
112 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
113 prid == CHIP_PROCESSOR_ID_XLP_432 ||
114 prid == CHIP_PROCESSOR_ID_XLP_416) &&
115 (rev < XLP_REVISION_B0));
116 }
117
nlm_is_xlp8xx_b0(void)118 static __inline int nlm_is_xlp8xx_b0(void)
119 {
120 uint32_t procid = mips_rd_prid();
121 int prid = (procid >> 8) & 0xff;
122 int rev = procid & 0xff;
123
124 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
125 prid == CHIP_PROCESSOR_ID_XLP_432 ||
126 prid == CHIP_PROCESSOR_ID_XLP_416) &&
127 rev == XLP_REVISION_B0);
128 }
129
xlp_socdev_irt(uint32_t offset)130 static __inline int xlp_socdev_irt(uint32_t offset)
131 {
132 uint64_t base;
133
134 base = nlm_pcicfg_base(offset);
135 return (nlm_irtstart(base));
136 }
137 #endif /* LOCORE */
138 #endif /* __NLM_XLP_H__ */
139